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MulDx9Zero.lgc
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; NOTE: Assertions have been autogenerated by tool/update_llpc_test_checks.py UTC_ARGS: --tool lgc
; RUN: lgc -mcpu=gfx1030 --emit-llvm -v -o=- - <%s | FileCheck --check-prefixes=CHECK %s
@r0 = addrspace(1) global <4 x float> zeroinitializer
@r1 = addrspace(1) global <4 x float> zeroinitializer
@r2 = addrspace(1) global <4 x float> zeroinitializer
define dllexport spir_func void @main() #0 !spirv.ExecutionModel !3 !lgc.shaderstage !4 {
.entry:
%2257 = load <4 x float>, ptr addrspace(1) @r0, align 16
%2258 = shufflevector <4 x float> %2257, <4 x float> %2257, <3 x i32> <i32 2, i32 2, i32 2>
%2259 = load <4 x float>, ptr addrspace(1) @r1, align 16
%2260 = shufflevector <4 x float> %2259, <4 x float> %2259, <3 x i32> <i32 0, i32 1, i32 2>
%2261 = extractelement <3 x float> %2258, i64 0
%2262 = fcmp oeq float %2261, 0.000000e+00
%2263 = insertelement <3 x i1> poison, i1 %2262, i64 0
%2264 = extractelement <3 x float> %2258, i64 1
%2265 = fcmp oeq float %2264, 0.000000e+00
%2266 = insertelement <3 x i1> %2263, i1 %2265, i64 1
%2267 = extractelement <3 x float> %2258, i64 2
%2268 = fcmp oeq float %2267, 0.000000e+00
%2269 = insertelement <3 x i1> %2266, i1 %2268, i64 2
%2270 = extractelement <3 x i1> %2269, i64 0
%2271 = extractelement <3 x float> %2260, i64 0
%2272 = select reassoc nnan nsz arcp contract afn i1 %2270, float 0.000000e+00, float %2271
%2273 = insertelement <3 x float> poison, float %2272, i64 0
%2274 = extractelement <3 x i1> %2269, i64 1
%2275 = extractelement <3 x float> %2260, i64 1
%2276 = select reassoc nnan nsz arcp contract afn i1 %2274, float 0.000000e+00, float %2275
%2277 = insertelement <3 x float> %2273, float %2276, i64 1
%2278 = extractelement <3 x i1> %2269, i64 2
%2279 = extractelement <3 x float> %2260, i64 2
%2280 = select reassoc nnan nsz arcp contract afn i1 %2278, float 0.000000e+00, float %2279
%2281 = insertelement <3 x float> %2277, float %2280, i64 2
%2282 = extractelement <3 x float> %2260, i64 0
%2283 = fcmp oeq float %2282, 0.000000e+00
%2284 = insertelement <3 x i1> poison, i1 %2283, i64 0
%2285 = extractelement <3 x float> %2260, i64 1
%2286 = fcmp oeq float %2285, 0.000000e+00
%2287 = insertelement <3 x i1> %2284, i1 %2286, i64 1
%2288 = extractelement <3 x float> %2260, i64 2
%2289 = fcmp oeq float %2288, 0.000000e+00
%2290 = insertelement <3 x i1> %2287, i1 %2289, i64 2
%2291 = extractelement <3 x i1> %2290, i64 0
%2292 = extractelement <3 x float> %2258, i64 0
%2293 = select reassoc nnan nsz arcp contract afn i1 %2291, float 0.000000e+00, float %2292
%2294 = insertelement <3 x float> poison, float %2293, i64 0
%2295 = extractelement <3 x i1> %2290, i64 1
%2296 = extractelement <3 x float> %2258, i64 1
%2297 = select reassoc nnan nsz arcp contract afn i1 %2295, float 0.000000e+00, float %2296
%2298 = insertelement <3 x float> %2294, float %2297, i64 1
%2299 = extractelement <3 x i1> %2290, i64 2
%2300 = extractelement <3 x float> %2258, i64 2
%2301 = select reassoc nnan nsz arcp contract afn i1 %2299, float 0.000000e+00, float %2300
%2302 = insertelement <3 x float> %2298, float %2301, i64 2
%2303 = fmul reassoc nnan nsz arcp contract afn <3 x float> %2281, %2302
%2304 = load <4 x float>, ptr addrspace(1) @r2, align 16
%2305 = shufflevector <3 x float> %2303, <3 x float> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 poison>
%2306 = shufflevector <4 x float> %2304, <4 x float> %2305, <4 x i32> <i32 4, i32 5, i32 6, i32 3>
store <4 x float> %2306, ptr addrspace(1) @r2, align 16
ret void
}
attributes #0 = { nounwind }
!0 = !{{ i64, i64 } { i64 16908289, i64 34359738368 }}
!1 = !{{ i64, i64 } { i64 16908288, i64 34359738368 }}
!2 = !{{ i64, i64 } { i64 16908288, i64 137438953472 }}
!3 = !{i32 4}
!4 = !{i32 6}
; CHECK-LABEL: @main(
; CHECK-NEXT: .entry:
; CHECK-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr addrspace(1) @r0, align 16
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x float> [[TMP0]], <4 x float> [[TMP0]], <3 x i32> <i32 2, i32 2, i32 2>
; CHECK-NEXT: [[TMP2:%.*]] = load <4 x float>, ptr addrspace(1) @r1, align 16
; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <4 x float> [[TMP2]], <4 x float> [[TMP2]], <3 x i32> <i32 0, i32 1, i32 2>
; CHECK-NEXT: [[TMP4:%.*]] = extractelement <3 x float> [[TMP1]], i64 0
; CHECK-NEXT: [[TMP5:%.*]] = fcmp oeq float [[TMP4]], 0.000000e+00
; CHECK-NEXT: [[TMP6:%.*]] = insertelement <3 x i1> poison, i1 [[TMP5]], i64 0
; CHECK-NEXT: [[TMP7:%.*]] = extractelement <3 x float> [[TMP1]], i64 1
; CHECK-NEXT: [[TMP8:%.*]] = fcmp oeq float [[TMP7]], 0.000000e+00
; CHECK-NEXT: [[TMP9:%.*]] = insertelement <3 x i1> [[TMP6]], i1 [[TMP8]], i64 1
; CHECK-NEXT: [[TMP10:%.*]] = extractelement <3 x float> [[TMP1]], i64 2
; CHECK-NEXT: [[TMP11:%.*]] = fcmp oeq float [[TMP10]], 0.000000e+00
; CHECK-NEXT: [[TMP12:%.*]] = insertelement <3 x i1> [[TMP9]], i1 [[TMP11]], i64 2
; CHECK-NEXT: [[TMP13:%.*]] = extractelement <3 x i1> [[TMP12]], i64 0
; CHECK-NEXT: [[TMP14:%.*]] = extractelement <3 x float> [[TMP3]], i64 0
; CHECK-NEXT: [[TMP15:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP13]], float 0.000000e+00, float [[TMP14]]
; CHECK-NEXT: [[TMP16:%.*]] = insertelement <3 x float> poison, float [[TMP15]], i64 0
; CHECK-NEXT: [[TMP17:%.*]] = extractelement <3 x i1> [[TMP12]], i64 1
; CHECK-NEXT: [[TMP18:%.*]] = extractelement <3 x float> [[TMP3]], i64 1
; CHECK-NEXT: [[TMP19:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP17]], float 0.000000e+00, float [[TMP18]]
; CHECK-NEXT: [[TMP20:%.*]] = insertelement <3 x float> [[TMP16]], float [[TMP19]], i64 1
; CHECK-NEXT: [[TMP21:%.*]] = extractelement <3 x i1> [[TMP12]], i64 2
; CHECK-NEXT: [[TMP22:%.*]] = extractelement <3 x float> [[TMP3]], i64 2
; CHECK-NEXT: [[TMP23:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP21]], float 0.000000e+00, float [[TMP22]]
; CHECK-NEXT: [[TMP24:%.*]] = insertelement <3 x float> [[TMP20]], float [[TMP23]], i64 2
; CHECK-NEXT: [[TMP25:%.*]] = extractelement <3 x float> [[TMP3]], i64 0
; CHECK-NEXT: [[TMP26:%.*]] = fcmp oeq float [[TMP25]], 0.000000e+00
; CHECK-NEXT: [[TMP27:%.*]] = insertelement <3 x i1> poison, i1 [[TMP26]], i64 0
; CHECK-NEXT: [[TMP28:%.*]] = extractelement <3 x float> [[TMP3]], i64 1
; CHECK-NEXT: [[TMP29:%.*]] = fcmp oeq float [[TMP28]], 0.000000e+00
; CHECK-NEXT: [[TMP30:%.*]] = insertelement <3 x i1> [[TMP27]], i1 [[TMP29]], i64 1
; CHECK-NEXT: [[TMP31:%.*]] = extractelement <3 x float> [[TMP3]], i64 2
; CHECK-NEXT: [[TMP32:%.*]] = fcmp oeq float [[TMP31]], 0.000000e+00
; CHECK-NEXT: [[TMP33:%.*]] = insertelement <3 x i1> [[TMP30]], i1 [[TMP32]], i64 2
; CHECK-NEXT: [[TMP34:%.*]] = extractelement <3 x i1> [[TMP33]], i64 0
; CHECK-NEXT: [[TMP35:%.*]] = extractelement <3 x float> [[TMP1]], i64 0
; CHECK-NEXT: [[TMP36:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP34]], float 0.000000e+00, float [[TMP35]]
; CHECK-NEXT: [[TMP37:%.*]] = insertelement <3 x float> poison, float [[TMP36]], i64 0
; CHECK-NEXT: [[TMP38:%.*]] = extractelement <3 x i1> [[TMP33]], i64 1
; CHECK-NEXT: [[TMP39:%.*]] = extractelement <3 x float> [[TMP1]], i64 1
; CHECK-NEXT: [[TMP40:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP38]], float 0.000000e+00, float [[TMP39]]
; CHECK-NEXT: [[TMP41:%.*]] = insertelement <3 x float> [[TMP37]], float [[TMP40]], i64 1
; CHECK-NEXT: [[TMP42:%.*]] = extractelement <3 x i1> [[TMP33]], i64 2
; CHECK-NEXT: [[TMP43:%.*]] = extractelement <3 x float> [[TMP1]], i64 2
; CHECK-NEXT: [[TMP44:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP42]], float 0.000000e+00, float [[TMP43]]
; CHECK-NEXT: [[TMP45:%.*]] = insertelement <3 x float> [[TMP41]], float [[TMP44]], i64 2
; CHECK-NEXT: [[TMP46:%.*]] = fmul reassoc nnan nsz arcp contract afn <3 x float> [[TMP24]], [[TMP45]]
; CHECK-NEXT: [[TMP47:%.*]] = load <4 x float>, ptr addrspace(1) @r2, align 16
; CHECK-NEXT: [[TMP48:%.*]] = shufflevector <3 x float> [[TMP46]], <3 x float> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 poison>
; CHECK-NEXT: [[TMP49:%.*]] = shufflevector <4 x float> [[TMP47]], <4 x float> [[TMP48]], <4 x i32> <i32 4, i32 5, i32 6, i32 3>
; CHECK-NEXT: store <4 x float> [[TMP49]], ptr addrspace(1) @r2, align 16
; CHECK-NEXT: ret void
;
;
; CHECK-LABEL: @_amdgpu_ps_main(
; CHECK-NEXT: .entry:
; CHECK-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr addrspace(1) @r0, align 16
; CHECK-NEXT: [[DOTI2:%.*]] = extractelement <4 x float> [[TMP0]], i64 2
; CHECK-NEXT: [[TMP1:%.*]] = load <4 x float>, ptr addrspace(1) @r1, align 16
; CHECK-NEXT: [[DOTI21:%.*]] = extractelement <4 x float> [[TMP1]], i64 2
; CHECK-NEXT: [[DOTI1:%.*]] = extractelement <4 x float> [[TMP1]], i64 1
; CHECK-NEXT: [[DOTI0:%.*]] = extractelement <4 x float> [[TMP1]], i64 0
; CHECK-NEXT: [[TMP2:%.*]] = call reassoc nnan nsz arcp contract afn float @llvm.amdgcn.fmul.legacy(float [[DOTI2]], float [[DOTI0]])
; CHECK-NEXT: [[TMP3:%.*]] = call reassoc nnan nsz arcp contract afn float @llvm.amdgcn.fmul.legacy(float [[DOTI2]], float [[DOTI1]])
; CHECK-NEXT: [[TMP4:%.*]] = call reassoc nnan nsz arcp contract afn float @llvm.amdgcn.fmul.legacy(float [[DOTI2]], float [[DOTI21]])
; CHECK-NEXT: [[TMP5:%.*]] = load <4 x float>, ptr addrspace(1) @r2, align 16
; CHECK-NEXT: [[DOTUPTO019:%.*]] = insertelement <4 x float> poison, float [[TMP2]], i64 0
; CHECK-NEXT: [[DOTUPTO120:%.*]] = insertelement <4 x float> [[DOTUPTO019]], float [[TMP3]], i64 1
; CHECK-NEXT: [[DOTUPTO221:%.*]] = insertelement <4 x float> [[DOTUPTO120]], float [[TMP4]], i64 2
; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <4 x float> [[DOTUPTO221]], <4 x float> [[TMP5]], <4 x i32> <i32 0, i32 1, i32 2, i32 7>
; CHECK-NEXT: store <4 x float> [[TMP6]], ptr addrspace(1) @r2, align 16
; CHECK-NEXT: ret void
;