From d5dc8d8a81bf2cb7ad7752d3fd1ef2dbcb09babd Mon Sep 17 00:00:00 2001 From: Gericom Date: Wed, 12 Aug 2020 13:02:32 +0200 Subject: [PATCH] Hybrid solution for hicode on DSi and 3DS Non hicode uses the normal way of executing such that it runs at the usual speed DS is not supported for this yet, I need to find a good MPU config first --- arm9/source/aborthandler_asm.s | 8 +++--- arm9/source/bios/bios_patches.s | 1 - arm9/source/consts.s | 4 +++ arm9/source/emu/hicode.s | 4 +-- arm9/source/setup.s | 45 +++++++++++++++++++++++++-------- common/common_defs.s | 23 +++++------------ 6 files changed, 50 insertions(+), 35 deletions(-) diff --git a/arm9/source/aborthandler_asm.s b/arm9/source/aborthandler_asm.s index e9ece78..d4cbd69 100644 --- a/arm9/source/aborthandler_asm.s +++ b/arm9/source/aborthandler_asm.s @@ -37,8 +37,8 @@ data_abort_handler_thumb: ldrh r10, [r11, #-8] //todo: fill up this interlock #ifdef ENABLE_HICODE - sub r11, #0x08000000 - cmp r11, #0x02000000 + sub r13, r11, #0x08000000 + cmp r13, #0x02000000 blo data_abort_handler_thumb_load_from_cache data_abort_handler_thumb_cont: #endif @@ -196,8 +196,8 @@ abt_handleArm_load_from_cache: abt_handleArm: ldr r10, [r11, #-8] #ifdef ENABLE_HICODE - sub r11, #0x08000000 - cmp r11, #0x02000000 + sub r14, r11, #0x08000000 + cmp r14, #0x02000000 blo abt_handleArm_load_from_cache abt_handleArm_cont: #endif diff --git a/arm9/source/bios/bios_patches.s b/arm9/source/bios/bios_patches.s index fff0ea3..7d5183e 100644 --- a/arm9/source/bios/bios_patches.s +++ b/arm9/source/bios/bios_patches.s @@ -87,7 +87,6 @@ bios_cpuset_cache_patch: .global bios_cpufastset_cache_patch bios_cpufastset_cache_patch: STMFD SP!, {R4-R10,LR} -<<<<<<< HEAD:arm9/source/bios_patches.s ldr r4,= gEmuSettingWramICache ldr r4, [r4] cmp r4, #0 diff --git a/arm9/source/consts.s b/arm9/source/consts.s index 210200a..a5f2507 100644 --- a/arm9/source/consts.s +++ b/arm9/source/consts.s @@ -19,7 +19,11 @@ //#define ABT_NO_FIQ +//currently only on dsi and 3ds, because I haven't found a mpu configuration +//for DS yet that allows me to disallow execution in the regions I need to +#if defined(USE_DSI_16MB) || defined(USE_3DS_32MB) #define ENABLE_HICODE +#endif //enabling the wram icache can significantly improve //speed in some games (dk3, rayman3, riviera), however diff --git a/arm9/source/emu/hicode.s b/arm9/source/emu/hicode.s index 7f90c56..757204b 100644 --- a/arm9/source/emu/hicode.s +++ b/arm9/source/emu/hicode.s @@ -82,8 +82,8 @@ hic_loadSector: //load from main memory hic_loadSectorFast: bic r12, r1, #0x06000000 - sub r12, #0x05000000 - sub r12, #0x00FC0000 + add r12, #GBA_ADDR_TO_DS_HIGH + add r12, #GBA_ADDR_TO_DS_LOW orr r1, #(1 << 4) //valid flag mov r0, #0x80000000 //load bit + segment 0 diff --git a/arm9/source/setup.s b/arm9/source/setup.s index 55226f0..610dcf1 100644 --- a/arm9/source/setup.s +++ b/arm9/source/setup.s @@ -465,28 +465,50 @@ instruction_abort_handler: #ifdef ABT_NO_FIQ msr cpsr_c, #0xD7 //immediately disable fiqs #endif - cmp lr, #0x08000000 - blt instruction_abort_handler_error - cmp lr, #0x0E000000 - bge instruction_abort_handler_error -instruction_abort_handler_cont: #ifdef ENABLE_HICODE - //cmp lr, #ROM_ADDRESS_MAX - //blt 1f + sub lr, #4 + cmp lr, #0x08000000 + blo instruction_abort_handler_error_2 + cmp lr, #0x0C000000 + blo instruction_abort_handler_gba_rom_abs + cmp lr, #0x0F000000 + blo instruction_abort_handler_gba_rom_rel + b instruction_abort_handler_error_2 + +instruction_abort_handler_gba_rom_abs: + cmp lr, #ROM_ADDRESS_MAX + blo instruction_abort_handler_gba_rom_mainmem + mcr p15, 0, r13, c5, c0, 0 add r13, #1 add r13, #(16 * 1024) push {r0-r3,r12,lr} - sub r0, lr, #4 + mov r0, lr bl hic_mapCode ldr lr,= pu_data_permissions mcr p15, 0, lr, c5, c0, 2 pop {r0-r3,r12,lr} sub r13, #(16 * 1024) sub r13, #1 - subs pc, lr, #4 -1: -#endif + movs pc, lr + +instruction_abort_handler_gba_rom_mainmem: + bic lr, #0x06000000 + add lr, #GBA_ADDR_TO_DS_HIGH + add lr, #GBA_ADDR_TO_DS_LOW + movs pc, lr + +instruction_abort_handler_gba_rom_rel: + sub lr, #GBA_ADDR_TO_DS_HIGH + sub lr, #GBA_ADDR_TO_DS_LOW + b instruction_abort_handler_gba_rom_abs + +#else + cmp lr, #0x08000000 + blt instruction_abort_handler_error + cmp lr, #0x0E000000 + bge instruction_abort_handler_error +instruction_abort_handler_cont: bic lr, #0x06000000 add lr, #GBA_ADDR_TO_DS_HIGH add lr, #GBA_ADDR_TO_DS_LOW @@ -513,6 +535,7 @@ instruction_abort_handler_error_cont: movlt lr, r12 ldrlt r12, [r13, #1] blt instruction_abort_handler_cont +#endif instruction_abort_handler_error_2: #ifdef ABT_NO_FIQ msr cpsr_c, #0x97 //enable fiqs diff --git a/common/common_defs.s b/common/common_defs.s index 87b0058..d87caec 100644 --- a/common/common_defs.s +++ b/common/common_defs.s @@ -22,31 +22,20 @@ #define SD_CACHE_SIZE (1424 * 1024) #define GBARUNNER_DATA_SIZE 0x1C0000 +#define SAVE_DATA_SIZE 0x20000 -#ifdef USE_3DS_32MB +#if defined(USE_DSI_16MB) || defined(USE_3DS_32MB) +#define MAIN_MEMORY_ADDRESS_GBARUNNER_DATA (MAIN_MEMORY_BASE + 0x00040000) #define MAIN_MEMORY_ADDRESS_ROM_DATA (MAIN_MEMORY_BASE + 0x00040000 + GBARUNNER_DATA_SIZE) +#define MAIN_MEMORY_ADDRESS_SAVE_DATA (MAIN_MEMORY_ADDRESS_GBARUNNER_DATA + GBARUNNER_DATA_SIZE - SAVE_DATA_SIZE) +#define ROM_DATA_LENGTH (MAIN_MEMORY_END - MAIN_MEMORY_ADDRESS_ROM_DATA) #else #define MAIN_MEMORY_ADDRESS_ROM_DATA (MAIN_MEMORY_BASE + 0x00040000) -#endif - -#if defined(USE_DSI_16MB) -#define MAIN_MEMORY_ADDRESS_GBARUNNER_DATA (MAIN_MEMORY_BASE + 0x00E40000) -#elif defined(USE_3DS_32MB) -#define MAIN_MEMORY_ADDRESS_GBARUNNER_DATA (MAIN_MEMORY_BASE + 0x00040000) -#else #define MAIN_MEMORY_ADDRESS_GBARUNNER_DATA (MAIN_MEMORY_BASE + 0x00240000) -#endif -#define SAVE_DATA_SIZE 0x20000 -#ifdef USE_3DS_32MB -#define MAIN_MEMORY_ADDRESS_SAVE_DATA (MAIN_MEMORY_ADDRESS_GBARUNNER_DATA + GBARUNNER_DATA_SIZE - SAVE_DATA_SIZE) -#else #define MAIN_MEMORY_ADDRESS_SAVE_DATA (MAIN_MEMORY_END - SAVE_DATA_SIZE) -#endif -#ifdef USE_3DS_32MB -#define ROM_DATA_LENGTH (MAIN_MEMORY_END - MAIN_MEMORY_ADDRESS_ROM_DATA) -#else #define ROM_DATA_LENGTH (MAIN_MEMORY_ADDRESS_GBARUNNER_DATA - MAIN_MEMORY_ADDRESS_ROM_DATA) #endif + #define ROM_ADDRESS_MAX (0x08000000 + ROM_DATA_LENGTH) #define GBA_ADDR_TO_DS_HIGH ((MAIN_MEMORY_ADDRESS_ROM_DATA - 0x08000000) & 0xFF000000)