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SPI Interfaces Limited to 8bit words #24

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SkydiverTricky opened this issue Jan 3, 2025 · 1 comment
Open

SPI Interfaces Limited to 8bit words #24

SkydiverTricky opened this issue Jan 3, 2025 · 1 comment

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@SkydiverTricky
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The SPI Interfaces in OSVVM are locked to 8 bit byes for transmitting over SPI:

https://github.com/OSVVM/SPI_GuyEschemann/blob/77d1e30c494d0e6032918cde70c179a5b575976a/src/SpiTbPkg.vhd

It is pretty common in SPI interfaces to use an interface that is not a multiple of bytes - see this chip for example - it uses 18 bit words.

https://www.analog.com/media/en/technical-documentation/data-sheets/AD7674.pdf

Ideally, the SPIRecType could simply keep the word size open, so that the size is set either by a generic on the Controller/Peripheral entity, or by using the word size of the DataToModel/DataFromModel record when the transaction interface is connected to the VC.

@JimLewis
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JimLewis commented Jan 3, 2025

Yes that should be fixed. Maybe it should also have one of the packages to simplify instancing the signals - like was done recently for AXI Stream and Full.

I would do a partially constrained array, but I will have to check and see which simulators support that and which do not. It may not be supported by enough main stream simulators. I want to make sure OSVVM supports many simulators - and if they are commercial including older versions. OTOH for GHDL (which may be the one that did not support it) and NVC, I expect people to get the current version if an older version is broken.

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