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test-case-controller.kicad_pcb
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test-case-controller.kicad_pcb
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(kicad_pcb (version 20171130) (host pcbnew "(5.1.0)-1")
(general
(thickness 1.6)
(drawings 66)
(tracks 1073)
(zones 0)
(modules 155)
(nets 95)
)
(page A4)
(title_block
(title "Test-Case Controller")
(date 2021-04-10)
(rev V1.0)
(company PinBus)
(comment 4 "Design by Thomas Gravekamp")
)
(layers
(0 F.Cu signal)
(31 B.Cu signal)
(32 B.Adhes user hide)
(33 F.Adhes user hide)
(34 B.Paste user hide)
(35 F.Paste user)
(36 B.SilkS user)
(37 F.SilkS user)
(38 B.Mask user)
(39 F.Mask user)
(40 Dwgs.User user hide)
(41 Cmts.User user hide)
(42 Eco1.User user hide)
(43 Eco2.User user hide)
(44 Edge.Cuts user)
(45 Margin user hide)
(46 B.CrtYd user hide)
(47 F.CrtYd user)
(48 B.Fab user hide)
(49 F.Fab user hide)
)
(setup
(last_trace_width 0.25)
(user_trace_width 0.75)
(trace_clearance 0.2)
(zone_clearance 0.508)
(zone_45_only no)
(trace_min 0.2)
(via_size 0.8)
(via_drill 0.4)
(via_min_size 0.4)
(via_min_drill 0.3)
(uvia_size 0.3)
(uvia_drill 0.1)
(uvias_allowed no)
(uvia_min_size 0.2)
(uvia_min_drill 0.1)
(edge_width 0.05)
(segment_width 0.2)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.12)
(mod_text_size 1 1)
(mod_text_width 0.15)
(pad_size 1.524 1.524)
(pad_drill 0.762)
(pad_to_mask_clearance 0.051)
(solder_mask_min_width 0.25)
(aux_axis_origin 0 0)
(visible_elements 7FFFFFFF)
(pcbplotparams
(layerselection 0x010f8_ffffffff)
(usegerberextensions false)
(usegerberattributes false)
(usegerberadvancedattributes false)
(creategerberjobfile false)
(excludeedgelayer false)
(linewidth 0.150000)
(plotframeref false)
(viasonmask false)
(mode 1)
(useauxorigin false)
(hpglpennumber 1)
(hpglpenspeed 20)
(hpglpendiameter 15.000000)
(psnegative false)
(psa4output false)
(plotreference true)
(plotvalue true)
(plotinvisibletext false)
(padsonsilk false)
(subtractmaskfromsilk false)
(outputformat 4)
(mirror false)
(drillshape 0)
(scaleselection 1)
(outputdirectory "plots/pdf/"))
)
(net 0 "")
(net 1 GND)
(net 2 +5V)
(net 3 PC6-xx-RESET)
(net 4 +48V)
(net 5 "Net-(D1-Pad2)")
(net 6 "Net-(D2-Pad2)")
(net 7 "Net-(D3-Pad2)")
(net 8 "Net-(D4-Pad2)")
(net 9 "Net-(D5-Pad2)")
(net 10 "Net-(D6-Pad2)")
(net 11 "Net-(D7-Pad2)")
(net 12 "Net-(D8-Pad2)")
(net 13 "Net-(D9-Pad2)")
(net 14 "Net-(D13-Pad1)")
(net 15 "Net-(D10-Pad1)")
(net 16 "Net-(D10-Pad2)")
(net 17 "Net-(D11-Pad1)")
(net 18 "Net-(D11-Pad2)")
(net 19 "Net-(D12-Pad1)")
(net 20 "Net-(D15-Pad2)")
(net 21 "Net-(D19-Pad2)")
(net 22 "Net-(D23-Pad2)")
(net 23 PB4-12-MISO)
(net 24 PB5-13-SCK)
(net 25 PB3-11-MOSI)
(net 26 PC5-A5-SCL)
(net 27 PC4-A4-SDA)
(net 28 PD0-00-RXD)
(net 29 PD1-01-TXD)
(net 30 PB0-08)
(net 31 PB1-09)
(net 32 PB2-10-SS)
(net 33 PC0-A0)
(net 34 PC1-A1)
(net 35 PC2-A2)
(net 36 PC3-A3)
(net 37 ADC6-A6)
(net 38 ADC7-A7)
(net 39 PD7-07)
(net 40 PD6-06)
(net 41 PD5-05)
(net 42 PD4-04)
(net 43 PD3-03-INT1)
(net 44 PD2-02-INT0)
(net 45 "/Mainboard PCA9685/LED8")
(net 46 "/Mainboard PCA9685/LED9")
(net 47 "/Mainboard PCA9685/LED10")
(net 48 "/Mainboard PCA9685/LED11")
(net 49 "/Mainboard PCA9685/LED12")
(net 50 "/Mainboard PCA9685/LED13")
(net 51 "/Mainboard PCA9685/LED14")
(net 52 "/Mainboard PCA9685/LED15")
(net 53 LED0)
(net 54 LED1)
(net 55 LED2)
(net 56 LED4)
(net 57 LED5)
(net 58 LED6)
(net 59 LED7)
(net 60 "/Mainboard PCA9685/A0")
(net 61 "/Mainboard PCA9685/A1")
(net 62 "/Mainboard PCA9685/A2")
(net 63 "/Mainboard PCA9685/A3")
(net 64 "/Mainboard PCA9685/A4")
(net 65 "/Mainboard PCA9685/A5")
(net 66 PB6-xx-XTAL1)
(net 67 PB7-xx-XTAL2)
(net 68 LED3)
(net 69 "Net-(D8-Pad1)")
(net 70 "Net-(D14-Pad1)")
(net 71 "Net-(D15-Pad1)")
(net 72 "Net-(D16-Pad1)")
(net 73 "Net-(D17-Pad1)")
(net 74 "Net-(D18-Pad1)")
(net 75 "Net-(D19-Pad1)")
(net 76 "Net-(D20-Pad1)")
(net 77 "Net-(D21-Pad1)")
(net 78 "Net-(D22-Pad1)")
(net 79 "Net-(D23-Pad1)")
(net 80 "Net-(D24-Pad1)")
(net 81 "Net-(D25-Pad1)")
(net 82 "Net-(D26-Pad1)")
(net 83 "Net-(JP3-Pad2)")
(net 84 "Net-(JP4-Pad2)")
(net 85 "Net-(JP5-Pad2)")
(net 86 "Net-(JP6-Pad2)")
(net 87 "Net-(Q1-Pad1)")
(net 88 "Net-(Q2-Pad1)")
(net 89 "Net-(Q3-Pad1)")
(net 90 "Net-(Q4-Pad1)")
(net 91 "Net-(Q5-Pad1)")
(net 92 "Net-(Q6-Pad1)")
(net 93 "Net-(Q7-Pad1)")
(net 94 "Net-(Q8-Pad1)")
(net_class Default "Dit is de standaard class."
(clearance 0.2)
(trace_width 0.25)
(via_dia 0.8)
(via_drill 0.4)
(uvia_dia 0.3)
(uvia_drill 0.1)
(add_net +5V)
(add_net "/Mainboard PCA9685/A0")
(add_net "/Mainboard PCA9685/A1")
(add_net "/Mainboard PCA9685/A2")
(add_net "/Mainboard PCA9685/A3")
(add_net "/Mainboard PCA9685/A4")
(add_net "/Mainboard PCA9685/A5")
(add_net "/Mainboard PCA9685/LED10")
(add_net "/Mainboard PCA9685/LED11")
(add_net "/Mainboard PCA9685/LED12")
(add_net "/Mainboard PCA9685/LED13")
(add_net "/Mainboard PCA9685/LED14")
(add_net "/Mainboard PCA9685/LED15")
(add_net "/Mainboard PCA9685/LED8")
(add_net "/Mainboard PCA9685/LED9")
(add_net ADC6-A6)
(add_net ADC7-A7)
(add_net GND)
(add_net LED0)
(add_net LED1)
(add_net LED2)
(add_net LED3)
(add_net LED4)
(add_net LED5)
(add_net LED6)
(add_net LED7)
(add_net "Net-(D1-Pad2)")
(add_net "Net-(D11-Pad1)")
(add_net "Net-(D11-Pad2)")
(add_net "Net-(D12-Pad1)")
(add_net "Net-(D13-Pad1)")
(add_net "Net-(D14-Pad1)")
(add_net "Net-(D15-Pad1)")
(add_net "Net-(D15-Pad2)")
(add_net "Net-(D16-Pad1)")
(add_net "Net-(D17-Pad1)")
(add_net "Net-(D18-Pad1)")
(add_net "Net-(D19-Pad1)")
(add_net "Net-(D19-Pad2)")
(add_net "Net-(D2-Pad2)")
(add_net "Net-(D20-Pad1)")
(add_net "Net-(D21-Pad1)")
(add_net "Net-(D22-Pad1)")
(add_net "Net-(D23-Pad1)")
(add_net "Net-(D23-Pad2)")
(add_net "Net-(D24-Pad1)")
(add_net "Net-(D25-Pad1)")
(add_net "Net-(D26-Pad1)")
(add_net "Net-(JP3-Pad2)")
(add_net "Net-(JP4-Pad2)")
(add_net "Net-(JP5-Pad2)")
(add_net "Net-(JP6-Pad2)")
(add_net "Net-(Q1-Pad1)")
(add_net "Net-(Q2-Pad1)")
(add_net "Net-(Q3-Pad1)")
(add_net "Net-(Q4-Pad1)")
(add_net "Net-(Q5-Pad1)")
(add_net "Net-(Q6-Pad1)")
(add_net "Net-(Q7-Pad1)")
(add_net "Net-(Q8-Pad1)")
(add_net PB0-08)
(add_net PB1-09)
(add_net PB2-10-SS)
(add_net PB3-11-MOSI)
(add_net PB4-12-MISO)
(add_net PB5-13-SCK)
(add_net PB6-xx-XTAL1)
(add_net PB7-xx-XTAL2)
(add_net PC0-A0)
(add_net PC1-A1)
(add_net PC2-A2)
(add_net PC3-A3)
(add_net PC4-A4-SDA)
(add_net PC5-A5-SCL)
(add_net PC6-xx-RESET)
(add_net PD0-00-RXD)
(add_net PD1-01-TXD)
(add_net PD2-02-INT0)
(add_net PD3-03-INT1)
(add_net PD4-04)
(add_net PD5-05)
(add_net PD6-06)
(add_net PD7-07)
)
(net_class +48V ""
(clearance 0.4)
(trace_width 1.5)
(via_dia 0.8)
(via_drill 0.4)
(uvia_dia 0.3)
(uvia_drill 0.1)
(add_net +48V)
(add_net "Net-(D10-Pad1)")
(add_net "Net-(D10-Pad2)")
(add_net "Net-(D3-Pad2)")
(add_net "Net-(D4-Pad2)")
(add_net "Net-(D5-Pad2)")
(add_net "Net-(D6-Pad2)")
(add_net "Net-(D7-Pad2)")
(add_net "Net-(D8-Pad1)")
(add_net "Net-(D8-Pad2)")
(add_net "Net-(D9-Pad2)")
)
(module Symbol:OSHW-Logo2_14.6x12mm_SilkScreen (layer B.Cu) (tedit 0) (tstamp 607228FA)
(at 29.05 79.75 180)
(descr "Open Source Hardware Symbol")
(tags "Logo Symbol OSHW")
(attr virtual)
(fp_text reference REF** (at 0 0 180) (layer B.SilkS) hide
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
(fp_text value OSHW-Logo2_14.6x12mm_SilkScreen (at 0.75 0 180) (layer B.Fab) hide
(effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
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(module Package_TO_SOT_THT:TO-220-3_Horizontal_TabDown (layer F.Cu) (tedit 5AC8BA0D) (tstamp 60672F28)
(at 101.25 88.5)
(descr "TO-220-3, Horizontal, RM 2.54mm, see https://www.vishay.com/docs/66542/to-220-1.pdf")
(tags "TO-220-3 Horizontal RM 2.54mm")
(path /607D19A4/6081AA09)
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(net 94 "Net-(Q8-Pad1)"))
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(net 16 "Net-(D10-Pad2)"))
(pad 3 thru_hole oval (at 5.08 0) (size 1.905 2) (drill 1.1) (layers *.Cu *.Mask)
(net 1 GND))
(model ${KISYS3DMOD}/Package_TO_SOT_THT.3dshapes/TO-220-3_Horizontal_TabDown.wrl
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(rotate (xyz 0 0 0))
)
)
(module Capacitor_THT:CP_Radial_D10.0mm_P5.00mm (layer F.Cu) (tedit 5AE50EF1) (tstamp 606799A1)
(at 62.25 107 270)
(descr "CP, Radial series, Radial, pin pitch=5.00mm, , diameter=10mm, Electrolytic Capacitor")
(tags "CP Radial series Radial pin pitch 5.00mm diameter 10mm Electrolytic Capacitor")
(path /605AEFDD/606C16F1)
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(module Connector_PinHeader_2.54mm:PinHeader_1x08_P2.54mm_Vertical (layer F.Cu) (tedit 59FED5CC) (tstamp 605FF5FC)
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(descr "Through hole straight pin header, 1x08, 2.54mm pitch, single row")
(tags "Through hole pin header THT 1x08 2.54mm single row")
(path /605B13F8/605FF76A)
(fp_text reference J4 (at 2.25 0) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value "Pin header 01x08" (at 0 20.11 270) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 8.89) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.8 19.55) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.8 19.55) (end 1.8 19.55) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.8 -1.8) (end -1.8 19.55) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
(fp_line (start 1.33 1.27) (end 1.33 19.11) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 1.27) (end -1.33 19.11) (layer F.SilkS) (width 0.12))
(fp_line (start -1.33 19.11) (end 1.33 19.11) (layer F.SilkS) (width 0.12))
(fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start -1.27 19.05) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
(fp_line (start 1.27 19.05) (end -1.27 19.05) (layer F.Fab) (width 0.1))
(fp_line (start 1.27 -1.27) (end 1.27 19.05) (layer F.Fab) (width 0.1))
(fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
(pad 8 thru_hole oval (at 0 17.78 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 39 PD7-07))
(pad 7 thru_hole oval (at 0 15.24 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 40 PD6-06))
(pad 6 thru_hole oval (at 0 12.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 41 PD5-05))
(pad 5 thru_hole oval (at 0 10.16 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 42 PD4-04))
(pad 4 thru_hole oval (at 0 7.62 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 43 PD3-03-INT1))
(pad 3 thru_hole oval (at 0 5.08 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 44 PD2-02-INT0))
(pad 2 thru_hole oval (at 0 2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 29 PD1-01-TXD))
(pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 28 PD0-00-RXD))
(model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x08_P2.54mm_Vertical.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Jumper:SolderJumper-2_P1.3mm_Open_TrianglePad1.0x1.5mm (layer F.Cu) (tedit 5A64794F) (tstamp 605FFD73)
(at 68.5 20.025 270)
(descr "SMD Solder Jumper, 1x1.5mm Triangular Pads, 0.3mm gap, open")
(tags "solder jumper open")
(path /606CA42C/607E5C9F)
(attr virtual)
(fp_text reference JP6 (at 2.225 0) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value SolderJumper_2_Open (at 0 1.9 270) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.4 1) (end -1.4 -1) (layer F.SilkS) (width 0.12))
(fp_line (start 1.4 1) (end -1.4 1) (layer F.SilkS) (width 0.12))
(fp_line (start 1.4 -1) (end 1.4 1) (layer F.SilkS) (width 0.12))
(fp_line (start -1.4 -1) (end 1.4 -1) (layer F.SilkS) (width 0.12))
(fp_line (start -1.65 -1.25) (end 1.65 -1.25) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.65 -1.25) (end -1.65 1.25) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.65 1.25) (end 1.65 -1.25) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.65 1.25) (end -1.65 1.25) (layer F.CrtYd) (width 0.05))
(pad 2 smd custom (at 0.725 0 270) (size 0.3 0.3) (layers F.Cu F.Mask)
(net 86 "Net-(JP6-Pad2)") (zone_connect 2)
(options (clearance outline) (anchor rect))
(primitives
(gr_poly (pts
(xy -0.65 -0.75) (xy 0.5 -0.75) (xy 0.5 0.75) (xy -0.65 0.75) (xy -0.15 0)
) (width 0))
))
(pad 1 smd custom (at -0.725 0 270) (size 0.3 0.3) (layers F.Cu F.Mask)
(net 39 PD7-07) (zone_connect 2)
(options (clearance outline) (anchor rect))
(primitives
(gr_poly (pts
(xy -0.5 -0.75) (xy 0.5 -0.75) (xy 1 0) (xy 0.5 0.75) (xy -0.5 0.75)
) (width 0))
))
)
(module Connector_JST:JST_XH_B2B-XH-A_1x02_P2.50mm_Vertical (layer F.Cu) (tedit 5C28146C) (tstamp 606724EA)
(at 37.5 64.5)
(descr "JST XH series connector, B2B-XH-A (http://www.jst-mfg.com/product/pdf/eng/eXH.pdf), generated with kicad-footprint-generator")
(tags "connector JST XH vertical")
(path /6076D1AF/607839DF)
(fp_text reference LED2 (at 1.25 -3.55) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value "JST XH 2.50 01x02" (at 1.25 4.6) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -2.45 -2.35) (end -2.45 3.4) (layer F.Fab) (width 0.1))
(fp_line (start -2.45 3.4) (end 4.95 3.4) (layer F.Fab) (width 0.1))
(fp_line (start 4.95 3.4) (end 4.95 -2.35) (layer F.Fab) (width 0.1))
(fp_line (start 4.95 -2.35) (end -2.45 -2.35) (layer F.Fab) (width 0.1))
(fp_line (start -2.56 -2.46) (end -2.56 3.51) (layer F.SilkS) (width 0.12))
(fp_line (start -2.56 3.51) (end 5.06 3.51) (layer F.SilkS) (width 0.12))
(fp_line (start 5.06 3.51) (end 5.06 -2.46) (layer F.SilkS) (width 0.12))
(fp_line (start 5.06 -2.46) (end -2.56 -2.46) (layer F.SilkS) (width 0.12))
(fp_line (start -2.95 -2.85) (end -2.95 3.9) (layer F.CrtYd) (width 0.05))
(fp_line (start -2.95 3.9) (end 5.45 3.9) (layer F.CrtYd) (width 0.05))
(fp_line (start 5.45 3.9) (end 5.45 -2.85) (layer F.CrtYd) (width 0.05))
(fp_line (start 5.45 -2.85) (end -2.95 -2.85) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.625 -2.35) (end 0 -1.35) (layer F.Fab) (width 0.1))
(fp_line (start 0 -1.35) (end 0.625 -2.35) (layer F.Fab) (width 0.1))
(fp_line (start 0.75 -2.45) (end 0.75 -1.7) (layer F.SilkS) (width 0.12))
(fp_line (start 0.75 -1.7) (end 1.75 -1.7) (layer F.SilkS) (width 0.12))
(fp_line (start 1.75 -1.7) (end 1.75 -2.45) (layer F.SilkS) (width 0.12))
(fp_line (start 1.75 -2.45) (end 0.75 -2.45) (layer F.SilkS) (width 0.12))
(fp_line (start -2.55 -2.45) (end -2.55 -1.7) (layer F.SilkS) (width 0.12))
(fp_line (start -2.55 -1.7) (end -0.75 -1.7) (layer F.SilkS) (width 0.12))
(fp_line (start -0.75 -1.7) (end -0.75 -2.45) (layer F.SilkS) (width 0.12))
(fp_line (start -0.75 -2.45) (end -2.55 -2.45) (layer F.SilkS) (width 0.12))
(fp_line (start 3.25 -2.45) (end 3.25 -1.7) (layer F.SilkS) (width 0.12))
(fp_line (start 3.25 -1.7) (end 5.05 -1.7) (layer F.SilkS) (width 0.12))