FPGA bug list

[msalinoh]

These 2 FPGA bugs are currently accounted for in the pi software, but posting here so they are documented (and eventually resolved).

• first byte of audio FIFO buffer needs to be flushed on reset.
• first audio config write CAM command does not get applied to the ADC.

[MattCummings0517]

For the audio side, I'm not sure we can avoid the first byte flushing problem, this may be more of how the SPI RX buffer on the Pi side works. There is always exactly one garbage byte at the beginning. Since the data comes across as the 3 16-bit channels interleaved, this one byte wreaks havoc in the data ordering. If it were only one channel, this would not be an issue.

For the ADC, I believe the issue is almost the same (FPGA talks to ADC via a SPI link as well - this interface is bridge to the Pi by the CAM protocol) . But in this case, it would be possible for the FPGA to proactively establish the SPI connection by priming it with a dummy load in advance of the first CAM.