Skip to content

Latest commit

 

History

History
107 lines (92 loc) · 4.79 KB

PE507-Formal-System-Verification.org

File metadata and controls

107 lines (92 loc) · 4.79 KB

<<<PE507>>> FORMAL SYSTEM VERIFICATION

{{{credits}}}

LTPC
3003

COURSE OBJECTIVES

  • To understand the need of logics for specification and verification of computer systems
  • To learn program correctness using Hoare Logic
  • To learn the skill of writing formal specifications in LTL and CTL
  • To learn model checking algorithms for LTL and CTL
  • To learn model checking for Timed Systems.

{{{unit}}}

UNIT IFOUNDATIONS9

Propositional Logic: Syntax – Semantics – Natural deduction; Predicate Logic: Syntax – Semantics – Natural deduction; Linear-time Temporal Logic: Syntax – Semantics – Specifications in LTL; Branching-time Logic: Syntax – Semantics – Specifications in CTL; CTL* and the expressive powers of LTL and CTL.

{{{unit}}}

UNIT IIHOARE LOGIC AND PROGRAM CORRECTNESS9

A Framework for Program Correctness: A core programming language – Hoare triples – Partial and total correctness – Program variables and logical variables; Proof Calculus for Partial Correctness: Proof rules – Proof tableaux; Proof Calculus for Total Correctness.

{{{unit}}}

UNIT IIIMODEL CHECKING9

Model-checking Algorithms: The CTL model-checking algorithm – CTL model checking with fairness – The LTL model-checking algorithm; CTL* Model-checking Algorithm; Model Checking using Automata; Checking Emptiness; Translating LTL into Automata; On-the-fly Model checking.

{{{unit}}}

UNIT IVSYMBOLIC MODEL CHECKING9

Binary Decision Diagrams: Representing Boolean formulas – Representing Kripke structures; Fixpoint Representations; Symbolic Model Checking for CTL; Fairness in Symbolic Model Checking; Counterexamples and Witnesses; Relational Product Computations; Symbolic Model Checking for LTL; NuSMV.

{{{unit}}}

UNIT VMODEL CHECKING TIMED SYSTEMS9

Timed Automata: Semantics – Time divergence – Timelock – Zenoness; Timed Computation Tree Logic; TCTL Model Checking: Eliminating timing parameters – Region transition systems – The TCTL model-checking algorithm; Model checkers for Timed Automata: UPPAAL – KRONOS.

\hfill Total Periods: 45

COURSE OUTCOMES

After the completion of this course, students will be able to:

  • Explain, analyse and compare various model checking algorithms (K3)
  • Prove partial correctness of simple programs using Hoare logic (K3)
  • Write formal properties and specifications in CTL and LTL (K3)
  • Specify and verify simple systems using NuSMV (K3)
  • Specify and verify simple systems using UPPAAL (K3).

TEXTBOOKS

  1. M Huth, M Ryan, “Logic in Computer Science – Modeling and Reasoning About Systems”, 2nd Edition, Cambridge University Press, 2004. (Units I, II and III)
  2. Edmund Clarke, Orna Grumberg, Doron Peled, “Model Checking”, The MIT Press, 1999. (Units III and IV)
  3. C Baier, J Katoen, “Principles of Model Checking”, The MIT Press, 2008. (Unit V)

REFERENCES

  1. Michael Clarke, Thomas Henzinger, Helmut Veith, Roderick Bloem, “Handbook of Model Checking”, Springer 2018
  2. Orna Grumberg, Helmut Veith, “25 Years of Model Checking: History, Achievements, Perspectives” Springer-Verlag, 2008
  3. Zohar Manna, Amir Pnueli, “Temporal Verification of Reactive Systems: Safety”, Springer-Verlag, 2012
  4. Krzysztof R. Apt, Frank S. de Boer, Ernst-Rüdiger Olderog, “Verification of Sequential and Concurrent Programs”, Springer, 3rd edition, 2009

CO-PO MAPPING

PO1PO2PO3PO4PO5PO6PO7PO8PO9PO10PO11PO12PSO1PSO2PSO3
K3K6K6K6K6K6K5K6
CO1K33232
CO2K3322
CO3K3322
CO4K3322
CO5K332332
Score151033310
Course Mapping323332