From e90742c86d9aa4de9d302bdcd0802bdbbe0cf5ea Mon Sep 17 00:00:00 2001 From: Geetis <59862178+Geetis@users.noreply.github.com> Date: Tue, 5 Mar 2024 09:38:33 -0500 Subject: [PATCH 01/10] Unit test changes --- src/bin/main.rs | 12 ++- src/parser/parser_assembler_main.rs | 9 +- src/tests/emulation_core/mips.rs | 4 +- .../integration/core_parser/arithmetic.rs | 10 +- .../core_parser/basic_immediate.rs | 22 ++-- .../core_parser/basic_operations.rs | 14 +-- .../integration/core_parser/branch_jump.rs | 16 +-- .../integration/core_parser/conditions.rs | 6 +- .../core_parser/coprocessor_move.rs | 14 +-- .../core_parser/double_arithmetic.rs | 6 +- .../core_parser/double_immediate.rs | 12 ++- .../integration/core_parser/fibonacci.rs | 6 +- .../core_parser/floating_point_arithmetic.rs | 6 +- .../core_parser/floating_point_branch.rs | 6 +- .../core_parser/floating_point_comparison.rs | 6 +- src/tests/integration/core_parser/mod.rs | 7 +- .../core_parser/store_load_word.rs | 10 +- src/tests/parser/assembling.rs | 15 ++- src/tests/parser/parser_assembler_main.rs | 102 +++++++++++++----- src/tests/parser/parsing.rs | 100 +++++++++++------ .../parser/pseudo_instruction_parsing.rs | 60 +++++++---- 21 files changed, 284 insertions(+), 159 deletions(-) diff --git a/src/bin/main.rs b/src/bin/main.rs index ad143966f..5a1d6c665 100644 --- a/src/bin/main.rs +++ b/src/bin/main.rs @@ -9,7 +9,6 @@ use monaco::{ sys::{editor::IMarkerData, MarkerSeverity}, }; use std::rc::Rc; -use swim::agent::datapath_communicator::DatapathCommunicator; use swim::agent::datapath_reducer::DatapathReducer; use swim::agent::EmulationCoreAgent; use swim::emulation_core::mips::datapath::MipsDatapath; @@ -19,6 +18,10 @@ use swim::parser::parser_structs_and_enums::ProgramInfo; use swim::ui::footer::component::Footer; use swim::ui::regview::component::Regview; use swim::ui::swim_editor::component::SwimEditor; +use swim::{ + agent::datapath_communicator::DatapathCommunicator, + parser::parser_structs_and_enums::Architecture, +}; use swim::{ emulation_core::{architectures::AvailableDatapaths, mips::instruction::get_string_version}, ui::{ @@ -39,7 +42,8 @@ use yew_hooks::prelude::*; // To load in the Fibonacci example, uncomment the CONTENT and fib_model lines // and comment the code, language, and text_model lines. IMPORTANT: // rename fib_model to text_model to have it work. -const CONTENT: &str = include_str!("../../static/assembly_examples/floating_point.asm"); +const CONTENT: &str = include_str!("../../static/assembly_examples/riscv_test.asm"); +const ARCH: Architecture = Architecture::RISCV; #[derive(Properties, Clone, PartialEq)] struct AppProps { @@ -130,7 +134,7 @@ fn app(props: &AppProps) -> Html { let text_model = text_model.clone(); let memory_text_model = memory_text_model.clone(); // parses through the code to assemble the binary and retrieves programinfo for error marking and mouse hover - let (program_info, assembled) = parser(text_model.get_value()); + let (program_info, assembled) = parser(text_model.get_value(), ARCH); *program_info_ref.borrow_mut() = program_info.clone(); *binary_ref.borrow_mut() = assembled.clone(); pc_limit.set(assembled.len() * 4); @@ -405,7 +409,7 @@ fn app(props: &AppProps) -> Html { } // Update the parsed info for text and data segment views - let (program_info, _) = parser(text_model.get_value()); + let (program_info, _) = parser(text_model.get_value(), ARCH); *program_info_ref.borrow_mut() = program_info; trigger.force_update(); diff --git a/src/parser/parser_assembler_main.rs b/src/parser/parser_assembler_main.rs index b345be4ea..5d91bec37 100644 --- a/src/parser/parser_assembler_main.rs +++ b/src/parser/parser_assembler_main.rs @@ -13,10 +13,7 @@ use gloo_console::log; ///Parser is the starting function of the parser / assembler process. It takes a string representation of a MIPS /// program and builds the binary of the instructions while cataloging any errors that are found. -pub fn parser(file_string: String) -> (ProgramInfo, Vec) { - // Force MIPS to pass unit tests until I change the function arguments for SWIMv1 test cases`` - let arch = Architecture::MIPS; - +pub fn parser(file_string: String, arch: Architecture) -> (ProgramInfo, Vec) { if arch == Architecture::MIPS { let mut program_info = ProgramInfo { monaco_line_info: tokenize_program(file_string), @@ -2574,9 +2571,7 @@ pub fn read_instructions_riscv( monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); } } - "jal" => - // Finish J instructions - { + "jal" => { log!("jal instruction"); log!( "Instruction Binary: ", diff --git a/src/tests/emulation_core/mips.rs b/src/tests/emulation_core/mips.rs index 9483e3260..47822084a 100644 --- a/src/tests/emulation_core/mips.rs +++ b/src/tests/emulation_core/mips.rs @@ -6,7 +6,7 @@ use crate::emulation_core::mips::registers::GpRegisterType; pub mod api { use super::*; - use crate::parser::parser_assembler_main::parser; + use crate::parser::{parser_assembler_main::parser, parser_structs_and_enums::Architecture}; #[test] fn reset_datapath() -> Result<(), String> { @@ -14,7 +14,7 @@ pub mod api { // Add instruction into emulation core memory. let instruction = String::from("ori $s0, $zero, 5"); - let (_, instruction_bits) = parser(instruction); + let (_, instruction_bits) = parser(instruction, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.execute_instruction(); diff --git a/src/tests/integration/core_parser/arithmetic.rs b/src/tests/integration/core_parser/arithmetic.rs index bf09ce6f0..32368eec6 100644 --- a/src/tests/integration/core_parser/arithmetic.rs +++ b/src/tests/integration/core_parser/arithmetic.rs @@ -1,5 +1,7 @@ //! Tests for additional arithmetic instructions: addu, sll, move, nop. +use crate::parser::parser_structs_and_enums::Architecture; + use super::*; #[test] @@ -8,7 +10,7 @@ fn basic_addu() -> Result<(), String> { let instructions = String::from("addu r20, r19, r18"); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[18] = 6849841; @@ -32,7 +34,7 @@ fn basic_sll() -> Result<(), String> { sll $s1, $s1, 3"#, ); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; while !datapath.is_halted() { @@ -53,7 +55,7 @@ fn basic_move() -> Result<(), String> { move $s5, $s4"#, ); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; while !datapath.is_halted() { @@ -71,7 +73,7 @@ fn basic_nop() -> Result<(), String> { let instructions = String::from(r#"nop"#); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; let mut expected_registers = datapath.registers; diff --git a/src/tests/integration/core_parser/basic_immediate.rs b/src/tests/integration/core_parser/basic_immediate.rs index 46ca3a88e..3b5078f35 100644 --- a/src/tests/integration/core_parser/basic_immediate.rs +++ b/src/tests/integration/core_parser/basic_immediate.rs @@ -2,6 +2,8 @@ //! //! Note that some of these instructions are pseudo-instructions. +use crate::parser::parser_structs_and_enums::Architecture; + use super::*; #[test] @@ -10,7 +12,7 @@ fn basic_addi() -> Result<(), String> { let instructions = String::from("addi r11, r15, 2"); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[15] = 100; @@ -30,7 +32,7 @@ fn basic_addiu() -> Result<(), String> { let instructions = String::from("addiu r14, r17, 5"); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[17] = 500; @@ -50,7 +52,7 @@ fn basic_subi() -> Result<(), String> { let instructions = String::from("subi r11, r15, 2"); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[15] = 100; @@ -70,7 +72,7 @@ fn basic_muli() -> Result<(), String> { let instructions = String::from("muli r11, r15, 2"); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[15] = 100; @@ -90,7 +92,7 @@ fn basic_divi() -> Result<(), String> { let instructions = String::from("divi r11, r15, 2"); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[15] = 100; @@ -110,7 +112,7 @@ fn basic_ori() -> Result<(), String> { let instructions = String::from("ori r11, r15, 2"); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[15] = 100; @@ -130,7 +132,7 @@ fn basic_andi() -> Result<(), String> { let instructions = String::from("andi r11, r15, 4"); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[15] = 100; @@ -150,7 +152,7 @@ fn basic_li() -> Result<(), String> { let instructions = String::from("li r15, 56"); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; while !datapath.is_halted() { @@ -169,7 +171,7 @@ fn basic_lui() -> Result<(), String> { // 65530 == 0xFFFA let instructions = String::from("lui r20, 65530"); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; while !datapath.is_halted() { @@ -189,7 +191,7 @@ fn basic_aui() -> Result<(), String> { // 4612 == 0x1204 let instructions = String::from("aui r15, r18, 4612"); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[18] = 0x0000_0000_0030_ABCD; diff --git a/src/tests/integration/core_parser/basic_operations.rs b/src/tests/integration/core_parser/basic_operations.rs index 4ea6f6728..0f3ce09ce 100644 --- a/src/tests/integration/core_parser/basic_operations.rs +++ b/src/tests/integration/core_parser/basic_operations.rs @@ -1,5 +1,7 @@ //! Covering the basic arithmetic instructions: add, sub, mul, div, or, and. +use crate::parser::parser_structs_and_enums::Architecture; + use super::*; #[test] @@ -8,7 +10,7 @@ fn basic_add() -> Result<(), String> { let instructions = String::from("add r11, r7, r8"); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[7] = 51; @@ -29,7 +31,7 @@ fn basic_sub() -> Result<(), String> { let instructions = String::from("sub r12, r7, r8"); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[7] = 51; @@ -50,7 +52,7 @@ fn basic_mul() -> Result<(), String> { let instructions = String::from("mul r13, r7, r8"); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[7] = 51; @@ -71,7 +73,7 @@ fn basic_div() -> Result<(), String> { let instructions = String::from("div r14, r7, r8"); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[7] = 51; @@ -92,7 +94,7 @@ fn basic_or() -> Result<(), String> { let instructions = String::from("or r15, r7, r8"); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[7] = 51; @@ -113,7 +115,7 @@ fn basic_and() -> Result<(), String> { let instructions = String::from("and r16, r7, r8"); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[7] = 51; diff --git a/src/tests/integration/core_parser/branch_jump.rs b/src/tests/integration/core_parser/branch_jump.rs index 0cbbcedd5..bc963a1fb 100644 --- a/src/tests/integration/core_parser/branch_jump.rs +++ b/src/tests/integration/core_parser/branch_jump.rs @@ -1,5 +1,7 @@ //! Tests for the branch and jump instructions: j, jr, jal, jalr, beq, bne +use crate::parser::parser_structs_and_enums::Architecture; + use super::*; #[test] @@ -16,7 +18,7 @@ loop: daddu $s1, $s1, $s0 j loop"#, ); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; // Execute the ori instruction. @@ -44,7 +46,7 @@ fn basic_jr() -> Result<(), String> { jr r15"#, ); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; // Execute 2 instructions. @@ -69,7 +71,7 @@ syscall function: ori $t0, $zero, 5831"#, ); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; while !datapath.is_halted() { @@ -95,7 +97,7 @@ or $zero, $zero, $zero function: ori $t1, $zero, 9548"#, ); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; // Execute 3 instructions. @@ -144,7 +146,7 @@ daddiu $s2, $s2, 20 change10: daddiu $s2, $s2, 10"#, ); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; while !datapath.is_halted() { @@ -185,7 +187,7 @@ syscall changez: daddiu $s2, $s2, 20"#, ); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; while !datapath.is_halted() { @@ -217,7 +219,7 @@ daddiu $s0, $s0, 1 bne $s0, $s2, loop"#, ); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; let mut iterations = 0; diff --git a/src/tests/integration/core_parser/conditions.rs b/src/tests/integration/core_parser/conditions.rs index 774cafe66..58de55dae 100644 --- a/src/tests/integration/core_parser/conditions.rs +++ b/src/tests/integration/core_parser/conditions.rs @@ -2,6 +2,8 @@ //! //! Includes: seq, sne, slt, sltu, sle, sleu, sgt, sgtu, sge, sgeu. +use crate::parser::parser_structs_and_enums::Architecture; + use super::*; akin! { @@ -26,7 +28,7 @@ akin! { let mut datapath = MipsDatapath::default(); let instructions = String::from("*instruction_name r*destination_register, r5, r6"); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[5] = *true_value1; @@ -45,7 +47,7 @@ akin! { let mut datapath = MipsDatapath::default(); let instructions = String::from("*instruction_name r*destination_register, r5, r6"); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[5] = *false_value1; diff --git a/src/tests/integration/core_parser/coprocessor_move.rs b/src/tests/integration/core_parser/coprocessor_move.rs index bcff12b7f..26073ff92 100644 --- a/src/tests/integration/core_parser/coprocessor_move.rs +++ b/src/tests/integration/core_parser/coprocessor_move.rs @@ -1,5 +1,7 @@ //! Tests for the "move from/to Coprocessor 1" instructions: mtc1, dmtc1, mfc1, dmfc1 +use crate::parser::parser_structs_and_enums::Architecture; + use super::*; #[test] @@ -7,7 +9,7 @@ fn basic_mtc1() -> Result<(), String> { let mut datapath = MipsDatapath::default(); let instructions = String::from("mtc1 $t2, $f5"); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[10] = 658461658; // $t2 @@ -25,7 +27,7 @@ fn truncate_32_bit_mtc1() -> Result<(), String> { let mut datapath = MipsDatapath::default(); let instructions = String::from("mtc1 $t3, $f6"); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[11] = 0x0000_02F2_AC71_AC41; // $t3 @@ -43,7 +45,7 @@ fn basic_mfc1() -> Result<(), String> { let mut datapath = MipsDatapath::default(); let instructions = String::from("mfc1 $t3, $f5"); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.coprocessor.fpr[5] = 657861659; @@ -61,7 +63,7 @@ fn truncate_32_bit_mfc1() -> Result<(), String> { let mut datapath = MipsDatapath::default(); let instructions = String::from("mfc1 $t4, $f6"); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.coprocessor.fpr[6] = 0x0003_7F80_E5E7_D785; @@ -79,7 +81,7 @@ fn basic_dmtc1() -> Result<(), String> { let mut datapath = MipsDatapath::default(); let instructions = String::from("dmtc1 $t3, $f6"); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[11] = 0x0120_02F2_AC71_AC41; // $t3 @@ -97,7 +99,7 @@ fn basic_dmfc1() -> Result<(), String> { let mut datapath = MipsDatapath::default(); let instructions = String::from("dmfc1 $t4, $f6"); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.coprocessor.fpr[6] = 0x0003_7F90_E5E7_D785; diff --git a/src/tests/integration/core_parser/double_arithmetic.rs b/src/tests/integration/core_parser/double_arithmetic.rs index 9c2c46e2e..3261c5ed9 100644 --- a/src/tests/integration/core_parser/double_arithmetic.rs +++ b/src/tests/integration/core_parser/double_arithmetic.rs @@ -1,5 +1,7 @@ //! Tests for the double arithmetic instructions: dadd, dsub, dmul, ddiv, daddu, dsubu, dmulu, ddivu. +use crate::parser::parser_structs_and_enums::Architecture; + use super::*; akin! { @@ -16,7 +18,7 @@ akin! { let mut datapath = MipsDatapath::default(); let instructions = String::from(*instruction); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[16] = *value1; @@ -45,7 +47,7 @@ akin! { let mut datapath = MipsDatapath::default(); let instructions = String::from(*instruction); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[25] = *value1; diff --git a/src/tests/integration/core_parser/double_immediate.rs b/src/tests/integration/core_parser/double_immediate.rs index 531f3795e..833f54466 100644 --- a/src/tests/integration/core_parser/double_immediate.rs +++ b/src/tests/integration/core_parser/double_immediate.rs @@ -1,5 +1,7 @@ //! Tests for the double immediate instructions: dahi, dati, daddi, dsubi, dmuli, ddivi, daddiu, dsubiu, dmuliu, ddiviu. +use crate::parser::parser_structs_and_enums::Architecture; + use super::*; #[test] @@ -7,7 +9,7 @@ fn basic_dahi() -> Result<(), String> { let mut datapath = MipsDatapath::default(); let instructions = String::from("dahi r3, 123"); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[3] = 0; @@ -28,7 +30,7 @@ fn dahi_sign_extend() -> Result<(), String> { let mut datapath = MipsDatapath::default(); let instructions = String::from("dahi r5, 43158"); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[5] = 0; @@ -49,7 +51,7 @@ fn basic_dati() -> Result<(), String> { let mut datapath = MipsDatapath::default(); let instructions = String::from("dati r10, 4321"); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[10] = 0; @@ -77,7 +79,7 @@ akin! { let mut datapath = MipsDatapath::default(); let instructions = String::from(*instruction); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[20] = *rs_value; @@ -103,7 +105,7 @@ akin! { let mut datapath = MipsDatapath::default(); let instructions = String::from(*instruction); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[20] = *rs_value; diff --git a/src/tests/integration/core_parser/fibonacci.rs b/src/tests/integration/core_parser/fibonacci.rs index f380aeaee..108f83d21 100644 --- a/src/tests/integration/core_parser/fibonacci.rs +++ b/src/tests/integration/core_parser/fibonacci.rs @@ -1,4 +1,6 @@ -use crate::emulation_core::mips::registers::GpRegisterType; +use crate::{ + emulation_core::mips::registers::GpRegisterType, parser::parser_structs_and_enums::Architecture, +}; use super::*; @@ -74,7 +76,7 @@ fn recursive_fibonacci() -> Result<(), String> { nop", ); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; while !datapath.is_halted() { diff --git a/src/tests/integration/core_parser/floating_point_arithmetic.rs b/src/tests/integration/core_parser/floating_point_arithmetic.rs index 7f3466d48..06c050643 100644 --- a/src/tests/integration/core_parser/floating_point_arithmetic.rs +++ b/src/tests/integration/core_parser/floating_point_arithmetic.rs @@ -1,5 +1,7 @@ //! Tests for the floating-point arithmetic instructions: add.s, add.d, sub.s, sub.d, mul.s, mul.d, div.s, div.d +use crate::parser::parser_structs_and_enums::Architecture; + use super::*; akin! { @@ -18,7 +20,7 @@ akin! { let mut datapath = MipsDatapath::default(); let instructions = String::from(*instruction); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.coprocessor.fpr[15] = *value1; @@ -49,7 +51,7 @@ akin! { let mut datapath = MipsDatapath::default(); let instructions = String::from(*instruction); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.coprocessor.fpr[15] = *value1; diff --git a/src/tests/integration/core_parser/floating_point_branch.rs b/src/tests/integration/core_parser/floating_point_branch.rs index fb74fd44f..488f3eb0c 100644 --- a/src/tests/integration/core_parser/floating_point_branch.rs +++ b/src/tests/integration/core_parser/floating_point_branch.rs @@ -1,5 +1,7 @@ //! Tests for the floating-point branch instructions: bc1t, bc1f +use crate::parser::parser_structs_and_enums::Architecture; + use super::*; #[test] @@ -30,7 +32,7 @@ c.lt.s $f0, $f2 bc1t loop"#, ); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; while !datapath.is_halted() { @@ -73,7 +75,7 @@ c.lt.s $f2, $f0 bc1f loop"#, ); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; while !datapath.is_halted() { diff --git a/src/tests/integration/core_parser/floating_point_comparison.rs b/src/tests/integration/core_parser/floating_point_comparison.rs index 45e9ed632..dfee72c8d 100644 --- a/src/tests/integration/core_parser/floating_point_comparison.rs +++ b/src/tests/integration/core_parser/floating_point_comparison.rs @@ -1,5 +1,7 @@ //! Tests for the floating-point comparison instructions: c.eq.s, c.eq.d, c.lt.s, c.lt.d, c.le.s, c.le.d, c.ngt.s, c.ngt.d, c.nge.s, c.nge.d +use crate::parser::parser_structs_and_enums::Architecture; + use super::*; akin! { @@ -16,7 +18,7 @@ akin! { let mut datapath = MipsDatapath::default(); let instructions = String::from(*instruction); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.coprocessor.fpr[15] = *value1; @@ -45,7 +47,7 @@ akin! { let mut datapath = MipsDatapath::default(); let instructions = String::from(*instruction); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.coprocessor.fpr[15] = *value1; diff --git a/src/tests/integration/core_parser/mod.rs b/src/tests/integration/core_parser/mod.rs index 79b7166a5..758f6f44c 100644 --- a/src/tests/integration/core_parser/mod.rs +++ b/src/tests/integration/core_parser/mod.rs @@ -3,6 +3,7 @@ use akin::akin; use crate::emulation_core::datapath::Datapath; use crate::emulation_core::mips::datapath::MipsDatapath; use crate::parser::parser_assembler_main::parser; +use crate::parser::parser_structs_and_enums::Architecture; pub mod arithmetic; pub mod basic_immediate; @@ -30,7 +31,7 @@ add $s1, $s0, $s0"#, ); // Parse instructions and load into emulation core memory. - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; // Execute 2 instructions. @@ -69,7 +70,7 @@ dati r1, 43982"#, // dati r1, 43982 | ABCD 8765 CCCC EEEE | 43982 == 0xABCE. FFFF + ABCE = ABCD. // Parse instructions and load into emulation core memory. - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; // Execute 4 instructions. @@ -96,7 +97,7 @@ dadd r7, r5, r6 dmuli r8, r7, 2"#, ); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; while !datapath.is_halted() { diff --git a/src/tests/integration/core_parser/store_load_word.rs b/src/tests/integration/core_parser/store_load_word.rs index 00e7811ec..d8ec12f22 100644 --- a/src/tests/integration/core_parser/store_load_word.rs +++ b/src/tests/integration/core_parser/store_load_word.rs @@ -12,7 +12,7 @@ li r25, 1234 sw r25, 0(r14)"#, ); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; while !datapath.is_halted() { @@ -33,7 +33,7 @@ fn basic_lw() -> Result<(), String> { lw r25, 0(r14)"#, ); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.memory.memory[403] = 36; @@ -61,7 +61,7 @@ daddiu $s2, $s1, 1 sw $s2, secret_number"#, ); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; while !datapath.is_halted() { @@ -88,7 +88,7 @@ mtc1 $s1, $f25 swc1 $f25, 0($s0)"#, ); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; while !datapath.is_halted() { @@ -109,7 +109,7 @@ fn basic_lwc1() -> Result<(), String> { lwc1 $f12, 0($t4)"#, ); - let (_, instruction_bits) = parser(instructions); + let (_, instruction_bits) = parser(instructions, Architecture::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.memory.memory[403] = 36; diff --git a/src/tests/parser/assembling.rs b/src/tests/parser/assembling.rs index 16b25f837..ecfd86f63 100644 --- a/src/tests/parser/assembling.rs +++ b/src/tests/parser/assembling.rs @@ -1,5 +1,6 @@ use crate::parser::assembling::assemble_data_binary; use crate::parser::parser_assembler_main::parser; +use crate::parser::parser_structs_and_enums::Architecture; use crate::parser::parser_structs_and_enums::ErrorType::{NonASCIIChar, NonASCIIString}; use crate::parser::parsing::{separate_data_and_text, tokenize_program}; mod read_register_tests { @@ -374,20 +375,28 @@ fn assemble_data_binary_works_for_asciiz() { #[test] fn assemble_data_binary_gives_errors_on_non_ascii_characters_for_ascii_asciiz_and_byte() { - let result = parser(".data\nlabel: .ascii \"❤️🦧❤️\"".to_string()).0; + let result = parser( + ".data\nlabel: .ascii \"❤️🦧❤️\"".to_string(), + Architecture::MIPS, + ) + .0; assert_eq!( result.monaco_line_info[1].errors[0].error_name, NonASCIIString ); - let result = parser(".data\nlabel: .asciiz \"❤️🦧❤️\"".to_string()).0; + let result = parser( + ".data\nlabel: .asciiz \"❤️🦧❤️\"".to_string(), + Architecture::MIPS, + ) + .0; assert_eq!( result.monaco_line_info[1].errors[0].error_name, NonASCIIString ); - let result = parser(".data\nlabel: .byte \'🦧\'".to_string()).0; + let result = parser(".data\nlabel: .byte \'🦧\'".to_string(), Architecture::MIPS).0; assert_eq!( result.monaco_line_info[1].errors[0].error_name, NonASCIIChar diff --git a/src/tests/parser/parser_assembler_main.rs b/src/tests/parser/parser_assembler_main.rs index ccbb5a155..01bed3e64 100644 --- a/src/tests/parser/parser_assembler_main.rs +++ b/src/tests/parser/parser_assembler_main.rs @@ -1,11 +1,13 @@ #[cfg(test)] mod parser_main_function_tests { - use crate::parser::parser_assembler_main::*; + use crate::parser::{parser_assembler_main::*, parser_structs_and_enums::Architecture}; #[test] fn parser_takes_string_and_returns_vec_of_instructions() { - let results = - parser("lw $t1, 512($t1)\nadd $t1, $s6, $t2\naddi $t1, $t2, 43690".to_string()); + let results = parser( + "lw $t1, 512($t1)\nadd $t1, $s6, $t2\naddi $t1, $t2, 43690".to_string(), + Architecture::MIPS, + ); assert_eq!( results.0.instructions[0].binary, @@ -797,7 +799,7 @@ use crate::parser::parser_structs_and_enums::ErrorType::{ UnrecognizedInstruction, UnsupportedInstruction, }; use crate::parser::parser_structs_and_enums::{ - ProgramInfo, SUPPORTED_INSTRUCTIONS, UNSUPPORTED_INSTRUCTIONS, + Architecture, ProgramInfo, SUPPORTED_INSTRUCTIONS, UNSUPPORTED_INSTRUCTIONS, }; use crate::parser::parsing::{create_label_map, separate_data_and_text, tokenize_program}; use crate::parser::pseudo_instruction_parsing::{ @@ -896,7 +898,11 @@ fn create_binary_vec_works_with_data() { #[test] fn read_instructions_recognizes_valid_but_unsupported_instructions() { - let program_info = parser("nor $t1, $t2, $t3\ndsrav $t1, $t2, $t3\n".to_string()).0; + let program_info = parser( + "nor $t1, $t2, $t3\ndsrav $t1, $t2, $t3\n".to_string(), + Architecture::MIPS, + ) + .0; assert_eq!( program_info.instructions[0].errors[0].error_name, @@ -912,6 +918,7 @@ fn read_instructions_recognizes_valid_but_unsupported_instructions() { fn console_output_post_assembly_works_with_errors() { let result = parser( ".text\nadd $t1, $t2, 1235\n.data\nlabel: .ascii 100\n.text\nlw t1, address".to_string(), + Architecture::MIPS, ) .0 .console_out_post_assembly; @@ -924,6 +931,7 @@ fn console_output_post_assembly_works_with_no_errors_present() { let result = parser( ".text\nadd $t1, $t2, $t3\n.data\nlabel: .ascii \"string\"\n.text\nlw $t1, 40($t1)" .to_string(), + Architecture::MIPS, ) .0 .console_out_post_assembly; @@ -933,7 +941,11 @@ fn console_output_post_assembly_works_with_no_errors_present() { #[test] fn mouse_hover_holds_information_about_valid_instructions() { - let program_info = parser(".text\nori $t1, $t2, 100\nsyscall".to_string()).0; + let program_info = parser( + ".text\nori $t1, $t2, 100\nsyscall".to_string(), + Architecture::MIPS, + ) + .0; assert_eq!(program_info.monaco_line_info[0].mouse_hover_string, ""); assert_eq!(program_info.monaco_line_info[1].mouse_hover_string, "**Syntax:** `ori rt, rs, immediate`\n\nBitwise ors the contents of `rs` with the left zero-extended `immediate` value, and stores the result in `rt`.\n\n\n\n**Binary:** `0b00110101010010010000000001100100`"); @@ -941,7 +953,11 @@ fn mouse_hover_holds_information_about_valid_instructions() { #[test] fn mouse_hover_holds_information_about_pseudo_instructions() { - let program_info = parser(".text\nlabel: subi $t1, $t2, 100\nsyscall".to_string()).0; + let program_info = parser( + ".text\nlabel: subi $t1, $t2, 100\nsyscall".to_string(), + Architecture::MIPS, + ) + .0; assert_eq!(program_info.monaco_line_info[0].mouse_hover_string, ""); assert_eq!(program_info.monaco_line_info[1].mouse_hover_string, "`subi` is a pseudo-instruction.\n\n```\nsubi rt, rs, immediate =>\nori $at, $zero, immediate\nsub rt, rs, $at\n\n```\n\n\n\n**Binary:** `0b00110100000000010000000001100100`\n\n**Binary:** `0b00000001010000010100100000100010`"); @@ -949,7 +965,11 @@ fn mouse_hover_holds_information_about_pseudo_instructions() { #[test] fn errors_do_not_go_into_mouse_hover() { - let program_info = parser(".text\nori $t1, $t2, $t3\nsyscall".to_string()).0; + let program_info = parser( + ".text\nori $t1, $t2, $t3\nsyscall".to_string(), + Architecture::MIPS, + ) + .0; assert_eq!(program_info.monaco_line_info[0].mouse_hover_string, ""); assert_eq!(program_info.monaco_line_info[1].mouse_hover_string, "**Syntax:** `ori rt, rs, immediate`\n\nBitwise ors the contents of `rs` with the left zero-extended `immediate` value, and stores the result in `rt`.\n\n"); @@ -959,6 +979,7 @@ fn errors_do_not_go_into_mouse_hover() { fn syscall_message_and_binary_does_not_go_in_mouse_hover_if_the_syscall_was_added_by_parser() { let monaco_line_info = parser( ".text\nori $t1, $t2, 100\nlabel: subi $t1, $t2, 100\nadd $t1, $t2, $t3\n".to_string(), + Architecture::MIPS, ) .0 .monaco_line_info; @@ -968,7 +989,9 @@ fn syscall_message_and_binary_does_not_go_in_mouse_hover_if_the_syscall_was_adde assert_eq!(monaco_line_info[2].mouse_hover_string, "`subi` is a pseudo-instruction.\n\n```\nsubi rt, rs, immediate =>\nori $at, $zero, immediate\nsub rt, rs, $at\n\n```\n\n\n\n**Binary:** `0b00110100000000010000000001100100`\n\n**Binary:** `0b00000001010000010100100000100010`"); assert_eq!(monaco_line_info[3].mouse_hover_string, "**Syntax:** `add rd, rs, rt`\n\nAdds the 32-bit values in `rs` and `rt`, and places the result in `rd`.\n\nIn hardware implementations, the result is not placed in `rd` if adding `rs` and `rt` causes a 32-bit overflow. However, SWIM places the result in `rd` regardless since there is no exception handling.\n\n**Binary:** `0b00000001010010110100100000100000`\n\n"); - let monaco_line_info = parser(".text".to_string()).0.monaco_line_info; + let monaco_line_info = parser(".text".to_string(), Architecture::MIPS) + .0 + .monaco_line_info; assert_eq!(monaco_line_info[0].mouse_hover_string, "\n\n"); } @@ -977,6 +1000,7 @@ fn mouse_hover_holds_information_info_for_various_instruction_types() { let program_info = parser( ".text\nori $t1, $t2, 100\nlabel: subi $t1, $t2, 100\nadd $t1, $t2, $t3\nsyscall\n" .to_string(), + Architecture::MIPS, ) .0; @@ -989,11 +1013,15 @@ fn mouse_hover_holds_information_info_for_various_instruction_types() { #[test] fn instructions_directives_and_registers_work_regardless_of_capitalization() { - let result = - parser(".TexT\nOR $t1, $T2, $t3\nor $t1, $t2, $t3\n.DATA\nabel: .WOrD 100".to_string()); + let result = parser( + ".TexT\nOR $t1, $T2, $t3\nor $t1, $t2, $t3\n.DATA\nabel: .WOrD 100".to_string(), + Architecture::MIPS, + ); - let correct = - parser(".TexT\nOR $t1, $T2, $t3\nor $t1, $t2, $t3\n.DATA\nabel: .WOrD 100".to_lowercase()); + let correct = parser( + ".TexT\nOR $t1, $T2, $t3\nor $t1, $t2, $t3\n.DATA\nabel: .WOrD 100".to_lowercase(), + Architecture::MIPS, + ); assert_eq!(result.1, correct.1); assert_eq!( result.0.console_out_post_assembly, @@ -1013,21 +1041,23 @@ fn instructions_directives_and_registers_work_regardless_of_capitalization() { #[test] fn parser_assembler_works_with_empty_strings() { - let _ = parser("".to_string()); - let _ = parser("\n".to_string()); - let _ = parser("\n\n".to_string()); + let _ = parser("".to_string(), Architecture::MIPS); + let _ = parser("\n".to_string(), Architecture::MIPS); + let _ = parser("\n\n".to_string(), Architecture::MIPS); } #[test] fn create_binary_vec_works_with_all_mod_4_options() { let result = parser( "ori $s0, $zero, 12345\nori $s0, $zero, 12345\n.data\nlab: .ascii \"h\"".to_string(), + Architecture::MIPS, ) .1; assert_eq!(result, vec![873476153, 873476153, 12, 1744830464]); let result = parser( "ori $s0, $zero, 12345\nori $s0, $zero, 12345\n.data\nlab: .ascii \"ha\"".to_string(), + Architecture::MIPS, ) .1; assert_eq!( @@ -1037,6 +1067,7 @@ fn create_binary_vec_works_with_all_mod_4_options() { let result = parser( "ori $s0, $zero, 12345\nori $s0, $zero, 12345\n.data\nlab: .ascii \"han\"".to_string(), + Architecture::MIPS, ) .1; assert_eq!( @@ -1046,6 +1077,7 @@ fn create_binary_vec_works_with_all_mod_4_options() { let result = parser( "ori $s0, $zero, 12345\nori $s0, $zero, 12345\n.data\nlab: .ascii \"hank\"".to_string(), + Architecture::MIPS, ) .1; assert_eq!( @@ -1057,7 +1089,9 @@ fn create_binary_vec_works_with_all_mod_4_options() { #[test] fn no_unsupported_instructions_are_recognized_by_parser() { for instruction in UNSUPPORTED_INSTRUCTIONS { - let result = parser(instruction.to_string()).0.monaco_line_info; + let result = parser(instruction.to_string(), Architecture::MIPS) + .0 + .monaco_line_info; assert_eq!(result[0].errors[0].error_name, UnsupportedInstruction); } } @@ -1065,7 +1099,9 @@ fn no_unsupported_instructions_are_recognized_by_parser() { #[test] fn supported_instructions_are_recognized_by_parser() { for instruction in SUPPORTED_INSTRUCTIONS { - let result = parser(instruction.to_string()).0.monaco_line_info; + let result = parser(instruction.to_string(), Architecture::MIPS) + .0 + .monaco_line_info; for error in &result[0].errors { assert_ne!(error.error_name, UnsupportedInstruction); assert_ne!(error.error_name, UnrecognizedInstruction); @@ -1075,25 +1111,33 @@ fn supported_instructions_are_recognized_by_parser() { #[test] fn main_and_start_labelled_instructions_change_program_info_pc_starting_point() { - let result = parser("addi $t1, $t2, 100\nsw $t1, 400($zero)".to_string()) - .0 - .pc_starting_point; + let result = parser( + "addi $t1, $t2, 100\nsw $t1, 400($zero)".to_string(), + Architecture::MIPS, + ) + .0 + .pc_starting_point; assert_eq!(result, 0); - let result = - parser("addi $t1, $t2, 100\nsw $t1, 400($zero)\nmain: lw $t2, 320($zero)".to_string()) - .0 - .pc_starting_point; + let result = parser( + "addi $t1, $t2, 100\nsw $t1, 400($zero)\nmain: lw $t2, 320($zero)".to_string(), + Architecture::MIPS, + ) + .0 + .pc_starting_point; assert_eq!(result, 8); - let result = - parser("addi $t1, $t2, 100\nstart: sw $t1, 400($zero)\nlw $t2, 320($zero)".to_string()) - .0 - .pc_starting_point; + let result = parser( + "addi $t1, $t2, 100\nstart: sw $t1, 400($zero)\nlw $t2, 320($zero)".to_string(), + Architecture::MIPS, + ) + .0 + .pc_starting_point; assert_eq!(result, 4); let result = parser( "addi $t1, $t2, 100\nstart: sw $t1, 400($zero)\nmain: lw $t2, 320($zero)".to_string(), + Architecture::MIPS, ) .0 .pc_starting_point; diff --git a/src/tests/parser/parsing.rs b/src/tests/parser/parsing.rs index 1a6829c49..e9c4d4117 100644 --- a/src/tests/parser/parsing.rs +++ b/src/tests/parser/parsing.rs @@ -5,7 +5,7 @@ use crate::parser::parser_structs_and_enums::ErrorType::{ }; use crate::parser::parser_structs_and_enums::TokenType::{Label, Operator, Unknown}; use crate::parser::parser_structs_and_enums::{ - Data, Error, ErrorType, Instruction, LabelInstance, MonacoLineInfo, Token, + Architecture, Data, Error, ErrorType, Instruction, LabelInstance, MonacoLineInfo, Token, }; use crate::parser::parsing::create_label_map; #[cfg(test)] @@ -325,13 +325,18 @@ fn separate_data_and_text_works_basic_version() { fn separate_data_and_text_can_handle_empty_lines() { //this test realistically is only important to check that it does not panic but we might as well go a step further and //check that the result generated with empty lines is identical to the result without empty lines save for line number - let mut result_1 = - parser(".text\nori $s0, $zero, 0x1234\n\n.data\nlabel: .word 0xface".to_string()) - .0 - .monaco_line_info; - let result_2 = parser(".text\nori $s0, $zero, 0x1234\n.data\nlabel: .word 0xface".to_string()) - .0 - .monaco_line_info; + let mut result_1 = parser( + ".text\nori $s0, $zero, 0x1234\n\n.data\nlabel: .word 0xface".to_string(), + Architecture::MIPS, + ) + .0 + .monaco_line_info; + let result_2 = parser( + ".text\nori $s0, $zero, 0x1234\n.data\nlabel: .word 0xface".to_string(), + Architecture::MIPS, + ) + .0 + .monaco_line_info; result_1[2].line_number = 1; result_1[3].line_number = 2; result_1[4].line_number = 3; @@ -344,9 +349,12 @@ fn separate_data_and_text_can_handle_empty_lines() { #[test] fn separate_data_and_text_generates_error_on_missing_commas_text() { - let result = parser("add, $t1, $t2, $t3,\nlw $t1 400($t2)".to_string()) - .0 - .monaco_line_info; + let result = parser( + "add, $t1, $t2, $t3,\nlw $t1 400($t2)".to_string(), + Architecture::MIPS, + ) + .0 + .monaco_line_info; let error_0_line_0 = Error { error_name: UnnecessaryComma, @@ -736,9 +744,12 @@ fn build_instruction_list_allows_double_label_on_instructions() { #[test] fn build_instruction_list_generates_error_on_label_on_last_line() { - let result = parser("lw $t1, 400($zero)\nadd $t1, $t2, $t3\nlabel:\n".to_string()) - .0 - .monaco_line_info; + let result = parser( + "lw $t1, 400($zero)\nadd $t1, $t2, $t3\nlabel:\n".to_string(), + Architecture::MIPS, + ) + .0 + .monaco_line_info; assert_eq!(result[2].errors[0].error_name, LabelAssignmentError); } @@ -832,9 +843,12 @@ fn create_label_map_pushes_errors_instead_of_inserting_duplicate_label_name() { } #[test] fn suggest_error_corrections_works_with_various_gp_registers() { - let result = parser("add $t1, $t2, @t3\nori not, ro, 100".to_string()) - .0 - .instructions; + let result = parser( + "add $t1, $t2, @t3\nori not, ro, 100".to_string(), + Architecture::MIPS, + ) + .0 + .instructions; assert_eq!( result[0].errors[0].message, @@ -852,9 +866,12 @@ fn suggest_error_corrections_works_with_various_gp_registers() { #[test] fn suggest_error_corrections_works_with_various_fp_registers() { - let result = parser("add.s $f1, $f2, f3\nadd.d fake, $052, 1qp".to_string()) - .0 - .instructions; + let result = parser( + "add.s $f1, $f2, f3\nadd.d fake, $052, 1qp".to_string(), + Architecture::MIPS, + ) + .0 + .instructions; assert_eq!( result[0].errors[0].message, @@ -876,10 +893,12 @@ fn suggest_error_corrections_works_with_various_fp_registers() { #[test] fn suggest_error_corrections_works_with_labels() { - let result = - parser("j stable\nlabel: add $t1, $t2, $t3\ntable: sub $t1, $t2, $t3\nj lapel".to_string()) - .0 - .instructions; + let result = parser( + "j stable\nlabel: add $t1, $t2, $t3\ntable: sub $t1, $t2, $t3\nj lapel".to_string(), + Architecture::MIPS, + ) + .0 + .instructions; assert_eq!( result[0].errors[0].message, @@ -893,9 +912,12 @@ fn suggest_error_corrections_works_with_labels() { #[test] fn suggest_error_corrections_works_with_labels_when_no_labels_specified() { - let result = parser("add $t1, $t2, $t3\nj stable\nlw $t1, 100($zero)\n".to_string()) - .0 - .instructions; + let result = parser( + "add $t1, $t2, $t3\nj stable\nlw $t1, 100($zero)\n".to_string(), + Architecture::MIPS, + ) + .0 + .instructions; assert_eq!( result[1].errors[0].message, "There is no recognized labelled memory.\n" @@ -904,9 +926,12 @@ fn suggest_error_corrections_works_with_labels_when_no_labels_specified() { #[test] fn suggest_error_corrections_works_with_instructions() { - let result = parser("sun $t1, $t2, $t3\nqq $t1, 100($zero)\n.c.eqd $f1, $f1, $f3".to_string()) - .0 - .instructions; + let result = parser( + "sun $t1, $t2, $t3\nqq $t1, 100($zero)\n.c.eqd $f1, $f1, $f3".to_string(), + Architecture::MIPS, + ) + .0 + .instructions; assert_eq!( result[0].errors[0].message, @@ -927,6 +952,7 @@ fn suggest_error_corrections_works_with_data_types() { let result = parser( ".data\nlabel: word 100\ntable: .bite 'c','1'\nlapel: gobbledygook \"this is a string\"" .to_string(), + Architecture::MIPS, ) .0 .data; @@ -947,10 +973,12 @@ fn suggest_error_corrections_works_with_data_types() { #[test] fn suggest_error_suggestions_associates_error_with_monaco_line_info() { - let lines = - parser("ori $t1, 100, $t2\nlw $f1, 400($zero)\n.data\nword .wod \"a\"\n".to_string()) - .0 - .monaco_line_info; + let lines = parser( + "ori $t1, 100, $t2\nlw $f1, 400($zero)\n.data\nword .wod \"a\"\n".to_string(), + Architecture::MIPS, + ) + .0 + .monaco_line_info; let actual = Error { error_name: ErrorType::UnrecognizedGPRegister, @@ -995,7 +1023,9 @@ fn suggest_error_suggestions_associates_error_with_monaco_line_info() { #[test] fn operators_with_commas_cause_error() { - let result = parser("ori, $t1, $t2, 100".to_string()).0.monaco_line_info; + let result = parser("ori, $t1, $t2, 100".to_string(), Architecture::MIPS) + .0 + .monaco_line_info; for line in result { for error in line.errors { diff --git a/src/tests/parser/pseudo_instruction_parsing.rs b/src/tests/parser/pseudo_instruction_parsing.rs index 99d90264f..603ddcf4b 100644 --- a/src/tests/parser/pseudo_instruction_parsing.rs +++ b/src/tests/parser/pseudo_instruction_parsing.rs @@ -1,7 +1,7 @@ use crate::parser::assembling::assemble_data_binary; use crate::parser::parser_assembler_main::parser; use crate::parser::parser_structs_and_enums::TokenType::Operator; -use crate::parser::parser_structs_and_enums::{Instruction, ProgramInfo, Token}; +use crate::parser::parser_structs_and_enums::{Architecture, Instruction, ProgramInfo, Token}; use crate::parser::parsing::{create_label_map, separate_data_and_text, tokenize_program}; use crate::parser::pseudo_instruction_parsing::{ complete_lw_sw_pseudo_instructions, expand_pseudo_instructions_and_assign_instruction_numbers, @@ -10,9 +10,12 @@ use std::collections::HashMap; #[test] fn expand_pseudo_instructions_and_assign_instruction_number_adds_syscall_if_it_is_missing() { - let result = parser("addi $t1, $t2, 100\nsw $t1, label".to_string()) - .0 - .updated_monaco_string; + let result = parser( + "addi $t1, $t2, 100\nsw $t1, label".to_string(), + Architecture::MIPS, + ) + .0 + .updated_monaco_string; let correct_result = "addi $t1, $t2, 100\nsw $t1, label\nsyscall\n".to_string(); assert_eq!(result, correct_result); @@ -21,9 +24,12 @@ fn expand_pseudo_instructions_and_assign_instruction_number_adds_syscall_if_it_i #[test] fn expand_pseudo_instructions_and_assign_instruction_number_adds_syscall_at_beginning_if_no_instruction( ) { - let result = parser(".data\nword .word 100\nother .byte 'a','a'\n".to_string()) - .0 - .updated_monaco_string; + let result = parser( + ".data\nword .word 100\nother .byte 'a','a'\n".to_string(), + Architecture::MIPS, + ) + .0 + .updated_monaco_string; let correct_result = ".text\nsyscall\n.data\nword .word 100\nother .byte 'a','a'\n".to_string(); @@ -33,7 +39,7 @@ fn expand_pseudo_instructions_and_assign_instruction_number_adds_syscall_at_begi #[test] fn expand_pseudo_instructions_and_assign_instruction_number_adds_syscall_after_first_instance_of_text( ) { - let result = parser(".data\nword .word 100\n.text\n.data\nother .byte 'a','a'\n.text\n.data\nfinal: .space 10\n".to_string()).0.updated_monaco_string; + let result = parser(".data\nword .word 100\n.text\n.data\nother .byte 'a','a'\n.text\n.data\nfinal: .space 10\n".to_string(), Architecture::MIPS).0.updated_monaco_string; let correct_result = ".data\nword .word 100\n.text\nsyscall\n.data\nother .byte 'a','a'\n.text\n.data\nfinal: .space 10\n".to_string(); @@ -43,9 +49,12 @@ fn expand_pseudo_instructions_and_assign_instruction_number_adds_syscall_after_f #[test] fn expand_pseudo_instructions_and_assign_instruction_number_does_not_add_syscall_if_it_is_present() { - let result = parser("addi $t1, $t2, 100\nsw $t1, label\nsyscall\n".to_string()) - .0 - .updated_monaco_string; + let result = parser( + "addi $t1, $t2, 100\nsw $t1, label\nsyscall\n".to_string(), + Architecture::MIPS, + ) + .0 + .updated_monaco_string; let correct_result: String = "addi $t1, $t2, 100\nsw $t1, label\nsyscall\n".to_string(); @@ -55,9 +64,12 @@ fn expand_pseudo_instructions_and_assign_instruction_number_does_not_add_syscall #[test] fn expand_pseudo_instructions_and_assign_instruction_number_adds_syscall_at_proper_spot_with_data_after( ) { - let result = parser("addi $t1, $t2, 100\nsw $t1, label\n.data\n word: .word 100\n".to_string()) - .0 - .updated_monaco_string; + let result = parser( + "addi $t1, $t2, 100\nsw $t1, label\n.data\n word: .word 100\n".to_string(), + Architecture::MIPS, + ) + .0 + .updated_monaco_string; let correct_result = "addi $t1, $t2, 100\nsw $t1, label\nsyscall\n.data\n word: .word 100\n".to_string(); @@ -67,9 +79,12 @@ fn expand_pseudo_instructions_and_assign_instruction_number_adds_syscall_at_prop #[test] fn add_syscall_to_program_info() { - let result = parser(".text\naddi $t1, $t2, $t3\nsyscall\n.data\n".to_string()) - .0 - .instructions; + let result = parser( + ".text\naddi $t1, $t2, $t3\nsyscall\n.data\n".to_string(), + Architecture::MIPS, + ) + .0 + .instructions; for instr in result { println!("{}", instr.operator.token_name); @@ -1961,7 +1976,7 @@ fn complete_lw_sw_pseudo_instructions_doesnt_break_with_empty_instruction_list() fn expanded_pseudo_instructions_are_added_into_updated_monaco_string() { let result = parser( ".text\nli $t1, 100\nseq $t1, $t2, $t3\nsne $t1, $t2, $t3\nsle $t1, $t2, $t3\nsleu $t1, $t2, $t3\nsgt $t1, $t2, $t3\nsgtu $t1, $t2, $t3\nsge $t1, $t2, $t3\nsgeu $t1, $t2, $t3\nsubi $t1, $t2, 100\ndsubi $t1, $t2, 100\ndsubiu $t1, $t2, 100\nmuli $t1, $t2, 100\ndmuli $t1, $t2, 100\ndmuliu $t1, $t2, 100\ndivi $t1, 100\nddivi $t1, 100\nddiviu $t1, 100\nlw $t1, memory\n.data\nmemory: .word 200" - .to_string(), + .to_string(), Architecture::MIPS ) .0.updated_monaco_string; @@ -1970,9 +1985,12 @@ fn expanded_pseudo_instructions_are_added_into_updated_monaco_string() { #[test] fn pseudo_instructions_with_labels_put_label_on_the_first_expanded_instruction() { - let result = parser("label: ddiviu $t2, $t2, 100\n".to_string()) - .0 - .instructions; + let result = parser( + "label: ddiviu $t2, $t2, 100\n".to_string(), + Architecture::MIPS, + ) + .0 + .instructions; assert!(!result[0].labels.is_empty()); assert!(result[1].labels.is_empty()); } From 7d02539a9df91dd374d090e6868cb751f483e92b Mon Sep 17 00:00:00 2001 From: Geetis <59862178+Geetis@users.noreply.github.com> Date: Thu, 7 Mar 2024 08:15:45 -0500 Subject: [PATCH 02/10] Finished pseudo-instructions --- src/parser/parser_assembler_main.rs | 34 +- src/parser/parser_structs_and_enums.rs | 100 ++- src/parser/parsing.rs | 25 +- src/parser/pseudo_instruction_parsing.rs | 972 ++++++++++++++++++++++ src/tests/parser/parser_assembler_main.rs | 6 +- static/assembly_examples/riscv_test.asm | 1 + 6 files changed, 1113 insertions(+), 25 deletions(-) diff --git a/src/parser/parser_assembler_main.rs b/src/parser/parser_assembler_main.rs index 5d91bec37..245593264 100644 --- a/src/parser/parser_assembler_main.rs +++ b/src/parser/parser_assembler_main.rs @@ -5,7 +5,7 @@ use crate::parser::parser_structs_and_enums::ProgramInfo; use crate::parser::parser_structs_and_enums::*; use crate::parser::parsing::*; use crate::parser::pseudo_instruction_parsing::{ - complete_lw_sw_pseudo_instructions, expand_pseudo_instructions_and_assign_instruction_numbers, + complete_lw_sw_pseudo_instructions, expand_pseudo_instructions_and_assign_instruction_numbers, expand_pseudo_instructions_and_assign_instruction_numbers_riscv }; use std::collections::HashMap; @@ -51,6 +51,7 @@ pub fn parser(file_string: String, arch: Architecture) -> (ProgramInfo, Vec &mut program_info.data, &labels, &mut program_info.monaco_line_info, + arch ); let (binary, data_starting_point) = @@ -82,24 +83,17 @@ pub fn parser(file_string: String, arch: Architecture) -> (ProgramInfo, Vec separate_data_and_text(&mut program_info.monaco_line_info); // Implement a RISC-V version - /*expand_pseudo_instructions_and_assign_instruction_numbers( + expand_pseudo_instructions_and_assign_instruction_numbers_riscv( &mut program_info.instructions, &program_info.data, &mut program_info.monaco_line_info, - );*/ + ); let vec_of_data = assemble_data_binary(&mut program_info.data); let labels: HashMap = create_label_map(&mut program_info.instructions, &mut program_info.data); - // Implement a RISC-V version - /*complete_lw_sw_pseudo_instructions( - &mut program_info.instructions, - &labels, - &mut program_info.monaco_line_info, - );*/ - read_instructions_riscv( &mut program_info.instructions, &labels, @@ -111,6 +105,7 @@ pub fn parser(file_string: String, arch: Architecture) -> (ProgramInfo, Vec &mut program_info.data, &labels, &mut program_info.monaco_line_info, + arch ); let (binary, data_starting_point) = @@ -1526,7 +1521,7 @@ pub fn read_instructions( } _ => { - if UNSUPPORTED_INSTRUCTIONS.contains(&&*instruction.operator.token_name) { + if UNSUPPORTED_INSTRUCTIONS_MIPS.contains(&&*instruction.operator.token_name) { instruction.errors.push(Error { error_name: UnsupportedInstruction, token_causing_error: instruction.operator.token_name.to_string(), @@ -2620,6 +2615,8 @@ pub fn read_instructions_riscv( format!("{:032b}", instruction.binary) ); + log!("Instruction: ", format!("{:?}", instruction)); + read_operands_riscv( instruction, vec![RegisterGP, MemoryAddress], @@ -6371,7 +6368,7 @@ pub fn read_instructions_riscv( } } _ => { - if UNSUPPORTED_INSTRUCTIONS.contains(&&*instruction.operator.token_name) { + if UNSUPPORTED_INSTRUCTIONS_RISCV.contains(&&*instruction.operator.token_name) { instruction.errors.push(Error { error_name: UnsupportedInstruction, token_causing_error: instruction.operator.token_name.to_string(), @@ -6429,16 +6426,25 @@ fn immediate_to_branch(mut bin: u32) -> u32 { let lower_imm = (bin >> 21) & 0b1111; // Extract imm[10:5] - let upper_imm = (bin >> 24) & 0b111111; + let upper_imm = (bin >> 25) & 0b111111; + + log!("lower_imm: ", format!("{:032b}", lower_imm)); + log!("upper_imm: ", format!("{:032b}", upper_imm)); + // Extract bit 11 and bit 12 let bit_11 = (bin >> 30) & 0b1; let bit_12 = (bin >> 31) & 0b1; - + log!("bit 11: ", format!("{:032b}", bit_11)); + log!("bit 12: ", format!("{:032b}", bit_12)); + // Extract rs1 and rs2 let rs1 = (bin >> 7) & 0b11111; let rs2 = (bin >> 15) & 0b11111; + log!("rs1: ", format!("{:032b}", rs1)); + log!("rs2: ", format!("{:032b}", rs2)); + // Clear bits 24-20, rs1, and rs2 bin &= !((0b11111 << 20) | (0b11111 << 15) | (0b11111 << 7)); diff --git a/src/parser/parser_structs_and_enums.rs b/src/parser/parser_structs_and_enums.rs index a8a41d57d..07e604c90 100644 --- a/src/parser/parser_structs_and_enums.rs +++ b/src/parser/parser_structs_and_enums.rs @@ -262,7 +262,7 @@ pub enum OperandType { ShiftAmount, } -pub const SUPPORTED_INSTRUCTIONS: [&str; 64] = [ +pub const SUPPORTED_INSTRUCTIONS_MIPS: [&str; 64] = [ // MIPS Instructions "add", "add.d", "add.s", "addi", "addiu", "addu", "and", "andi", "aui", "b", "bc1f", "bc1t", "beq", "bne", "c.eq.d", "c.eq.s", "c.le.d", "c.le.s", "c.lt.d", "c.lt.s", "c.nge.d", "c.nge.s", @@ -270,10 +270,32 @@ pub const SUPPORTED_INSTRUCTIONS: [&str; 64] = [ "div", "div.d", "div.s", "dmfc1", "dmtc1", "dmul", "dmulu", "dsub", "dsubu", "j", "jal", "jalr", "jr", "lui", "lw", "lwc1", "mfc1", "mtc1", "mul", "mul.d", "mul.s", "nop", "or", "ori", "sll", "slt", "sltu", "sub", "sub.d", "sub.s", "sw", "swc1", - // RISC-V Instructions ]; -pub const UNSUPPORTED_INSTRUCTIONS: [&str; 408] = [ +pub const SUPPORTED_INSTRUCTIONS_RISCV:[&str; 131] = [ + // RV32I + "lui", "auipc", "addi", "slti", "xori", "ori", "andi", "slli", "srli", "srai", "add", "sub", "sll", "slt", + "sltu", "cor", "srl", "sra", "or", "and", "fence", "fence.i", "csrrw", "csrrs", "csrrc", "csrrwi", "csrrsi", + "csrrci", "ecall", "ebreak", "uret", "sret", "mret", "wfi", "sfence.vma", "lb", "lh", "lw", "lbu", "lhu", "sb", + "sh", "sw", "jal", "jalr", "beq", "bne", "blt", "bge", "bltu", "bgeu", + // RV64I + "addiw", "slliw", "srliw", "addw", "subw", "sllw", "srlw", "sraw", "lwu", "ld", "sd", + // RV32M + "mul", "mulh", "mulhsu", "mulhu", "div", "divu", "rem", "remu", + // RV64M + "mulw", "divw", "divuw", "remw", "remuw", + // RV32F + "fmadd.s", "fmsub.s", "fnmsub.s", "fnmadd.s", "fadd.s", "fsub.s", "fmul.s", "fdiv.s", "fsqrt.s", + "fsgnj.s", "fsgnjn.s", "fsgnjx.s", "fmin.s", "fmax.s", "fcvt.w.s", "fcvt.wu.s", "fmv.x.w", "feq.s", + "flt.s", "fle.s", "fclass.s", "fcvt.s.w", "fcvt.s.wu", "fmv.w.x", "fmadd.d", "fmsub.d", "fnmadd.d", + "fnmsub.d", "fadd.d", "fsub.d", "fmul.d", "fdiv.d", "fsqrt.d", "fsgnj.d", "fsgnjn.d", "fsgnjx.d", + "fmin.d", "fmax.d", "fcvt.s.d", "fcvt.d.s", "feq.d", "flt.d", "fle.d", "fclass.d", "fcvt.w.d", + "fcvt.wu.d", "fcvt.d.w", "fcvt.d.wu", "flw", "fsw", "fld", "fsd", + // RV64F + "fcvt.l.s", "fcvt.lu.s", "fcvt.s.l", "fcvt.s.lu", +]; + +pub const UNSUPPORTED_INSTRUCTIONS_MIPS: [&str; 408] = [ // MIPS Instructions "abs.d", "abs.ps", @@ -686,6 +708,78 @@ pub const UNSUPPORTED_INSTRUCTIONS: [&str; 408] = [ // RISC-V Instructions ]; +pub const UNSUPPORTED_INSTRUCTIONS_RISCV: [&str; 69] = [ + "lr.w", + "sc.w", + "amoswap.w", + "amoadd.w", + "amoxor.w", + "amoand.w", + "amomin.w", + "amomax.w", + "amominu.w", + "amomaxu.w", + "lr.d", + "sc.d", + "amoswap.d", + "amoadd.d", + "amoxor.d", + "amoand.d", + "amoor.d", + "amomin.d", + "amomax.d", + "amominu.d", + "amomaxu.d", + "fcvt.l.d", + "scvt.lu.d", + "fmv.x.d", + "fcvt.d.l", + "fcvt.d.lu", + "fmv.d.x", + "c.addi4spn", + "c.fld", + "c.lw", + "c.flw", + "c.ld", + "c.fsd", + "c.sw", + "c.fsw", + "c.sd", + "c.nop", + "c.addi", + "c.jal", + "c.addiw", + "c.li", + "c.addi16sp", + "c.lui", + "c.srli", + "c.srai", + "c.andi", + "c.sub", + "c.xor", + "c.or", + "c.and", + "c.subw", + "c.addw", + "c.j", + "c.beqz", + "c.bnez", + "c.slli", + "c.fldsp", + "c.lwsp", + "c.flwsp", + "c.ldsp", + "c.jr", + "c.mv", + "c.ebreak", + "c.jalr", + "c.add", + "c.fsdsp", + "c.swsp", + "c.fswsp", + "c.sdsp", +]; + ///Contains every general purpose register's binary value and the various names they are recognized as. Any reference to gp registers throughout the parser/assembler should reference this array pub const GP_REGISTERS: &[GPRegister; 32] = &[ GPRegister { diff --git a/src/parser/parsing.rs b/src/parser/parsing.rs index 5fe39244b..46ae4bac3 100644 --- a/src/parser/parsing.rs +++ b/src/parser/parsing.rs @@ -2,11 +2,13 @@ use crate::parser::parser_structs_and_enums::ErrorType::*; use crate::parser::parser_structs_and_enums::TokenType::{Directive, Label, Operator, Unknown}; use crate::parser::parser_structs_and_enums::{ Data, Error, Instruction, LabelInstance, MonacoLineInfo, Token, FP_REGISTERS, GP_REGISTERS, - SUPPORTED_INSTRUCTIONS, + SUPPORTED_INSTRUCTIONS_MIPS, }; use levenshtein::levenshtein; use std::collections::HashMap; +use super::parser_structs_and_enums::{Architecture, SUPPORTED_INSTRUCTIONS_RISCV}; + ///Takes the initial string of the program given by the editor and turns it into a vector of Line, /// a struct that holds tokens and the original line number. pub fn tokenize_program(program: String) -> Vec { @@ -402,6 +404,7 @@ pub fn suggest_error_corrections( data: &mut [Data], labels: &HashMap, monaco_line_info: &mut [MonacoLineInfo], + arch: Architecture, ) -> String { let levenshtein_threshold = 2_f32 / 3_f32; let mut console_out_string: String = "".to_string(); @@ -468,10 +471,22 @@ pub fn suggest_error_corrections( let given_string = &instruction.operator.token_name; let mut closest: (usize, String) = (usize::MAX, "".to_string()); - for instruction in SUPPORTED_INSTRUCTIONS { - if levenshtein(given_string, instruction) < closest.0 { - closest.0 = levenshtein(given_string, instruction); - closest.1 = instruction.to_string(); + if arch == Architecture::MIPS + { + for instruction in SUPPORTED_INSTRUCTIONS_MIPS { + if levenshtein(given_string, instruction) < closest.0 { + closest.0 = levenshtein(given_string, instruction); + closest.1 = instruction.to_string(); + } + } + } + if arch == Architecture::RISCV + { + for instruction in SUPPORTED_INSTRUCTIONS_RISCV { + if levenshtein(given_string, instruction) < closest.0 { + closest.0 = levenshtein(given_string, instruction); + closest.1 = instruction.to_string(); + } } } let mut message = "Instruction is not recognized.".to_string(); diff --git a/src/parser/pseudo_instruction_parsing.rs b/src/parser/pseudo_instruction_parsing.rs index 6bb384d9c..c329b3452 100644 --- a/src/parser/pseudo_instruction_parsing.rs +++ b/src/parser/pseudo_instruction_parsing.rs @@ -5,6 +5,8 @@ use crate::parser::parser_structs_and_enums::{ }; use std::collections::HashMap; +use gloo_console::log; + ///Iterates through the instruction list and translates pseudo-instructions into real instructions. /// LW and SW with labelled memory are not completely translated in this step because they require /// the address of the labelled memory to be known which is not found until after all other pseudo-instructions @@ -1237,6 +1239,976 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers( } } +///Iterates through the instruction list and translates pseudo-instructions into real instructions. +/// LW and SW with labelled memory are not completely translated in this step because they require +/// the address of the labelled memory to be known which is not found until after all other pseudo-instructions +/// have been translated. Updated pseudo-instructions are added to updated_monaco_string to appear in the editor after assembly. +/// Also ensures a syscall is at the end of the program +pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( + instructions: &mut Vec, + data: &Vec, + monaco_line_info: &mut [MonacoLineInfo], +) { + //figure out list of labels to be used for lw and sw labels + let mut list_of_labels: Vec = Vec::new(); + for instruction in instructions.clone() { + for label in instruction.labels { + list_of_labels.push(label.token.token_name); + } + } + for data in data { + list_of_labels.push(data.label.token_name.clone()); + } + + //vec_of_added_instructions is needed because of rust ownership rules. It will not let us + //insert into instruction_list while instruction_list is being iterated over. + let mut vec_of_added_instructions: Vec = Vec::new(); + + //iterate through every instruction and check if the operator is a pseudo-instruction + for (i, mut instruction) in &mut instructions.iter_mut().enumerate() { + instruction.instruction_number = i + vec_of_added_instructions.len(); + match &*instruction.operator.token_name.to_lowercase() { + "nop" => { + // Set Pseudo Description + let info = PseudoDescription { + name: "nop".to_string(), + syntax: "nop".to_string(), + translation_lines: vec!["addi x0, x0, 0".to_string()], + }; + monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); + + // Check operands + if instruction.operands.len() != 0 { + instruction.errors.push(Error { + error_name: IncorrectNumberOfOperands, + token_causing_error: "".to_string(), + start_end_columns: instruction.operator.start_end_columns, + message: "".to_string(), + }); + continue; + } + + // Replace Instruction + instruction.operator.token_name = "addi".to_string(); + + // Replace Operands + instruction.operands.insert( + 0, + Token { + token_name: "x0".to_string(), + start_end_columns: (0, 0), + token_type: Default::default(), + }, + ); + instruction.operands.insert( + 1, + Token { + token_name: "x0".to_string(), + start_end_columns: (0, 0), + token_type: Default::default(), + }, + ); + instruction.operands.insert( + 2, + Token { + token_name: "0".to_string(), + start_end_columns: (0, 0), + token_type: Default::default(), + }, + ); + + // Update Line Info + //monaco_line_info[instruction.line_number].update_pseudo_string(vec![instruction]); + } + "mv" => { + // Set Pseudo Description + let info = PseudoDescription { + name: "mv".to_string(), + syntax: "mv rd, rs1".to_string(), + translation_lines: vec!["addi rd, rs, 0".to_string()], + }; + monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); + + // Check operands + if instruction.operands.len() != 2 { + instruction.errors.push(Error { + error_name: IncorrectNumberOfOperands, + token_causing_error: "".to_string(), + start_end_columns: instruction.operator.start_end_columns, + message: "".to_string(), + }); + continue; + } + + // Replace Instruction + instruction.operator.token_name = "addi".to_string(); + + // Replace Operands + instruction.operands.insert( + 2, + Token { + token_name: "0".to_string(), + start_end_columns: (0, 0), + token_type: Default::default(), + }, + ); + + // Update Line Info + //monaco_line_info[instruction.line_number].update_pseudo_string(vec![instruction]); + } + "not" => { + // Set Pseudo Description + let info = PseudoDescription { + name: "not".to_string(), + syntax: "not rd, rs1".to_string(), + translation_lines: vec!["xori rd, rs, -1".to_string()], + }; + monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); + + // Check operands + if instruction.operands.len() != 2 { + instruction.errors.push(Error { + error_name: IncorrectNumberOfOperands, + token_causing_error: "".to_string(), + start_end_columns: instruction.operator.start_end_columns, + message: "".to_string(), + }); + continue; + } + + // Replace Instruction + instruction.operator.token_name = "xori".to_string(); + + // Replace Operands + instruction.operands.insert( + 2, + Token { + token_name: "-1".to_string(), + start_end_columns: (0, 0), + token_type: Default::default(), + }, + ); + + // Update Line Info + //monaco_line_info[instruction.line_number].update_pseudo_string(vec![instruction]); + } + "neg" => { + // Set Pseudo Description + let info = PseudoDescription { + name: "neg".to_string(), + syntax: "neg rd, rs1".to_string(), + translation_lines: vec!["sub rd, x0, rs".to_string()], + }; + monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); + + // Check operands + if instruction.operands.len() != 2 { + instruction.errors.push(Error { + error_name: IncorrectNumberOfOperands, + token_causing_error: "".to_string(), + start_end_columns: instruction.operator.start_end_columns, + message: "".to_string(), + }); + continue; + } + + // Replace Instruction + instruction.operator.token_name = "sub".to_string(); + + // Replace Operands + instruction.operands.insert( + 1, + Token { + token_name: "x0".to_string(), + start_end_columns: (0, 0), + token_type: Default::default(), + }, + ); + + // Update Line Info + //monaco_line_info[instruction.line_number].update_pseudo_string(vec![instruction]); + } + "negw" => { + // Set Pseudo Description + let info = PseudoDescription { + name: "negw".to_string(), + syntax: "negw rd, rs1".to_string(), + translation_lines: vec!["subw rd, x0, rs".to_string()], + }; + monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); + + // Check operands + if instruction.operands.len() != 2 { + instruction.errors.push(Error { + error_name: IncorrectNumberOfOperands, + token_causing_error: "".to_string(), + start_end_columns: instruction.operator.start_end_columns, + message: "".to_string(), + }); + continue; + } + + // Replace Instruction + instruction.operator.token_name = "subw".to_string(); + + // Replace Operands + instruction.operands.insert( + 1, + Token { + token_name: "x0".to_string(), + start_end_columns: (0, 0), + token_type: Default::default(), + }, + ); + + // Update Line Info + //monaco_line_info[instruction.line_number].update_pseudo_string(vec![instruction]); + } + "sext.w" => { + // Set Pseudo Description + let info = PseudoDescription { + name: "sext.w".to_string(), + syntax: "sext.w rd, rs1".to_string(), + translation_lines: vec!["addiw rd, rs, 0".to_string()], + }; + monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); + + // Check operands + if instruction.operands.len() != 2 { + instruction.errors.push(Error { + error_name: IncorrectNumberOfOperands, + token_causing_error: "".to_string(), + start_end_columns: instruction.operator.start_end_columns, + message: "".to_string(), + }); + continue; + } + + // Replace Instruction + instruction.operator.token_name = "addiw".to_string(); + + // Replace Operands + instruction.operands.insert( + 2, + Token { + token_name: "0".to_string(), + start_end_columns: (0, 0), + token_type: Default::default(), + }, + ); + + // Update Line Info + //monaco_line_info[instruction.line_number].update_pseudo_string(vec![instruction]); + } + "seqz" => { + // Set Pseudo Description + let info = PseudoDescription { + name: "seqz".to_string(), + syntax: "seqz rd, rs1".to_string(), + translation_lines: vec!["sltiu rd, rs, 1".to_string()], + }; + monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); + + // Check operands + if instruction.operands.len() != 2 { + instruction.errors.push(Error { + error_name: IncorrectNumberOfOperands, + token_causing_error: "".to_string(), + start_end_columns: instruction.operator.start_end_columns, + message: "".to_string(), + }); + continue; + } + + // Replace Instruction + instruction.operator.token_name = "sltiu".to_string(); + + // Replace Operands + instruction.operands.insert( + 2, + Token { + token_name: "1".to_string(), + start_end_columns: (0, 0), + token_type: Default::default(), + }, + ); + + // Update Line Info + //monaco_line_info[instruction.line_number].update_pseudo_string(vec![instruction]); + } + "snez" => { + // Set Pseudo Description + let info = PseudoDescription { + name: "snez".to_string(), + syntax: "snez rd, rs1".to_string(), + translation_lines: vec!["sltu rd, x0, rs".to_string()], + }; + monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); + + // Check operands + if instruction.operands.len() != 2 { + instruction.errors.push(Error { + error_name: IncorrectNumberOfOperands, + token_causing_error: "".to_string(), + start_end_columns: instruction.operator.start_end_columns, + message: "".to_string(), + }); + continue; + } + + // Replace Instruction + instruction.operator.token_name = "sltu".to_string(); + + // Replace Operands + instruction.operands.insert( + 1, + Token { + token_name: "x0".to_string(), + start_end_columns: (0, 0), + token_type: Default::default(), + }, + ); + + // Update Line Info + //monaco_line_info[instruction.line_number].update_pseudo_string(vec![instruction]); + } + "sltz" => { + // Set Pseudo Description + let info = PseudoDescription { + name: "sltz".to_string(), + syntax: "sltz rd, rs1".to_string(), + translation_lines: vec!["slt rd, rs, x0".to_string()], + }; + monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); + + // Check operands + if instruction.operands.len() != 2 { + instruction.errors.push(Error { + error_name: IncorrectNumberOfOperands, + token_causing_error: "".to_string(), + start_end_columns: instruction.operator.start_end_columns, + message: "".to_string(), + }); + continue; + } + + // Replace Instruction + instruction.operator.token_name = "slt".to_string(); + + // Replace Operands + instruction.operands.insert( + 2, + Token { + token_name: "x0".to_string(), + start_end_columns: (0, 0), + token_type: Default::default(), + }, + ); + + // Update Line Info + //monaco_line_info[instruction.line_number].update_pseudo_string(vec![instruction]); + } + "sgtz" => { + // Set Pseudo Description + let info = PseudoDescription { + name: "sgtz".to_string(), + syntax: "sgtz rd, rs1".to_string(), + translation_lines: vec!["slt rd, x0, rs".to_string()], + }; + monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); + + // Check operands + if instruction.operands.len() != 2 { + instruction.errors.push(Error { + error_name: IncorrectNumberOfOperands, + token_causing_error: "".to_string(), + start_end_columns: instruction.operator.start_end_columns, + message: "".to_string(), + }); + continue; + } + + // Replace Instruction + instruction.operator.token_name = "slt".to_string(); + + // Replace Operands + instruction.operands.insert( + 1, + Token { + token_name: "x0".to_string(), + start_end_columns: (0, 0), + token_type: Default::default(), + }, + ); + + // Update Line Info + //monaco_line_info[instruction.line_number].update_pseudo_string(vec![instruction]); + } + "beqz" => { + // Set Pseudo Description + let info = PseudoDescription { + name: "beqz".to_string(), + syntax: "beqz rs1, offset".to_string(), + translation_lines: vec!["beq rs, x0, offset".to_string()], + }; + monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); + + // Check operands + if instruction.operands.len() != 2 { + instruction.errors.push(Error { + error_name: IncorrectNumberOfOperands, + token_causing_error: "".to_string(), + start_end_columns: instruction.operator.start_end_columns, + message: "".to_string(), + }); + continue; + } + + // Replace Instruction + instruction.operator.token_name = "beq".to_string(); + + // Replace Operands + instruction.operands.insert( + 1, + Token { + token_name: "x0".to_string(), + start_end_columns: (0, 0), + token_type: Default::default(), + }, + ); + + // Update Line Info + //monaco_line_info[instruction.line_number].update_pseudo_string(vec![instruction]); + } + "bnez" => { + // Set Pseudo Description + let info = PseudoDescription { + name: "bnez".to_string(), + syntax: "bnez rs1, offset".to_string(), + translation_lines: vec!["bne rs, x0, offset".to_string()], + }; + monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); + + // Check operands + if instruction.operands.len() != 2 { + instruction.errors.push(Error { + error_name: IncorrectNumberOfOperands, + token_causing_error: "".to_string(), + start_end_columns: instruction.operator.start_end_columns, + message: "".to_string(), + }); + continue; + } + + // Replace Instruction + instruction.operator.token_name = "bne".to_string(); + + // Replace Operands + instruction.operands.insert( + 1, + Token { + token_name: "x0".to_string(), + start_end_columns: (0, 0), + token_type: Default::default(), + }, + ); + instruction.operands[2].start_end_columns = (0, 0); + + // Update Line Info + //monaco_line_info[instruction.line_number].update_pseudo_string(vec![instruction]); + } + "blez" => { + // Set Pseudo Description + let info = PseudoDescription { + name: "blez".to_string(), + syntax: "blez rs1, offset".to_string(), + translation_lines: vec!["bge x0, rs, offset".to_string()], + }; + monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); + + // Check operands + if instruction.operands.len() != 2 { + instruction.errors.push(Error { + error_name: IncorrectNumberOfOperands, + token_causing_error: "".to_string(), + start_end_columns: instruction.operator.start_end_columns, + message: "".to_string(), + }); + continue; + } + + // Replace Instruction + instruction.operator.token_name = "bge".to_string(); + + // Replace Operands + instruction.operands.insert( + 0, + Token { + token_name: "x0".to_string(), + start_end_columns: (0, 0), + token_type: Default::default(), + }, + ); + + // Update Line Info + //monaco_line_info[instruction.line_number].update_pseudo_string(vec![instruction]); + } + "bgez" => { + // Set Pseudo Description + let info = PseudoDescription { + name: "bgez".to_string(), + syntax: "bgez rs1, offset".to_string(), + translation_lines: vec!["bge rs, x0, offset".to_string()], + }; + monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); + + // Check operands + if instruction.operands.len() != 2 { + instruction.errors.push(Error { + error_name: IncorrectNumberOfOperands, + token_causing_error: "".to_string(), + start_end_columns: instruction.operator.start_end_columns, + message: "".to_string(), + }); + continue; + } + + // Replace Instruction + instruction.operator.token_name = "bge".to_string(); + + // Replace Operands + instruction.operands.insert( + 1, + Token { + token_name: "x0".to_string(), + start_end_columns: (0, 0), + token_type: Default::default(), + }, + ); + + // Update Line Info + //monaco_line_info[instruction.line_number].update_pseudo_string(vec![instruction]); + } + "bltz" => { + // Set Pseudo Description + let info = PseudoDescription { + name: "bltz".to_string(), + syntax: "bltz rs1, offset".to_string(), + translation_lines: vec!["blt rs, x0, offset".to_string()], + }; + monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); + + // Check operands + if instruction.operands.len() != 2 { + instruction.errors.push(Error { + error_name: IncorrectNumberOfOperands, + token_causing_error: "".to_string(), + start_end_columns: instruction.operator.start_end_columns, + message: "".to_string(), + }); + continue; + } + + // Replace Instruction + instruction.operator.token_name = "blt".to_string(); + + // Replace Operands + instruction.operands.insert( + 1, + Token { + token_name: "x0".to_string(), + start_end_columns: (0, 0), + token_type: Default::default(), + }, + ); + + // Update Line Info + //monaco_line_info[instruction.line_number].update_pseudo_string(vec![instruction]); + } + "bgtz" => { + // Set Pseudo Description + let info = PseudoDescription { + name: "bgtz".to_string(), + syntax: "bgtz rs1, offset".to_string(), + translation_lines: vec!["blt x0, rs, offset".to_string()], + }; + monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); + + // Check operands + if instruction.operands.len() != 2 { + instruction.errors.push(Error { + error_name: IncorrectNumberOfOperands, + token_causing_error: "".to_string(), + start_end_columns: instruction.operator.start_end_columns, + message: "".to_string(), + }); + continue; + } + + // Replace Instruction + instruction.operator.token_name = "blt".to_string(); + + // Replace Operands + instruction.operands.insert( + 0, + Token { + token_name: "x0".to_string(), + start_end_columns: (0, 0), + token_type: Default::default(), + }, + ); + + // Update Line Info + //monaco_line_info[instruction.line_number].update_pseudo_string(vec![instruction]); + } + "bgt" => { + // Set Pseudo Description + let info = PseudoDescription { + name: "bgt".to_string(), + syntax: "bgt rs, rt, offset".to_string(), + translation_lines: vec!["blt rt, rs, offset".to_string()], + }; + monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); + + // Check operands + if instruction.operands.len() != 3 { + instruction.errors.push(Error { + error_name: IncorrectNumberOfOperands, + token_causing_error: "".to_string(), + start_end_columns: instruction.operator.start_end_columns, + message: "".to_string(), + }); + continue; + } + + // Replace Instruction + instruction.operator.token_name = "blt".to_string(); + + // Reorder Operands + let tmp = instruction.operands[0].token_name.clone(); + instruction.operands[0].token_name = instruction.operands[1].token_name.clone(); + instruction.operands[1].token_name = tmp; + + // Update Line Info + //monaco_line_info[instruction.line_number].update_pseudo_string(vec![instruction]); + } + "ble" => { + // Set Pseudo Description + let info = PseudoDescription { + name: "ble".to_string(), + syntax: "ble rs, rt, offset".to_string(), + translation_lines: vec!["bge rt, rs, offset".to_string()], + }; + monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); + + // Check operands + if instruction.operands.len() != 3 { + instruction.errors.push(Error { + error_name: IncorrectNumberOfOperands, + token_causing_error: "".to_string(), + start_end_columns: instruction.operator.start_end_columns, + message: "".to_string(), + }); + continue; + } + + // Replace Instruction + instruction.operator.token_name = "bge".to_string(); + + // Reorder Operands + let tmp = instruction.operands[0].token_name.clone(); + instruction.operands[0].token_name = instruction.operands[1].token_name.clone(); + instruction.operands[1].token_name = tmp; + + // Update Line Info + //monaco_line_info[instruction.line_number].update_pseudo_string(vec![instruction]); + } + "bgtu" => { + // Set Pseudo Description + let info = PseudoDescription { + name: "bgtu".to_string(), + syntax: "bgtu rs, rt, offset".to_string(), + translation_lines: vec!["bltu rt, rs, offset".to_string()], + }; + monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); + + // Check operands + if instruction.operands.len() != 3 { + instruction.errors.push(Error { + error_name: IncorrectNumberOfOperands, + token_causing_error: "".to_string(), + start_end_columns: instruction.operator.start_end_columns, + message: "".to_string(), + }); + continue; + } + + // Replace Instruction + instruction.operator.token_name = "bltu".to_string(); + + // Reorder Operands + let tmp = instruction.operands[0].token_name.clone(); + instruction.operands[0].token_name = instruction.operands[1].token_name.clone(); + instruction.operands[1].token_name = tmp; + + // Update Line Info + //monaco_line_info[instruction.line_number].update_pseudo_string(vec![instruction]); + } + "bleu" => { + // Set Pseudo Description + let info = PseudoDescription { + name: "bleu".to_string(), + syntax: "bleu rs, rt, offset".to_string(), + translation_lines: vec!["bgeu rt, rs, offset".to_string()], + }; + monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); + + // Check operands + if instruction.operands.len() != 3 { + instruction.errors.push(Error { + error_name: IncorrectNumberOfOperands, + token_causing_error: "".to_string(), + start_end_columns: instruction.operator.start_end_columns, + message: "".to_string(), + }); + continue; + } + + // Replace Instruction + instruction.operator.token_name = "bgeu".to_string(); + + // Reorder Operands + let tmp = instruction.operands[0].token_name.clone(); + instruction.operands[0].token_name = instruction.operands[1].token_name.clone(); + instruction.operands[1].token_name = tmp; + + // Update Line Info + //monaco_line_info[instruction.line_number].update_pseudo_string(vec![instruction]); + } + // Start of Jump Pseudo-Instructions + "j" => { + // Set Pseudo Description + let info = PseudoDescription { + name: "j".to_string(), + syntax: "j offset".to_string(), + translation_lines: vec!["jal x0, offset".to_string()], + }; + monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); + + // Check operands + if instruction.operands.len() != 1 { + instruction.errors.push(Error { + error_name: IncorrectNumberOfOperands, + token_causing_error: "".to_string(), + start_end_columns: instruction.operator.start_end_columns, + message: "".to_string(), + }); + continue; + } + + // Replace Instruction + instruction.operator.token_name = "jal".to_string(); + + // Replace Operands + instruction.operands.insert( + 0, + Token { + token_name: "x0".to_string(), + start_end_columns: (0, 0), + token_type: Default::default(), + }, + ); + + // Update Line Info + //monaco_line_info[instruction.line_number].update_pseudo_string(vec![instruction]); + } + "jr" => { + // Set Pseudo Description + let info = PseudoDescription { + name: "jr".to_string(), + syntax: "jr offset".to_string(), + translation_lines: vec!["jal x1, offset".to_string()], + }; + monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); + + // Check operands + if instruction.operands.len() != 1 { + instruction.errors.push(Error { + error_name: IncorrectNumberOfOperands, + token_causing_error: "".to_string(), + start_end_columns: instruction.operator.start_end_columns, + message: "".to_string(), + }); + continue; + } + + // Replace Instruction + instruction.operator.token_name = "jal".to_string(); + + // Replace Operands + instruction.operands.insert( + 0, + Token { + token_name: "x1".to_string(), + start_end_columns: (0, 0), + token_type: Default::default(), + }, + ); + + // Update Line Info + //monaco_line_info[instruction.line_number].update_pseudo_string(vec![instruction]); + } + "ret" => { + // Set Pseudo Description + let info = PseudoDescription { + name: "ret".to_string(), + syntax: "ret".to_string(), + translation_lines: vec!["jalr x1, 0(x0)".to_string()], + }; + monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); + + // Check operands + if instruction.operands.len() != 0 { + instruction.errors.push(Error { + error_name: IncorrectNumberOfOperands, + token_causing_error: "".to_string(), + start_end_columns: instruction.operator.start_end_columns, + message: "".to_string(), + }); + continue; + } + + // Replace Instruction + instruction.operator.token_name = "jalr".to_string(); + + // Replace Operands + instruction.operands.insert( + 0, + Token { + token_name: "x1".to_string(), + start_end_columns: (0, 0), + token_type: Default::default(), + }, + ); + instruction.operands.insert( + 1, + Token { + token_name: "0(x0)".to_string(), + start_end_columns: (0, 0), + token_type: Default::default(), + }, + ); + + // Update Line Info + //monaco_line_info[instruction.line_number].update_pseudo_string(vec![instruction]); + } + // Start of F extension pseudo-instructions + "fmv.s" => { + // Set Pseudo Description + let info = PseudoDescription { + name: "fmv.s".to_string(), + syntax: "fmv.s frd, frs1".to_string(), + translation_lines: vec!["fsgnj.s frd, frs, frs".to_string()], + }; + monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); + + // Check operands + if instruction.operands.len() != 2 { + instruction.errors.push(Error { + error_name: IncorrectNumberOfOperands, + token_causing_error: "".to_string(), + start_end_columns: instruction.operator.start_end_columns, + message: "".to_string(), + }); + continue; + } + + // Replace Instruction + instruction.operator.token_name = "fsgnj.s".to_string(); + + // Replace Operands + instruction.operands.insert( + 2, + instruction.operands[1].clone() + ); + + // Update Line Info + //monaco_line_info[instruction.line_number].update_pseudo_string(vec![instruction]); + } + "fabs.s" => { + // Set Pseudo Description + let info = PseudoDescription { + name: "fabs.s".to_string(), + syntax: "fabs.s frd, frs1".to_string(), + translation_lines: vec!["fsgnjx.s frd, frs, frs".to_string()], + }; + monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); + + // Check operands + if instruction.operands.len() != 2 { + instruction.errors.push(Error { + error_name: IncorrectNumberOfOperands, + token_causing_error: "".to_string(), + start_end_columns: instruction.operator.start_end_columns, + message: "".to_string(), + }); + continue; + } + + // Replace Instruction + instruction.operator.token_name = "fsgnjx.s".to_string(); + + // Replace Operands + instruction.operands.insert( + 2, + instruction.operands[1].clone() + ); + + // Update Line Info + //monaco_line_info[instruction.line_number].update_pseudo_string(vec![instruction]); + } + "fneg.s" => { + // Set Pseudo Description + let info = PseudoDescription { + name: "fneg.s".to_string(), + syntax: "fneg.s frd, frs1".to_string(), + translation_lines: vec!["fsgnjn.s frd, frs, frs".to_string()], + }; + monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); + + // Check operands + if instruction.operands.len() != 2 { + instruction.errors.push(Error { + error_name: IncorrectNumberOfOperands, + token_causing_error: "".to_string(), + start_end_columns: instruction.operator.start_end_columns, + message: "".to_string(), + }); + continue; + } + + // Replace Instruction + instruction.operator.token_name = "fsgnjn.s".to_string(); + + // Replace Operands + instruction.operands.insert( + 2, + instruction.operands[1].clone() + ); + + // Update Line Info + //monaco_line_info[instruction.line_number].update_pseudo_string(vec![instruction]); + } + _ => {} + } + } + + //insert all new new instructions + for instruction in vec_of_added_instructions { + instructions.insert(instruction.instruction_number, instruction); + } +} + ///the second part of completing pseudo-instructions. LW and SW with labels requires the address of the label to be known, /// the second part of this must occur after the label hashmap is completed. pub fn complete_lw_sw_pseudo_instructions( diff --git a/src/tests/parser/parser_assembler_main.rs b/src/tests/parser/parser_assembler_main.rs index 01bed3e64..c1f1dabd8 100644 --- a/src/tests/parser/parser_assembler_main.rs +++ b/src/tests/parser/parser_assembler_main.rs @@ -799,7 +799,7 @@ use crate::parser::parser_structs_and_enums::ErrorType::{ UnrecognizedInstruction, UnsupportedInstruction, }; use crate::parser::parser_structs_and_enums::{ - Architecture, ProgramInfo, SUPPORTED_INSTRUCTIONS, UNSUPPORTED_INSTRUCTIONS, + Architecture, ProgramInfo, SUPPORTED_INSTRUCTIONS_MIPS, UNSUPPORTED_INSTRUCTIONS_MIPS, }; use crate::parser::parsing::{create_label_map, separate_data_and_text, tokenize_program}; use crate::parser::pseudo_instruction_parsing::{ @@ -1088,7 +1088,7 @@ fn create_binary_vec_works_with_all_mod_4_options() { #[test] fn no_unsupported_instructions_are_recognized_by_parser() { - for instruction in UNSUPPORTED_INSTRUCTIONS { + for instruction in UNSUPPORTED_INSTRUCTIONS_MIPS { let result = parser(instruction.to_string(), Architecture::MIPS) .0 .monaco_line_info; @@ -1098,7 +1098,7 @@ fn no_unsupported_instructions_are_recognized_by_parser() { #[test] fn supported_instructions_are_recognized_by_parser() { - for instruction in SUPPORTED_INSTRUCTIONS { + for instruction in SUPPORTED_INSTRUCTIONS_MIPS { let result = parser(instruction.to_string(), Architecture::MIPS) .0 .monaco_line_info; diff --git a/static/assembly_examples/riscv_test.asm b/static/assembly_examples/riscv_test.asm index 66836342f..7c017e8e1 100644 --- a/static/assembly_examples/riscv_test.asm +++ b/static/assembly_examples/riscv_test.asm @@ -1,3 +1,4 @@ main: jal x1, 2047 + fmv.s f1, f2 ret \ No newline at end of file From d8bd2c7878e2fd7035396bc270abd2484c1c15b5 Mon Sep 17 00:00:00 2001 From: Geetis <59862178+Geetis@users.noreply.github.com> Date: Thu, 7 Mar 2024 12:51:34 -0500 Subject: [PATCH 03/10] All instruction test cases along with fixes to issues discovered --- src/parser/assembling.rs | 9 - src/parser/parser_assembler_main.rs | 1517 +---------------- src/parser/parser_structs_and_enums.rs | 147 +- src/parser/parsing.rs | 6 +- src/parser/pseudo_instruction_parsing.rs | 33 +- src/tests/parser/parser_assembler_main.rs | 1811 ++++++++++++++++++++- static/assembly_examples/riscv_test.asm | 2 +- 7 files changed, 1911 insertions(+), 1614 deletions(-) diff --git a/src/parser/assembling.rs b/src/parser/assembling.rs index 3ae1de2bd..4c11fb276 100644 --- a/src/parser/assembling.rs +++ b/src/parser/assembling.rs @@ -20,8 +20,6 @@ use std::collections::HashMap; use super::parser_structs_and_enums::{RISCV_FP_REGISTERS, RISCV_GP_REGISTERS}; -use gloo_console::log; - ///This function takes an instruction whose operands it is supposed to read, the order of expected operand types and then ///the order these operands should be concatenated onto the binary representation of the string ///the function returns the instruction it was given with any errors and the binary of the operands added on. @@ -229,7 +227,6 @@ pub fn read_operands_riscv( //the binary is pushed to the string representations vec. Otherwise, the errors are pushed to the instruction.errors vec. match operand_type { RegisterGP => { - log!("RegisterGP"); instruction.operands[i].token_type = TokenType::RegisterGP; bit_lengths.push(5); @@ -239,8 +236,6 @@ pub fn read_operands_riscv( GeneralPurpose, ); - log!("Register Results: ", format!("{:?}", register_results)); - // Vector holding all register arguments binary_representation.push(register_results.0 as u32); if register_results.1.is_some() { @@ -265,7 +260,6 @@ pub fn read_operands_riscv( UpperImmediate => // Can be used to represent offsets for J-type instructions { - log!("Upper Immediate"); instruction.operands[i].token_type = TokenType::Immediate; bit_lengths.push(20); // 20 bits to represent upper immediates @@ -552,9 +546,6 @@ pub fn read_memory_address_riscv( let immediate_results = read_immediate(offset_str, start_end_columns, 16); let register_results = read_register_riscv(&cleaned_base, start_end_columns, GeneralPurpose); - log!("Immediate: ", format!("{:?}", immediate_results)); - log!("Register: ", format!("{:?}", register_results)); - //any errors found in the read_immediate or read_register functions are collected into a vec //if there were any errors, those are returned let mut return_errors: Vec = Vec::new(); diff --git a/src/parser/parser_assembler_main.rs b/src/parser/parser_assembler_main.rs index 245593264..7ac4dd2e6 100644 --- a/src/parser/parser_assembler_main.rs +++ b/src/parser/parser_assembler_main.rs @@ -5,7 +5,8 @@ use crate::parser::parser_structs_and_enums::ProgramInfo; use crate::parser::parser_structs_and_enums::*; use crate::parser::parsing::*; use crate::parser::pseudo_instruction_parsing::{ - complete_lw_sw_pseudo_instructions, expand_pseudo_instructions_and_assign_instruction_numbers, expand_pseudo_instructions_and_assign_instruction_numbers_riscv + complete_lw_sw_pseudo_instructions, expand_pseudo_instructions_and_assign_instruction_numbers, + expand_pseudo_instructions_and_assign_instruction_numbers_riscv, }; use std::collections::HashMap; @@ -51,7 +52,7 @@ pub fn parser(file_string: String, arch: Architecture) -> (ProgramInfo, Vec &mut program_info.data, &labels, &mut program_info.monaco_line_info, - arch + arch, ); let (binary, data_starting_point) = @@ -105,7 +106,7 @@ pub fn parser(file_string: String, arch: Architecture) -> (ProgramInfo, Vec &mut program_info.data, &labels, &mut program_info.monaco_line_info, - arch + arch, ); let (binary, data_starting_point) = @@ -1538,7 +1539,6 @@ pub fn read_instructions( } } } - //print_instruction_contents(instruction.clone()); } } @@ -1550,17 +1550,8 @@ pub fn read_instructions_riscv( for mut instruction in &mut instruction_list.iter_mut() { match &*instruction.operator.token_name.to_lowercase() { "add" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b0000000, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -1573,10 +1564,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0110011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -1591,17 +1578,8 @@ pub fn read_instructions_riscv( } } "sub" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b0100000, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -1614,10 +1592,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0110011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -1632,17 +1606,8 @@ pub fn read_instructions_riscv( } } "sll" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b0000000, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -1655,10 +1620,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0110011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -1673,17 +1634,8 @@ pub fn read_instructions_riscv( } } "slt" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b0000000, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -1696,10 +1648,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0110011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -1714,17 +1662,8 @@ pub fn read_instructions_riscv( } } "sltu" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b0000000, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -1737,10 +1676,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0110011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -1755,17 +1690,8 @@ pub fn read_instructions_riscv( } } "xor" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b0000000, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -1778,10 +1704,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0110011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -1796,17 +1718,8 @@ pub fn read_instructions_riscv( } } "srl" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b0000000, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -1819,10 +1732,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0110011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -1837,17 +1746,8 @@ pub fn read_instructions_riscv( } } "sra" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b0100000, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -1860,10 +1760,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0110011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -1878,17 +1774,8 @@ pub fn read_instructions_riscv( } } "or" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b0000000, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -1901,10 +1788,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0110011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -1919,17 +1802,8 @@ pub fn read_instructions_riscv( } } "and" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b0000000, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -1942,10 +1816,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0110011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -1962,11 +1832,6 @@ pub fn read_instructions_riscv( "addi" => // This instruction requires the 12-bit immediate to be sign extended before moving to the emulator's register { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterGP, RegisterGP, Immediate], @@ -1978,10 +1843,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -1996,11 +1857,6 @@ pub fn read_instructions_riscv( } } "slti" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterGP, RegisterGP, Immediate], @@ -2012,10 +1868,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -2030,11 +1882,6 @@ pub fn read_instructions_riscv( } } "sltiu" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterGP, RegisterGP, Immediate], @@ -2046,10 +1893,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -2064,10 +1907,6 @@ pub fn read_instructions_riscv( } } "xori" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -2080,10 +1919,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -2098,11 +1933,6 @@ pub fn read_instructions_riscv( } } "ori" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterGP, RegisterGP, Immediate], @@ -2114,10 +1944,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -2132,11 +1958,6 @@ pub fn read_instructions_riscv( } } "andi" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterGP, RegisterGP, Immediate], @@ -2148,10 +1969,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -2166,11 +1983,6 @@ pub fn read_instructions_riscv( } } "slli" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b00000, 5); // Check if the next 2 bits are needed @@ -2185,10 +1997,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -2203,11 +2011,6 @@ pub fn read_instructions_riscv( } } "srli" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b00000, 5); // Check if the next 2 bits are needed @@ -2222,10 +2025,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -2240,11 +2039,6 @@ pub fn read_instructions_riscv( } } "srai" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b01000, 5); // Check if the next 2 bits are needed @@ -2259,10 +2053,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -2277,11 +2067,6 @@ pub fn read_instructions_riscv( } } "lb" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterGP, MemoryAddress], @@ -2293,10 +2078,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0000011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -2311,11 +2092,6 @@ pub fn read_instructions_riscv( } } "lh" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterGP, MemoryAddress], @@ -2327,10 +2103,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0000011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -2345,11 +2117,6 @@ pub fn read_instructions_riscv( } } "lw" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterGP, MemoryAddress], @@ -2361,10 +2128,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0000011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -2379,11 +2142,6 @@ pub fn read_instructions_riscv( } } "lbu" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterGP, MemoryAddress], @@ -2395,10 +2153,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0000011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -2413,11 +2167,6 @@ pub fn read_instructions_riscv( } } "lhu" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterGP, MemoryAddress], @@ -2429,10 +2178,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0000011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -2447,11 +2192,6 @@ pub fn read_instructions_riscv( } } "sb" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterGP, MemoryAddress], @@ -2463,14 +2203,9 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0100011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); // Encoded as I-type, but needs reordering for S-type instruction.binary = immediate_to_stored(instruction.binary); - log!("3. Reordered: ", format!("{:032b}", instruction.binary)); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -2487,11 +2222,6 @@ pub fn read_instructions_riscv( } } "sh" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterGP, MemoryAddress], @@ -2503,14 +2233,9 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0100011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); // Encoded as I-type, but needs reordering for S-type instruction.binary = immediate_to_stored(instruction.binary); - log!("3. Reordered: ", format!("{:032b}", instruction.binary)); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -2527,11 +2252,6 @@ pub fn read_instructions_riscv( } } "sw" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterGP, MemoryAddress], @@ -2543,14 +2263,9 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0100011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); // Encoded as I-type, but needs reordering for S-type instruction.binary = immediate_to_stored(instruction.binary); - log!("3. Reordered: ", format!("{:032b}", instruction.binary)); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -2567,12 +2282,6 @@ pub fn read_instructions_riscv( } } "jal" => { - log!("jal instruction"); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Read as U-type instruction and reorder immediate value after read_operands_riscv( instruction, @@ -2585,17 +2294,9 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1101111, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); // Reorder immediate instruction.binary = upper_to_jump(instruction.binary); - log!( - "3. Reordered Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -2610,13 +2311,6 @@ pub fn read_instructions_riscv( } } "jalr" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - - log!("Instruction: ", format!("{:?}", instruction)); - read_operands_riscv( instruction, vec![RegisterGP, MemoryAddress], @@ -2628,10 +2322,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1100111, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -2646,11 +2336,6 @@ pub fn read_instructions_riscv( } } "beq" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterGP, RegisterGP, Immediate], @@ -2662,16 +2347,8 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1100011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); instruction.binary = immediate_to_branch(instruction.binary); - log!( - "3. Reordered Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -2687,11 +2364,6 @@ pub fn read_instructions_riscv( } } "bne" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterGP, RegisterGP, Immediate], @@ -2703,16 +2375,8 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1100011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); instruction.binary = immediate_to_branch(instruction.binary); - log!( - "3. Reordered Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -2728,11 +2392,6 @@ pub fn read_instructions_riscv( } } "blt" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterGP, RegisterGP, Immediate], @@ -2744,16 +2403,8 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1100011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); instruction.binary = immediate_to_branch(instruction.binary); - log!( - "3. Reordered Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -2768,11 +2419,6 @@ pub fn read_instructions_riscv( } } "bge" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterGP, RegisterGP, Immediate], @@ -2784,16 +2430,8 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1100011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); instruction.binary = immediate_to_branch(instruction.binary); - log!( - "3. Reordered Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -2808,11 +2446,6 @@ pub fn read_instructions_riscv( } } "bltu" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterGP, RegisterGP, Immediate], @@ -2824,16 +2457,8 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1100011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); instruction.binary = immediate_to_branch(instruction.binary); - log!( - "3. Reordered Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -2848,11 +2473,6 @@ pub fn read_instructions_riscv( } } "bgeu" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterGP, RegisterGP, Immediate], @@ -2864,16 +2484,8 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1100011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); instruction.binary = immediate_to_branch(instruction.binary); - log!( - "3. Reordered Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -2888,17 +2500,8 @@ pub fn read_instructions_riscv( } } "ecall" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // ecall instruction encoding does not change instruction.binary = 0b00000000000000000000000001110011; - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -2913,17 +2516,8 @@ pub fn read_instructions_riscv( } } "ebreak" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // ebreak instruction encoding does not change instruction.binary = 0b00000000000100000000000001110011; - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -2938,17 +2532,8 @@ pub fn read_instructions_riscv( } } "uret" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // uret instruction encoding does not change instruction.binary = 0b00000000001000000000000001110011; - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -2963,17 +2548,8 @@ pub fn read_instructions_riscv( } } "sret" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // uret instruction encoding does not change instruction.binary = 0b00010000001000000000000001110011; - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -2988,17 +2564,8 @@ pub fn read_instructions_riscv( } } "mret" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // uret instruction encoding does not change instruction.binary = 0b00110000001000000000000001110011; - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -3013,17 +2580,8 @@ pub fn read_instructions_riscv( } } "wfi" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // uret instruction encoding does not change instruction.binary = 0b00010000010100000000000001110011; - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -3038,17 +2596,8 @@ pub fn read_instructions_riscv( } } "fence.i" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // fence.i instruction encoding does not change instruction.binary = 0b00000000000000000001000000001111; - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -3063,11 +2612,6 @@ pub fn read_instructions_riscv( } } "lui" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterGP, UpperImmediate], @@ -3079,10 +2623,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0110111, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -3097,12 +2637,6 @@ pub fn read_instructions_riscv( } } "auipc" => { - log!("auipc instruction"); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterGP, UpperImmediate], @@ -3114,10 +2648,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0010111, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -3134,11 +2664,6 @@ pub fn read_instructions_riscv( "addiw" => // Start of RV64I Instructions { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterGP, RegisterGP, Immediate], @@ -3150,10 +2675,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0011011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -3168,11 +2689,6 @@ pub fn read_instructions_riscv( } } "slliw" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b0000000, 7); @@ -3187,10 +2703,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0011011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -3205,11 +2717,6 @@ pub fn read_instructions_riscv( } } "srliw" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b0000000, 7); @@ -3224,10 +2731,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0011011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -3242,11 +2745,6 @@ pub fn read_instructions_riscv( } } "sraiw" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b01000, 7); @@ -3261,10 +2759,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0011011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -3279,17 +2773,8 @@ pub fn read_instructions_riscv( } } "addw" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b0000000, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -3302,10 +2787,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0111011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -3320,17 +2801,8 @@ pub fn read_instructions_riscv( } } "subw" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b0100000, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -3343,10 +2815,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0111011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -3361,17 +2829,8 @@ pub fn read_instructions_riscv( } } "sllw" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b0000000, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -3384,10 +2843,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0111011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -3402,17 +2857,8 @@ pub fn read_instructions_riscv( } } "srlw" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b0000000, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -3425,10 +2871,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0111011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -3443,17 +2885,8 @@ pub fn read_instructions_riscv( } } "sraw" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b0100000, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -3466,10 +2899,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0111011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -3484,11 +2913,6 @@ pub fn read_instructions_riscv( } } "lwu" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterGP, MemoryAddress], @@ -3500,10 +2924,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0000011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -3518,11 +2938,6 @@ pub fn read_instructions_riscv( } } "ld" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterGP, MemoryAddress], @@ -3534,10 +2949,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0000011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -3553,11 +2964,6 @@ pub fn read_instructions_riscv( } } "sd" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterGP, MemoryAddress], @@ -3569,14 +2975,9 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0100011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); // Encoded as I-type, but needs reordering for S-type instruction.binary = immediate_to_stored(instruction.binary); - log!("3. Reordered: ", format!("{:032b}", instruction.binary)); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -3594,17 +2995,8 @@ pub fn read_instructions_riscv( "mul" => // Start of RV32M { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b0000001, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -3617,10 +3009,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0110011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -3635,17 +3023,8 @@ pub fn read_instructions_riscv( } } "mulh" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b0000001, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -3658,10 +3037,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0110011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -3677,17 +3052,8 @@ pub fn read_instructions_riscv( } } "mulhsu" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b0000001, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -3700,10 +3066,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0110011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -3718,17 +3080,8 @@ pub fn read_instructions_riscv( } } "mulhu" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b0000001, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -3741,10 +3094,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0110011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -3759,17 +3108,8 @@ pub fn read_instructions_riscv( } } "div" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b0000001, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -3782,10 +3122,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0110011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -3800,17 +3136,8 @@ pub fn read_instructions_riscv( } } "divu" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b0000001, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -3823,10 +3150,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0110011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -3841,17 +3164,8 @@ pub fn read_instructions_riscv( } } "rem" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b0000001, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -3864,10 +3178,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0110011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -3882,17 +3192,9 @@ pub fn read_instructions_riscv( } } "remu" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); // Funct7 instruction.binary = append_binary(instruction.binary, 0b0000001, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -3905,10 +3207,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0110011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -3925,17 +3223,8 @@ pub fn read_instructions_riscv( "mulw" => // Start of RV64M { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b0000001, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -3948,10 +3237,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0111011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -3966,17 +3251,8 @@ pub fn read_instructions_riscv( } } "divw" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b0000001, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -3989,10 +3265,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0111011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -4007,17 +3279,8 @@ pub fn read_instructions_riscv( } } "divuw" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b0000001, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -4030,10 +3293,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0111011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -4048,17 +3307,8 @@ pub fn read_instructions_riscv( } } "remw" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b0000001, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -4071,10 +3321,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0111011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -4089,17 +3335,8 @@ pub fn read_instructions_riscv( } } "remuw" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct7 instruction.binary = append_binary(instruction.binary, 0b0000001, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -4112,10 +3349,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0111011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -4129,14 +3362,9 @@ pub fn read_instructions_riscv( monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); } } - "fmadd.s" => // Start of RV32F + "fmadd.s" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterFP, RegisterFP, RegisterFP, RegisterFP], @@ -4148,10 +3376,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1000011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -4166,11 +3390,6 @@ pub fn read_instructions_riscv( } } "fmsub.s" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterFP, RegisterFP, RegisterFP, RegisterFP], @@ -4182,10 +3401,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1000111, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -4200,11 +3415,6 @@ pub fn read_instructions_riscv( } } "fnmsub.s" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterFP, RegisterFP, RegisterFP, RegisterFP], @@ -4216,10 +3426,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1001011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -4234,11 +3440,6 @@ pub fn read_instructions_riscv( } } "fnmadd.s" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterFP, RegisterFP, RegisterFP, RegisterFP], @@ -4250,10 +3451,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1001111, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -4268,17 +3465,8 @@ pub fn read_instructions_riscv( } } "fadd.s" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt instruction.binary = append_binary(instruction.binary, 0b0000000, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -4291,10 +3479,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -4310,17 +3494,8 @@ pub fn read_instructions_riscv( } } "fsub.s" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt instruction.binary = append_binary(instruction.binary, 0b0000100, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -4333,10 +3508,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -4352,17 +3523,8 @@ pub fn read_instructions_riscv( } } "fmul.s" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt instruction.binary = append_binary(instruction.binary, 0b0001000, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -4375,10 +3537,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -4394,17 +3552,8 @@ pub fn read_instructions_riscv( } } "fdiv.s" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt instruction.binary = append_binary(instruction.binary, 0b0001100, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -4417,10 +3566,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -4436,17 +3581,8 @@ pub fn read_instructions_riscv( } } "fsqrt.s" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt + padding for absent register instruction.binary = append_binary(instruction.binary, 0b010110000000, 12); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -4459,10 +3595,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -4477,17 +3609,8 @@ pub fn read_instructions_riscv( } } "fsgnj.s" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt instruction.binary = append_binary(instruction.binary, 0b0010000, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -4500,10 +3623,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -4518,17 +3637,8 @@ pub fn read_instructions_riscv( } } "fsgnjn.s" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt instruction.binary = append_binary(instruction.binary, 0b0010000, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -4541,10 +3651,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -4559,17 +3665,8 @@ pub fn read_instructions_riscv( } } "fsgnjx.s" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt instruction.binary = append_binary(instruction.binary, 0b0010000, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -4582,10 +3679,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -4600,17 +3693,8 @@ pub fn read_instructions_riscv( } } "fmin.s" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt instruction.binary = append_binary(instruction.binary, 0b0010100, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -4623,10 +3707,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -4643,17 +3723,8 @@ pub fn read_instructions_riscv( } } "fmax.s" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt instruction.binary = append_binary(instruction.binary, 0b0010100, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -4666,10 +3737,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -4686,17 +3753,8 @@ pub fn read_instructions_riscv( } } "fcvt.w.s" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt + padding for absent register instruction.binary = append_binary(instruction.binary, 0b110000000000, 12); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -4709,10 +3767,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -4727,17 +3781,8 @@ pub fn read_instructions_riscv( } } "fcvt.wu.s" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt + rs2 instruction.binary = append_binary(instruction.binary, 0b110000000001, 12); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -4750,10 +3795,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -4768,17 +3809,8 @@ pub fn read_instructions_riscv( } } "fmv.x.w" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt + rs2 instruction.binary = append_binary(instruction.binary, 0b111000000000, 12); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -4791,10 +3823,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -4809,17 +3837,8 @@ pub fn read_instructions_riscv( } } "feq.s" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt instruction.binary = append_binary(instruction.binary, 0b1010000, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -4832,10 +3851,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -4850,17 +3865,8 @@ pub fn read_instructions_riscv( } } "flt.s" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt instruction.binary = append_binary(instruction.binary, 0b1010000, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -4873,10 +3879,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -4891,17 +3893,8 @@ pub fn read_instructions_riscv( } } "fle.s" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt instruction.binary = append_binary(instruction.binary, 0b1010000, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -4914,10 +3907,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -4932,17 +3921,8 @@ pub fn read_instructions_riscv( } } "fclass.s" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt + rs2 instruction.binary = append_binary(instruction.binary, 0b111000000000, 12); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -4955,10 +3935,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -4973,17 +3949,8 @@ pub fn read_instructions_riscv( } } "fcvt.s.w" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt + rs2 instruction.binary = append_binary(instruction.binary, 0b110100000000, 12); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -4996,10 +3963,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -5014,17 +3977,8 @@ pub fn read_instructions_riscv( } } "fcvt.s.wu" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt + rs2 instruction.binary = append_binary(instruction.binary, 0b110100000001, 12); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -5037,10 +3991,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -5055,17 +4005,8 @@ pub fn read_instructions_riscv( } } "fmv.w.x" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt + rs2 instruction.binary = append_binary(instruction.binary, 0b111100000000, 12); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -5078,10 +4019,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -5096,11 +4033,6 @@ pub fn read_instructions_riscv( } } "fmadd.d" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterFP, RegisterFP, RegisterFP, RegisterFP], @@ -5112,10 +4044,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1000011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -5130,11 +4058,6 @@ pub fn read_instructions_riscv( } } "fmsub.d" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterFP, RegisterFP, RegisterFP, RegisterFP], @@ -5146,10 +4069,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1000111, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -5164,11 +4083,6 @@ pub fn read_instructions_riscv( } } "fnmsub.d" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterFP, RegisterFP, RegisterFP, RegisterFP], @@ -5180,10 +4094,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1001011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -5198,11 +4108,6 @@ pub fn read_instructions_riscv( } } "fnmadd.d" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterFP, RegisterFP, RegisterFP, RegisterFP], @@ -5214,10 +4119,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1001111, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -5232,17 +4133,8 @@ pub fn read_instructions_riscv( } } "fadd.d" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt instruction.binary = append_binary(instruction.binary, 0b0000001, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -5255,10 +4147,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -5274,17 +4162,8 @@ pub fn read_instructions_riscv( } } "fsub.d" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt instruction.binary = append_binary(instruction.binary, 0b0000101, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -5297,10 +4176,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -5316,17 +4191,8 @@ pub fn read_instructions_riscv( } } "fmul.d" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt instruction.binary = append_binary(instruction.binary, 0b0001001, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -5339,10 +4205,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -5358,17 +4220,8 @@ pub fn read_instructions_riscv( } } "fdiv.d" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt instruction.binary = append_binary(instruction.binary, 0b0001101, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -5381,10 +4234,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -5400,18 +4249,9 @@ pub fn read_instructions_riscv( } } "fsqrt.d" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt + rs2 instruction.binary = append_binary(instruction.binary, 0b010110100000, 12); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - + read_operands_riscv( instruction, vec![RegisterFP, RegisterFP], @@ -5423,10 +4263,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -5441,17 +4277,8 @@ pub fn read_instructions_riscv( } } "fsgnj.d" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt instruction.binary = append_binary(instruction.binary, 0b0010001, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -5464,10 +4291,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -5482,17 +4305,8 @@ pub fn read_instructions_riscv( } } "fsgnjn.d" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt instruction.binary = append_binary(instruction.binary, 0b0010001, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -5505,10 +4319,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -5523,17 +4333,8 @@ pub fn read_instructions_riscv( } } "fsgnjx.d" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt instruction.binary = append_binary(instruction.binary, 0b0010001, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -5546,10 +4347,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -5564,17 +4361,8 @@ pub fn read_instructions_riscv( } } "fmin.d" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt instruction.binary = append_binary(instruction.binary, 0b0010101, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -5587,10 +4375,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -5607,17 +4391,8 @@ pub fn read_instructions_riscv( } } "fmax.d" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt instruction.binary = append_binary(instruction.binary, 0b0010101, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -5630,10 +4405,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -5650,17 +4421,8 @@ pub fn read_instructions_riscv( } } "fcvt.s.d" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt + rs2 instruction.binary = append_binary(instruction.binary, 0b010000000001, 12); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -5673,10 +4435,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -5691,17 +4449,8 @@ pub fn read_instructions_riscv( } } "fcvt.d.s" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt + rs2 instruction.binary = append_binary(instruction.binary, 0b010000100000, 12); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -5714,10 +4463,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -5732,17 +4477,8 @@ pub fn read_instructions_riscv( } } "feq.d" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt instruction.binary = append_binary(instruction.binary, 0b1010001, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -5755,10 +4491,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -5773,17 +4505,8 @@ pub fn read_instructions_riscv( } } "flt.d" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt instruction.binary = append_binary(instruction.binary, 0b1010001, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -5796,10 +4519,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -5814,17 +4533,8 @@ pub fn read_instructions_riscv( } } "fle.d" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt instruction.binary = append_binary(instruction.binary, 0b1010001, 7); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -5837,10 +4547,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -5855,17 +4561,8 @@ pub fn read_instructions_riscv( } } "fclass.d" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt + rs2 instruction.binary = append_binary(instruction.binary, 0b111000100000, 12); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -5878,10 +4575,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -5896,17 +4589,8 @@ pub fn read_instructions_riscv( } } "fcvt.w.d" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt + rs2 instruction.binary = append_binary(instruction.binary, 0b110000100000, 12); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -5919,10 +4603,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -5937,17 +4617,8 @@ pub fn read_instructions_riscv( } } "fcvt.wu.d" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt + rs2 instruction.binary = append_binary(instruction.binary, 0b110000100001, 12); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -5960,10 +4631,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -5978,17 +4645,8 @@ pub fn read_instructions_riscv( } } "fcvt.d.w" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt + rs2 instruction.binary = append_binary(instruction.binary, 0b110100100000, 12); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -6001,10 +4659,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -6019,17 +4673,8 @@ pub fn read_instructions_riscv( } } "fcvt.d.wu" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt + rs2 instruction.binary = append_binary(instruction.binary, 0b110100100001, 12); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -6042,10 +4687,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -6060,11 +4701,6 @@ pub fn read_instructions_riscv( } } "flw" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterFP, MemoryAddress], @@ -6076,10 +4712,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0000111, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -6094,11 +4726,6 @@ pub fn read_instructions_riscv( } } "fsw" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterFP, MemoryAddress], @@ -6110,14 +4737,9 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0100111, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); // Encoded as I-type, but needs reordering for S-type instruction.binary = immediate_to_stored(instruction.binary); - log!("3. Reordered: ", format!("{:032b}", instruction.binary)); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -6132,11 +4754,6 @@ pub fn read_instructions_riscv( } } "fld" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - read_operands_riscv( instruction, vec![RegisterFP, MemoryAddress], @@ -6148,10 +4765,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0000111, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -6166,10 +4779,6 @@ pub fn read_instructions_riscv( } } "fsd" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -6182,14 +4791,9 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b0100111, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); // Encoded as I-type, but needs reordering for S-type instruction.binary = immediate_to_stored(instruction.binary); - log!("3. Reordered: ", format!("{:032b}", instruction.binary)); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -6204,17 +4808,8 @@ pub fn read_instructions_riscv( } } "fcvt.l.s" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt + rs2 instruction.binary = append_binary(instruction.binary, 0b110000000010, 12); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -6227,10 +4822,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -6245,17 +4836,8 @@ pub fn read_instructions_riscv( } } "fcvt.lu.s" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt + rs2 instruction.binary = append_binary(instruction.binary, 0b110000000011, 12); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -6268,10 +4850,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -6286,17 +4864,8 @@ pub fn read_instructions_riscv( } } "fcvt.s.l" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt + rs2 instruction.binary = append_binary(instruction.binary, 0b110100000010, 12); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -6309,10 +4878,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -6327,17 +4892,8 @@ pub fn read_instructions_riscv( } } "fcvt.s.lu" => { - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); - // Funct5 + fmt + rs2 instruction.binary = append_binary(instruction.binary, 0b110100000011, 12); - log!( - "Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); read_operands_riscv( instruction, @@ -6350,10 +4906,6 @@ pub fn read_instructions_riscv( // Opcode instruction.binary = append_binary(instruction.binary, 0b1010011, 7); - log!( - "2. Instruction Binary: ", - format!("{:032b}", instruction.binary) - ); //Pseudo-instructions already have text in mouse_hover_string so we check if there's text there already before adding in the blurb if monaco_line_info[instruction.line_number] @@ -6396,13 +4948,8 @@ fn immediate_to_stored(mut bin: u32) -> u32 { // Extract bits 11-7 from the second segment let rs2 = (bin >> 7) & 0b11111; - log!("Bits to move (24-20): ", format!("{:05b}", lower_imm)); - log!("Bits to move (11-7): ", format!("{:05b}", rs2)); - // Clear bits 24-20 and 11-7 - bin &= !((0b11111 << 20) | (0b11111 << 6)); - - log!("Cleared bits: ", format!("{:032b}", bin)); + bin &= !((0b11111 << 20) | (0b111111 << 6)); // Move bits 24-20 to positions 11-7 let moved_imm = lower_imm << 7; @@ -6419,32 +4966,21 @@ fn immediate_to_stored(mut bin: u32) -> u32 { // Converts an I-type instruction to B-type instruction // Easier to encode in this manner fn immediate_to_branch(mut bin: u32) -> u32 { - log!("Binary: ", format!("{:032b}", bin)); - log!("Immediate: ", format!("{:012b}", (bin >> 20))); - // Extract bits imm[4:1] from the immediate, last bit is ignored let lower_imm = (bin >> 21) & 0b1111; // Extract imm[10:5] let upper_imm = (bin >> 25) & 0b111111; - log!("lower_imm: ", format!("{:032b}", lower_imm)); - log!("upper_imm: ", format!("{:032b}", upper_imm)); - // Extract bit 11 and bit 12 let bit_11 = (bin >> 30) & 0b1; let bit_12 = (bin >> 31) & 0b1; - log!("bit 11: ", format!("{:032b}", bit_11)); - log!("bit 12: ", format!("{:032b}", bit_12)); - + // Extract rs1 and rs2 let rs1 = (bin >> 7) & 0b11111; let rs2 = (bin >> 15) & 0b11111; - log!("rs1: ", format!("{:032b}", rs1)); - log!("rs2: ", format!("{:032b}", rs2)); - // Clear bits 24-20, rs1, and rs2 bin &= !((0b11111 << 20) | (0b11111 << 15) | (0b11111 << 7)); @@ -6471,28 +5007,25 @@ fn immediate_to_branch(mut bin: u32) -> u32 { // Reorder the immediate value to comply with J-type format fn upper_to_jump(mut bin: u32) -> u32 { - // Extract bits 24-20 from the first segment - let lower_imm = (bin >> 20) & 0b11111; - - // Extract bits 11-7 from the second segment - let rs2 = (bin >> 7) & 0b11111; - - log!("Bits to move (24-20): ", format!("{:05b}", lower_imm)); - log!("Bits to move (11-7): ", format!("{:05b}", rs2)); - - // Clear bits 24-20 and 11-7 - bin &= !((0b11111 << 20) | (0b11111 << 6)); - - log!("Cleared bits: ", format!("{:032b}", bin)); - - // Move bits 24-20 to positions 11-7 - let moved_imm = lower_imm << 7; + // Extract bits immediate + let imm = bin >> 12; + + // Extract bits imm[1-10] + let lower_imm = (imm >> 1) & 0b1111111111; + + // Extracts bits imm[12:19] + let upper_imm = imm >> 12; + + // Extract bit imm[11] + let bit_11 = (imm >> 11) & 1; - // Move bits 11-7 to positions 24-20 - let moved_rs2 = rs2 << 20; + // Extract bit imm[20] + let bit_20 = (imm >> 20) & 1; - // Combine the manipulated bits - bin |= moved_imm | moved_rs2; + // Clear bits [12-31] + bin &= !(0b11111111111111111111 << 12); + + bin |= (upper_imm << 12) | (bit_11 << 20) | (lower_imm << 21) | (bit_20 << 31); bin } diff --git a/src/parser/parser_structs_and_enums.rs b/src/parser/parser_structs_and_enums.rs index 07e604c90..8a5afb547 100644 --- a/src/parser/parser_structs_and_enums.rs +++ b/src/parser/parser_structs_and_enums.rs @@ -272,27 +272,144 @@ pub const SUPPORTED_INSTRUCTIONS_MIPS: [&str; 64] = [ "sll", "slt", "sltu", "sub", "sub.d", "sub.s", "sw", "swc1", ]; -pub const SUPPORTED_INSTRUCTIONS_RISCV:[&str; 131] = [ +pub const SUPPORTED_INSTRUCTIONS_RISCV: [&str; 131] = [ // RV32I - "lui", "auipc", "addi", "slti", "xori", "ori", "andi", "slli", "srli", "srai", "add", "sub", "sll", "slt", - "sltu", "cor", "srl", "sra", "or", "and", "fence", "fence.i", "csrrw", "csrrs", "csrrc", "csrrwi", "csrrsi", - "csrrci", "ecall", "ebreak", "uret", "sret", "mret", "wfi", "sfence.vma", "lb", "lh", "lw", "lbu", "lhu", "sb", - "sh", "sw", "jal", "jalr", "beq", "bne", "blt", "bge", "bltu", "bgeu", + "lui", + "auipc", + "addi", + "slti", + "xori", + "ori", + "andi", + "slli", + "srli", + "srai", + "add", + "sub", + "sll", + "slt", + "sltu", + "cor", + "srl", + "sra", + "or", + "and", + "fence", + "fence.i", + "csrrw", + "csrrs", + "csrrc", + "csrrwi", + "csrrsi", + "csrrci", + "ecall", + "ebreak", + "uret", + "sret", + "mret", + "wfi", + "sfence.vma", + "lb", + "lh", + "lw", + "lbu", + "lhu", + "sb", + "sh", + "sw", + "jal", + "jalr", + "beq", + "bne", + "blt", + "bge", + "bltu", + "bgeu", // RV64I - "addiw", "slliw", "srliw", "addw", "subw", "sllw", "srlw", "sraw", "lwu", "ld", "sd", + "addiw", + "slliw", + "srliw", + "addw", + "subw", + "sllw", + "srlw", + "sraw", + "lwu", + "ld", + "sd", // RV32M - "mul", "mulh", "mulhsu", "mulhu", "div", "divu", "rem", "remu", + "mul", + "mulh", + "mulhsu", + "mulhu", + "div", + "divu", + "rem", + "remu", // RV64M - "mulw", "divw", "divuw", "remw", "remuw", + "mulw", + "divw", + "divuw", + "remw", + "remuw", // RV32F - "fmadd.s", "fmsub.s", "fnmsub.s", "fnmadd.s", "fadd.s", "fsub.s", "fmul.s", "fdiv.s", "fsqrt.s", - "fsgnj.s", "fsgnjn.s", "fsgnjx.s", "fmin.s", "fmax.s", "fcvt.w.s", "fcvt.wu.s", "fmv.x.w", "feq.s", - "flt.s", "fle.s", "fclass.s", "fcvt.s.w", "fcvt.s.wu", "fmv.w.x", "fmadd.d", "fmsub.d", "fnmadd.d", - "fnmsub.d", "fadd.d", "fsub.d", "fmul.d", "fdiv.d", "fsqrt.d", "fsgnj.d", "fsgnjn.d", "fsgnjx.d", - "fmin.d", "fmax.d", "fcvt.s.d", "fcvt.d.s", "feq.d", "flt.d", "fle.d", "fclass.d", "fcvt.w.d", - "fcvt.wu.d", "fcvt.d.w", "fcvt.d.wu", "flw", "fsw", "fld", "fsd", + "fmadd.s", + "fmsub.s", + "fnmsub.s", + "fnmadd.s", + "fadd.s", + "fsub.s", + "fmul.s", + "fdiv.s", + "fsqrt.s", + "fsgnj.s", + "fsgnjn.s", + "fsgnjx.s", + "fmin.s", + "fmax.s", + "fcvt.w.s", + "fcvt.wu.s", + "fmv.x.w", + "feq.s", + "flt.s", + "fle.s", + "fclass.s", + "fcvt.s.w", + "fcvt.s.wu", + "fmv.w.x", + "fmadd.d", + "fmsub.d", + "fnmadd.d", + "fnmsub.d", + "fadd.d", + "fsub.d", + "fmul.d", + "fdiv.d", + "fsqrt.d", + "fsgnj.d", + "fsgnjn.d", + "fsgnjx.d", + "fmin.d", + "fmax.d", + "fcvt.s.d", + "fcvt.d.s", + "feq.d", + "flt.d", + "fle.d", + "fclass.d", + "fcvt.w.d", + "fcvt.wu.d", + "fcvt.d.w", + "fcvt.d.wu", + "flw", + "fsw", + "fld", + "fsd", // RV64F - "fcvt.l.s", "fcvt.lu.s", "fcvt.s.l", "fcvt.s.lu", + "fcvt.l.s", + "fcvt.lu.s", + "fcvt.s.l", + "fcvt.s.lu", ]; pub const UNSUPPORTED_INSTRUCTIONS_MIPS: [&str; 408] = [ diff --git a/src/parser/parsing.rs b/src/parser/parsing.rs index 46ae4bac3..b0f1c95ea 100644 --- a/src/parser/parsing.rs +++ b/src/parser/parsing.rs @@ -471,8 +471,7 @@ pub fn suggest_error_corrections( let given_string = &instruction.operator.token_name; let mut closest: (usize, String) = (usize::MAX, "".to_string()); - if arch == Architecture::MIPS - { + if arch == Architecture::MIPS { for instruction in SUPPORTED_INSTRUCTIONS_MIPS { if levenshtein(given_string, instruction) < closest.0 { closest.0 = levenshtein(given_string, instruction); @@ -480,8 +479,7 @@ pub fn suggest_error_corrections( } } } - if arch == Architecture::RISCV - { + if arch == Architecture::RISCV { for instruction in SUPPORTED_INSTRUCTIONS_RISCV { if levenshtein(given_string, instruction) < closest.0 { closest.0 = levenshtein(given_string, instruction); diff --git a/src/parser/pseudo_instruction_parsing.rs b/src/parser/pseudo_instruction_parsing.rs index c329b3452..ed8e66228 100644 --- a/src/parser/pseudo_instruction_parsing.rs +++ b/src/parser/pseudo_instruction_parsing.rs @@ -5,8 +5,6 @@ use crate::parser::parser_structs_and_enums::{ }; use std::collections::HashMap; -use gloo_console::log; - ///Iterates through the instruction list and translates pseudo-instructions into real instructions. /// LW and SW with labelled memory are not completely translated in this step because they require /// the address of the labelled memory to be known which is not found until after all other pseudo-instructions @@ -1262,7 +1260,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( //vec_of_added_instructions is needed because of rust ownership rules. It will not let us //insert into instruction_list while instruction_list is being iterated over. - let mut vec_of_added_instructions: Vec = Vec::new(); + let vec_of_added_instructions: Vec = Vec::new(); //iterate through every instruction and check if the operator is a pseudo-instruction for (i, mut instruction) in &mut instructions.iter_mut().enumerate() { @@ -1883,7 +1881,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( // Replace Instruction instruction.operator.token_name = "blt".to_string(); - + // Reorder Operands let tmp = instruction.operands[0].token_name.clone(); instruction.operands[0].token_name = instruction.operands[1].token_name.clone(); @@ -1914,7 +1912,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( // Replace Instruction instruction.operator.token_name = "bge".to_string(); - + // Reorder Operands let tmp = instruction.operands[0].token_name.clone(); instruction.operands[0].token_name = instruction.operands[1].token_name.clone(); @@ -1945,7 +1943,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( // Replace Instruction instruction.operator.token_name = "bltu".to_string(); - + // Reorder Operands let tmp = instruction.operands[0].token_name.clone(); instruction.operands[0].token_name = instruction.operands[1].token_name.clone(); @@ -1976,7 +1974,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( // Replace Instruction instruction.operator.token_name = "bgeu".to_string(); - + // Reorder Operands let tmp = instruction.operands[0].token_name.clone(); instruction.operands[0].token_name = instruction.operands[1].token_name.clone(); @@ -2127,10 +2125,9 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( instruction.operator.token_name = "fsgnj.s".to_string(); // Replace Operands - instruction.operands.insert( - 2, - instruction.operands[1].clone() - ); + instruction + .operands + .insert(2, instruction.operands[1].clone()); // Update Line Info //monaco_line_info[instruction.line_number].update_pseudo_string(vec![instruction]); @@ -2159,10 +2156,9 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( instruction.operator.token_name = "fsgnjx.s".to_string(); // Replace Operands - instruction.operands.insert( - 2, - instruction.operands[1].clone() - ); + instruction + .operands + .insert(2, instruction.operands[1].clone()); // Update Line Info //monaco_line_info[instruction.line_number].update_pseudo_string(vec![instruction]); @@ -2191,10 +2187,9 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( instruction.operator.token_name = "fsgnjn.s".to_string(); // Replace Operands - instruction.operands.insert( - 2, - instruction.operands[1].clone() - ); + instruction + .operands + .insert(2, instruction.operands[1].clone()); // Update Line Info //monaco_line_info[instruction.line_number].update_pseudo_string(vec![instruction]); diff --git a/src/tests/parser/parser_assembler_main.rs b/src/tests/parser/parser_assembler_main.rs index c1f1dabd8..15cdf7f15 100644 --- a/src/tests/parser/parser_assembler_main.rs +++ b/src/tests/parser/parser_assembler_main.rs @@ -24,15 +24,1655 @@ mod parser_main_function_tests { } } -mod read_instructions_tests { +mod read_riscv_instructions_tests { + + use crate::tests::parser::parser_assembler_main::helper_functions::instruction_parser_riscv; + + // RV32I Instructions + + #[test] + fn read_instructions_add() { + + let file_string = "add ra, t5, s0".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000000100011110000000010110011 + ); + } + + #[test] + fn read_instructions_sub() { + + let file_string = "sub x1, x2, x3".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b01000000001100010000000010110011 + ); + } + + #[test] + fn read_instructions_sll() { + + let file_string = "sll x4, x5, x6".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000000011000101001001000110011 + ); + } + + #[test] + fn read_instructions_slt() { + + let file_string = "slt x7, x8, x9".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000000100101000010001110110011 + ); + } + + #[test] + fn read_instructions_sltu() { + + let file_string = "sltu x10, x11, x12".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000000110001011011010100110011 + ); + } + + #[test] + fn read_instructions_xor() { + + let file_string = "xor x13, x14, x15".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000000111101110100011010110011 + ); + } + + #[test] + fn read_instructions_srl() { + + let file_string = "srl x16, x17, x18".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000001001010001101100000110011 + ); + } + + #[test] + fn read_instructions_sra() { + + let file_string = "sra x19, x20, x21".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b01000001010110100101100110110011 + ); + } + + #[test] + fn read_instructions_or() { + + let file_string = "or x22, x23, x24".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000001100010111110101100110011 + ); + } + + #[test] + fn read_instructions_and() { + + let file_string = "and x25, x26, x27".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000001101111010111110010110011 + ); + } + + #[test] + fn read_instructions_addi() { + + let file_string = "addi x28, x29, x30".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000000000011101000111000010011 + ); + } + + #[test] + fn read_instructions_slti() { + + let file_string = "slti x31, t0, 150".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00001001011000101010111110010011 + ); + } + + #[test] + fn read_instructions_sltiu() { + + let file_string = "sltiu t1, t2, 241".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00001111000100111011001100010011 + ); + } + + #[test] + fn read_instructions_xori() { + + let file_string = "xori t3, t4, 440".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00011011100011101100111000010011 + ); + } + + #[test] + fn read_instructions_ori() { + + let file_string = "ori t5, t6, 621".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00100110110111111110111100010011 + ); + } + + #[test] + fn read_instructions_andi() { + + let file_string = "andi ra, sp, 1024".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b01000000000000010111000010010011 + ); + } + + #[test] + fn read_instructions_slli() { + + let file_string = "slli gp, tp, 5".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000000010100100001000110010011 + ); + } + + #[test] + fn read_instructions_srli() { + + let file_string = "srli s0, s1, 10".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000000101001001101010000010011 + ); + } + + #[test] + fn read_instructions_srai() { + + let file_string = "srai a0, a1, 6".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b01000000011001011101010100010011 + ); + } + + #[test] + fn read_instructions_lb() { + + let file_string = "lb a2, 150(a3)".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00001001011001101000011000000011 + ); + } + + #[test] + fn read_instructions_lh() { + + let file_string = "lh a4, 220(a5)".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00001101110001111001011100000011 + ); + } + + #[test] + fn read_instructions_lw() { + + let file_string = "lw a6, 32(a7)".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000010000010001010100000000011 + ); + } + + #[test] + fn read_instructions_lbu() { + + let file_string = "lbu s2, 128(s3)".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00001000000010011100100100000011 + ); + } + + #[test] + fn read_instructions_lhu() { + + let file_string = "lhu s4, 256(s5)".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00010000000010101101101000000011 + ); + } + + #[test] + fn read_instructions_sb() { + + let file_string = "sb s6, 512(s7)".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00100001011010111000000000100011 + ); + } + + #[test] + fn read_instructions_sh() { + + let file_string = "sh s8, 1024(s9)".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b01000001100011001001000000100011 + ); + } + + #[test] + fn read_instructions_sw() { + + let file_string = "sw s10, 2044(s11)".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b01111111101011011010111000100011 + ); + } + + #[test] + fn read_instructions_jal() { + + let file_string = "jal x1, 2044".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b01111111110000000000000011101111 + ); + } + + #[test] + fn read_instructions_jalr() { + + let file_string = "jalr x2, 128(x3)".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00001000000000011000000101100111 + ); + } + + #[test] + fn read_instructions_beq() { + + let file_string = "beq x4, x5, 256".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00010000010100100000000001100011 + ); + } + + #[test] + fn read_instructions_bne() { + + let file_string = "bne x6, x7, 512".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00100000011100110001000001100011 + ); + } + + #[test] + fn read_instructions_blt() { + + let file_string = "blt x8, x9, 1024".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b01000000100101000100000011100011 + ); + } + + #[test] + fn read_instructions_bge() { + + let file_string = "bge x10, x11, 256".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00010000101101010101000001100011 + ); + } + + #[test] + fn read_instructions_bltu() { + + let file_string = "bltu x12, x13, 64".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000100110101100110000001100011 + ); + } + + #[test] + fn read_instructions_bgeu() { + + let file_string = "bgeu x14, x15, 32".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000010111101110111000001100011 + ); + } + + #[test] + fn read_instructions_ecall() { + + let file_string = "ecall".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000000000000000000000001110011 + ); + } + + #[test] + fn read_instructions_ebreak() { + + let file_string = "ebreak".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000000000100000000000001110011 + ); + } + + #[test] + fn read_instructions_uret() { + + let file_string = "uret".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000000001000000000000001110011 + ); + } + + #[test] + fn read_instructions_sret() { + + let file_string = "sret".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00010000001000000000000001110011 + ); + } + + #[test] + fn read_instructions_mret() { + + let file_string = "mret".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00110000001000000000000001110011 + ); + } + + #[test] + fn read_instructions_wfi() { + + let file_string = "wfi".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00010000010100000000000001110011 + ); + } + + #[test] + fn read_instructions_fencei() { + + let file_string = "fence.i".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000000000000000001000000001111 + ); + } + + #[test] + fn read_instructions_lui() { + + let file_string = "lui x16, 4096".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000001000000000000100000110111 + ); + } + + #[test] + fn read_instructions_auipc() { + + let file_string = "auipc x17, 5024".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000001001110100000100010010111 + ); + } + + // RV64I Tests + + #[test] + fn read_instructions_addiw() { + + let file_string = "addiw x18, x19, 50".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000011001010011000100100011011 + ); + } + + #[test] + fn read_instructions_slliw() { + + let file_string = "slliw x20, x21, 16".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000001000010101001101000011011 + ); + } + + #[test] + fn read_instructions_srliw() { + + let file_string = "srliw x22, x23, 20".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000001010010111101101100011011 + ); + } + + #[test] + fn read_instructions_sraiw() { + + let file_string = "sraiw x24, x25, 10".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b01000000101011001101110000011011 + ); + } + + #[test] + fn read_instructions_addw() { + + let file_string = "addw x26, x27, x28".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000001110011011000110100111011 + ); + } + + #[test] + fn read_instructions_subw() { + + let file_string = "subw x29, x30, x31".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b01000001111111110000111010111011 + ); + } + + #[test] + fn read_instructions_sllw() { + + let file_string = "sllw ra, sp, gp".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000000001100010001000010111011 + ); + } + + #[test] + fn read_instructions_srlw() { + + let file_string = "srlw tp, t0, t1".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000000011000101101001000111011 + ); + } + + #[test] + fn read_instructions_sraw() { + + let file_string = "sraw t2, fp, s1".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b01000000100101000101001110111011 + ); + } + + #[test] + fn read_instructions_lwu() { + + let file_string = "lwu a0, 50(a1)".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000011001001011110010100000011 + ); + } + + #[test] + fn read_instructions_ld() { + + let file_string = "ld a2, 50(a3)".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000011001001101011011000000011 + ); + } + + #[test] + fn read_instructions_sd() { + + let file_string = "sd a4, 50(a5)".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000010111001111011100100100011 + ); + } + + // Start of RV32M + + #[test] + fn read_instructions_mul() { + + let file_string = "mul a6, a7, s2".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000011001010001000100000110011 + ); + } + + #[test] + fn read_instructions_mulh() { + + let file_string = "mulh s3, s4, s5".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000011010110100001100110110011 + ); + } + + #[test] + fn read_instructions_mulhsu() { + + let file_string = "mulhsu s6, s7, s8".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000011100010111010101100110011 + ); + } + + #[test] + fn read_instructions_mulhu() { + + let file_string = "mulhu s9, s10, s11".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000011101111010011110010110011 + ); + } + + #[test] + fn read_instructions_div() { + + let file_string = "div t3, t4, t5".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000011111011101100111000110011 + ); + } + + #[test] + fn read_instructions_divu() { + + let file_string = "divu t6, x1, x2".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000010001000001101111110110011 + ); + } + + #[test] + fn read_instructions_rem() { + + let file_string = "rem x3, x4, x5".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000010010100100110000110110011 + ); + } + + #[test] + fn read_instructions_remu() { + + let file_string = "remu x6, x7, x8".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000010100000111111001100110011 + ); + } + + // RV64M + + #[test] + fn read_instructions_mulw() { + + let file_string = "mulw x9, x10, x11".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000010101101010000010010111011 + ); + } + + #[test] + fn read_instructions_divw() { + + let file_string = "divw x12, x13, x14".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000010111001101100011000111011 + ); + } + + #[test] + fn read_instructions_divuw() { + + let file_string = "divuw x15, x16, x17".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000011000110000101011110111011 + ); + } + + #[test] + fn read_instructions_remw() { + + let file_string = "remw x18, x19, x20".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000011010010011110100100111011 + ); + } + + #[test] + fn read_instructions_remuw() { + + let file_string = "remuw x21, x22, x23".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000011011110110111101010111011 + ); + } + + // Start of RV32F + + #[test] + fn read_instructions_fmadds() { + + let file_string = "fmadd.s f1, f2, f3, f4".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00100000001100010111000011000011 + ); + } + + #[test] + fn read_instructions_fmsubs() { + + let file_string = "fmsub.s f5, f6, f7, f8".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b01000000011100110111001011000111 + ); + } + + #[test] + fn read_instructions_fnmsubs() { + + let file_string = "fnmsub.s f9, f10, f11, f12".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b01100000101101010111010011001011 + ); + } + + #[test] + fn read_instructions_fnmadds() { + + let file_string = "fnmadd.s f13, f14, f15, f16".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b10000000111101110111011011001111 + ); + } + + #[test] + fn read_instructions_fadds() { + + let file_string = "fadd.s f17, f18, f19".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000001001110010111100011010011 + ); + } + + #[test] + fn read_instructions_fsubs() { + + let file_string = "fsub.s f20, f21, f22".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00001001011010101111101001010011 + ); + } + + #[test] + fn read_instructions_fmuls() { + + let file_string = "fmul.s f23, f24, f25".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00010001100111000111101111010011 + ); + } + + #[test] + fn read_instructions_fdivs() { + + let file_string = "fdiv.s f26, f27, f28".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00011001110011011111110101010011 + ); + } + + #[test] + fn read_instructions_fsqrts() { + + let file_string = "fsqrt.s f29, f30".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b01011000000011110111111011010011 + ); + } + + #[test] + fn read_instructions_fsgnjs() { + + let file_string = "fsgnj.s f31, ft1, ft2".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00100000001000001000111111010011 + ); + } + + #[test] + fn read_instructions_fsgnjns() { + + let file_string = "fsgnjn.s ft3, ft4, ft5".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00100000010100100001000111010011 + ); + } + + #[test] + fn read_instructions_fsgnjxs() { + + let file_string = "fsgnjx.s f6, f7, f8".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00100000100000111010001101010011 + ); + } + + #[test] + fn read_instructions_fmins() { + + let file_string = "fmin.s fs1, fa0, fa1".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00101000101101010000010011010011 + ); + } + + #[test] + fn read_instructions_fmaxs() { + + let file_string = "fmax.s fa2, fa3, fa4".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00101000111001101001011001010011 + ); + } + + #[test] + fn read_instructions_fcvtws() { + + let file_string = "fcvt.w.s x1, fa5".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b11000000000001111111000011010011 + ); + } + + #[test] + fn read_instructions_fcvtwus() { + + let file_string = "fcvt.wu.s x2, fa6".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b11000000000110000111000101010011 + ); + } + + #[test] + fn read_instructions_fmvxw() { + + let file_string = "fmv.x.w x3, fa7".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b11100000000010001000000111010011 + ); + } + + #[test] + fn read_instructions_feqs() { + + let file_string = "feq.s x4, fs2, fs3".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b10100001001110010010001001010011 + ); + } + + #[test] + fn read_instructions_flts() { + + let file_string = "flt.s x5, fs4, fs5".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b10100001010110100001001011010011 + ); + } + + #[test] + fn read_instructions_fles() { + + let file_string = "fle.s x6, fs6, fs7".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b10100001011110110000001101010011 + ); + } + + #[test] + fn read_instructions_fclasss() { + + let file_string = "fclass.s x7, fs8".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b11100000000011000001001111010011 + ); + } + + #[test] + fn read_instructions_fcvtsw() { + + let file_string = "fcvt.s.w fs9, x8".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b11010000000001000111110011010011 + ); + } + + #[test] + fn read_instructions_fcvtswu() { + + let file_string = "fcvt.s.wu fs10, x9".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b11010000000101001111110101010011 + ); + } + + #[test] + fn read_instructions_fmvwx() { + + let file_string = "fmv.w.x fs11, x10".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b11110000000001010000110111010011 + ); + } + + #[test] + fn read_instructions_fmaddd() { + + let file_string = "fmadd.d ft8, ft9, ft10, ft11".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b11111011111011101111111001000011 + ); + } + + #[test] + fn read_instructions_fmsubd() { + + let file_string = "fmsub.d f1, f2, f3, f4".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00100010001100010111000011000111 + ); + } + + #[test] + fn read_instructions_fnmaddd() { + + let file_string = "fnmsub.d f5, f6, f7, f8".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b01000010011100110111001011001011 + ); + } + + #[test] + fn read_instructions_fnmsubd() { + + let file_string = "fnmadd.d f9, f10, f11, f12".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b01100010101101010111010011001111 + ); + } + + #[test] + fn read_instructions_faddd() { + + let file_string = "fadd.d f13, f14, f15".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00000010111101110111011011010011 + ); + } + + #[test] + fn read_instructions_fsubd() { + + let file_string = "fsub.d f16, f17, f18".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00001011001010001111100001010011 + ); + } + + #[test] + fn read_instructions_fmuld() { + + let file_string = "fmul.d f19, f20, f21".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00010011010110100111100111010011 + ); + } + + #[test] + fn read_instructions_fdivd() { + + let file_string = "fdiv.d f22, f23, f24".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00011011100010111111101101010011 + ); + } + + #[test] + fn read_instructions_fsqrtd() { + + let file_string = "fsqrt.d f25, f26".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b01011010000011010111110011010011 + ); + } + + #[test] + fn read_instructions_fsgnjd() { + + let file_string = "fsgnj.d f27, f28, f29".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00100011110111100000110111010011 + ); + } + + #[test] + fn read_instructions_fsgnjnd() { + + let file_string = "fsgnjn.d f30, f31, f1".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00100010000111111001111101010011 + ); + } + + #[test] + fn read_instructions_fsgnjxd() { + + let file_string = "fsgnjx.d f2, f3, f4".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00100010010000011010000101010011 + ); + } + + #[test] + fn read_instructions_fmind() { + + let file_string = "fmin.d f5, f6, f7".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00101010011100110000001011010011 + ); + } + + #[test] + fn read_instructions_fmaxd() { + + let file_string = "fmax.d f8, f9, f10".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00101010101001001001010001010011 + ); + } + + #[test] + fn read_instructions_fcvtsd() { + + let file_string = "fcvt.s.d f11, f12".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b01000000000101100111010111010011 + ); + } + + #[test] + fn read_instructions_fcvtds() { + + let file_string = "fcvt.d.s f13, f14".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b01000010000001110111011011010011 + ); + } + + #[test] + fn read_instructions_feqd() { + + let file_string = "feq.d x11, f15, f16".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b10100011000001111010010111010011 + ); + } + + #[test] + fn read_instructions_fltd() { + + let file_string = "flt.d x12, f17, f18".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b10100011001010001001011001010011 + ); + } + + #[test] + fn read_instructions_fled() { + + let file_string = "fle.d x13, f19, f20".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b10100011010010011000011011010011 + ); + } + + #[test] + fn read_instructions_fclassd() { + + let file_string = "fclass.d x14, f21".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b11100010000010101001011101010011 + ); + } + + #[test] + fn read_instructions_fcvtwd() { + + let file_string = "fcvt.w.d x15, f22".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b11000010000010110111011111010011 + ); + } + + #[test] + fn read_instructions_fcvtwud() { + + let file_string = "fcvt.wu.d x16, f23".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b11000010000110111111100001010011 + ); + } + + #[test] + fn read_instructions_fcvtdw() { + + let file_string = "fcvt.d.w f24, x17".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b11010010000010001111110001010011 + ); + } + + #[test] + fn read_instructions_fcvtdwu() { + + let file_string = "fcvt.d.wu f25, x18".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b11010010000110010111110011010011 + ); + } + + #[test] + fn read_instructions_flw() { + + let file_string = "flw f26, 128(x19)".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00001000000010011010110100000111 + ); + } + + #[test] + fn read_instructions_fsw() { + + let file_string = "fsw f27, 256(x20)".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00010001101110100010000000100111 + ); + } + + #[test] + fn read_instructions_fld() { + + let file_string = "fld f28, 512(x21)".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b00100000000010101011111000000111 + ); + } + + #[test] + fn read_instructions_fsd() { + + let file_string = "fsd f29, 1024(x22)".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b01000001110110110011000000100111 + ); + } + + #[test] + fn read_instructions_fcvtls() { + + let file_string = "fcvt.l.s x23, f30".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b11000000001011110111101111010011 + ); + } + + #[test] + fn read_instructions_fcvtlus() { + + let file_string = "fcvt.lu.s x24, f31".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b11000000001111111111110001010011 + ); + } + + #[test] + fn read_instructions_fcvtsl() { + + let file_string = "fcvt.s.l f1, x25".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b11010000001011001111000011010011 + ); + } + + #[test] + fn read_instructions_fcvtslu() { + + let file_string = "fcvt.s.lu f2, x26".to_string(); + + let instruction_list = instruction_parser_riscv(file_string); + + assert_eq!( + instruction_list[0].binary, + 0b11010000001111010111000101010011 + ); + } +} + +mod read_mips_instructions_tests { use crate::parser::parser_structs_and_enums::ErrorType::JALRRDRegisterZero; - use crate::tests::parser::parser_assembler_main::helper_functions::instruction_parser; + use crate::tests::parser::parser_assembler_main::helper_functions::instruction_parser_mips; #[test] fn read_instructions_add() { let file_string = "add $t1, $s6, $t2".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -44,7 +1684,7 @@ mod read_instructions_tests { fn read_instructions_addu() { let file_string = "addu $t1, $t2, $t3".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -56,7 +1696,7 @@ mod read_instructions_tests { fn read_instructions_sub() { let file_string = "sub $t1, $s6, $t2".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -68,7 +1708,7 @@ mod read_instructions_tests { fn read_instructions_mul() { let file_string = "mul $t1, $s6, $t2".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -80,7 +1720,7 @@ mod read_instructions_tests { fn read_instructions_div() { let file_string = "div $t1, $t1, $s6".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -92,7 +1732,7 @@ mod read_instructions_tests { fn read_instructions_lw() { let file_string = "lw $t1, 512($t1)".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -104,7 +1744,7 @@ mod read_instructions_tests { fn read_instructions_sw() { let file_string = "sw $t1, 512($t1)".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -116,7 +1756,7 @@ mod read_instructions_tests { fn read_instructions_lui() { let file_string = "lui $t1, 43690".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -128,7 +1768,7 @@ mod read_instructions_tests { fn read_instructions_aui() { let file_string = "aui $t1, $t1, 43690".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -140,7 +1780,7 @@ mod read_instructions_tests { fn read_instructions_addi() { let file_string = "addi $t1, $t2, 43690".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, 0b00100001010010011010101010101010 @@ -149,7 +1789,7 @@ mod read_instructions_tests { #[test] fn read_instructions_recognizes_addiu() { - let instruction_list = instruction_parser("addiu $t1, $t2, 0x64".to_string()); + let instruction_list = instruction_parser_mips("addiu $t1, $t2, 0x64".to_string()); assert_eq!( instruction_list[0].binary, @@ -161,7 +1801,7 @@ mod read_instructions_tests { fn read_instructions_and() { let file_string = "and $t1, $s6, $t2".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -173,7 +1813,7 @@ mod read_instructions_tests { fn read_instructions_or() { let file_string = "or $t1, $s6, $t2".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -185,7 +1825,7 @@ mod read_instructions_tests { fn read_instructions_ori() { let file_string = "ori $t1, $t2, 43690".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -197,7 +1837,7 @@ mod read_instructions_tests { fn read_instructions_andi() { let file_string = "andi $t1, $t2, 43690".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -209,7 +1849,7 @@ mod read_instructions_tests { fn read_instructions_dadd() { let file_string = "dadd $t1, $t2, $s6".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -221,7 +1861,7 @@ mod read_instructions_tests { fn read_instructions_dsub() { let file_string = "dsub $t1, $t2, $s6".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -233,7 +1873,7 @@ mod read_instructions_tests { fn read_instructions_dmul() { let file_string = "dmul $t1, $t2, $s6".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -245,7 +1885,7 @@ mod read_instructions_tests { fn read_instructions_ddiv() { let file_string = "ddiv $t1, $t1, $t2".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -257,7 +1897,7 @@ mod read_instructions_tests { fn read_instructions_add_s() { let file_string = "add.s $f9, $f10, $f22".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -269,7 +1909,7 @@ mod read_instructions_tests { fn read_instructions_add_d() { let file_string = "add.d $f9, $f10, $f22".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -281,7 +1921,7 @@ mod read_instructions_tests { fn read_instructions_sub_s() { let file_string = "sub.s $f9, $f10, $f22".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -293,7 +1933,7 @@ mod read_instructions_tests { fn read_instructions_sub_d() { let file_string = "sub.d $f9, $f10, $f22".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -305,7 +1945,7 @@ mod read_instructions_tests { fn read_instructions_mul_s() { let file_string = "mul.s $f9, $f10, $f22".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -317,7 +1957,7 @@ mod read_instructions_tests { fn read_instructions_mul_d() { let file_string = "mul.d $f9, $f10, $f22".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -329,7 +1969,7 @@ mod read_instructions_tests { fn read_instructions_div_s() { let file_string = "div.s $f9, $f10, $f22".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -341,7 +1981,7 @@ mod read_instructions_tests { fn read_instructions_div_d() { let file_string = "div.d $f9, $f10, $f22".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -353,7 +1993,7 @@ mod read_instructions_tests { fn read_instructions_dahi() { let file_string = "dahi $t1, 43690".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -365,7 +2005,7 @@ mod read_instructions_tests { fn read_instructions_dati() { let file_string = "dati $t1, 43690".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -377,7 +2017,7 @@ mod read_instructions_tests { fn read_instructions_daddi() { let file_string = "daddi $t1, $t2, 43690".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -389,7 +2029,7 @@ mod read_instructions_tests { fn read_instructions_daddiu() { let file_string = "daddiu $t1, $t2, 43690".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -401,7 +2041,7 @@ mod read_instructions_tests { fn read_instructions_daddu() { let file_string = "daddu $t1, $t2, $t3".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -413,7 +2053,7 @@ mod read_instructions_tests { fn read_instructions_dsubu() { let file_string = "dsubu $t1, $t2, $t3".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -425,7 +2065,7 @@ mod read_instructions_tests { fn read_instructions_dmulu() { let file_string = "dmulu $t1, $t2, $t3".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -437,7 +2077,7 @@ mod read_instructions_tests { fn read_instructions_ddivu() { let file_string = "ddivu $t1, $t1, $t2".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -449,7 +2089,7 @@ mod read_instructions_tests { fn read_instructions_slt() { let file_string = "slt $t1, $t2, $s6".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -461,7 +2101,7 @@ mod read_instructions_tests { fn read_instructions_sltu() { let file_string = "sltu $t1, $t2, $s6".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -473,7 +2113,7 @@ mod read_instructions_tests { fn read_instructions_swc1() { let file_string = "swc1 $f9, 43690($t2)".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -485,7 +2125,7 @@ mod read_instructions_tests { fn read_instructions_lwc1() { let file_string = "lwc1 $f9, 43690($t2)".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -497,7 +2137,7 @@ mod read_instructions_tests { fn read_instructions_mtc1() { let file_string = "mtc1 $t1, $f22".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -509,7 +2149,7 @@ mod read_instructions_tests { fn read_instructions_dmtc1() { let file_string = "dmtc1 $t1, $f22".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -521,7 +2161,7 @@ mod read_instructions_tests { fn read_instructions_mfc1() { let file_string = "mfc1 $t1, $f22".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -533,7 +2173,7 @@ mod read_instructions_tests { fn read_instructions_dmfc1() { let file_string = "dmfc1 $t1, $f22".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[0].binary, @@ -547,7 +2187,7 @@ mod read_instructions_tests { "Add $t1, $t2, $t3\nAddress: add $t1, #t2, $t3\nlw $t1, 400($t2)\nj Address" .to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[3].binary, @@ -561,7 +2201,7 @@ mod read_instructions_tests { "Add $t1, $t2, $t3\nAddress: add $t1, #t2, $t3\nlw $t1, 400($t2)\njal Address" .to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[3].binary, @@ -572,7 +2212,7 @@ mod read_instructions_tests { #[test] fn read_instructions_beq() { let file_string = "Add $t1, $t2, $t3\nAddress: add $t1, #t2, $t3\nlw $t1, 400($t2)\nbeq $t1, $t2, address".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[3].binary, @@ -583,7 +2223,7 @@ mod read_instructions_tests { #[test] fn read_instructions_bne() { let file_string = "Add $t1, $t2, $t3\nAddress: add $t1, #t2, $t3\nlw $t1, 400($t2)\nbne $t1, $t2, address".to_string(); - let instruction_list = instruction_parser(file_string); + let instruction_list = instruction_parser_mips(file_string); assert_eq!( instruction_list[3].binary, @@ -593,7 +2233,7 @@ mod read_instructions_tests { #[test] fn read_instructions_c_eq_s() { - let instruction_list = instruction_parser("c.eq.s $f9, $f22".to_string()); + let instruction_list = instruction_parser_mips("c.eq.s $f9, $f22".to_string()); assert_eq!( instruction_list[0].binary, @@ -603,7 +2243,7 @@ mod read_instructions_tests { #[test] fn read_instructions_c_eq_d() { - let instruction_list = instruction_parser("c.eq.d $f9, $f22".to_string()); + let instruction_list = instruction_parser_mips("c.eq.d $f9, $f22".to_string()); assert_eq!( instruction_list[0].binary, @@ -613,7 +2253,7 @@ mod read_instructions_tests { #[test] fn read_instructions_c_lt_s() { - let instruction_list = instruction_parser("c.lt.s $f9, $f22".to_string()); + let instruction_list = instruction_parser_mips("c.lt.s $f9, $f22".to_string()); assert_eq!( instruction_list[0].binary, @@ -623,7 +2263,7 @@ mod read_instructions_tests { #[test] fn read_instructions_c_lt_d() { - let instruction_list = instruction_parser("c.lt.d $f9, $f22".to_string()); + let instruction_list = instruction_parser_mips("c.lt.d $f9, $f22".to_string()); assert_eq!( instruction_list[0].binary, @@ -633,7 +2273,7 @@ mod read_instructions_tests { #[test] fn read_instructions_c_le_s() { - let instruction_list = instruction_parser("c.le.s $f9, $f22".to_string()); + let instruction_list = instruction_parser_mips("c.le.s $f9, $f22".to_string()); assert_eq!( instruction_list[0].binary, @@ -643,7 +2283,7 @@ mod read_instructions_tests { #[test] fn read_instructions_c_le_d() { - let instruction_list = instruction_parser("c.le.d $f9, $f22".to_string()); + let instruction_list = instruction_parser_mips("c.le.d $f9, $f22".to_string()); assert_eq!( instruction_list[0].binary, @@ -653,7 +2293,7 @@ mod read_instructions_tests { #[test] fn read_instructions_c_ngt_s() { - let instruction_list = instruction_parser("c.ngt.s $f9, $f22".to_string()); + let instruction_list = instruction_parser_mips("c.ngt.s $f9, $f22".to_string()); assert_eq!( instruction_list[0].binary, @@ -663,7 +2303,7 @@ mod read_instructions_tests { #[test] fn read_instructions_c_ngt_d() { - let instruction_list = instruction_parser("c.ngt.d $f9, $f22".to_string()); + let instruction_list = instruction_parser_mips("c.ngt.d $f9, $f22".to_string()); assert_eq!( instruction_list[0].binary, @@ -673,7 +2313,7 @@ mod read_instructions_tests { #[test] fn read_instructions_c_nge_s() { - let instruction_list = instruction_parser("c.nge.s $f9, $f22".to_string()); + let instruction_list = instruction_parser_mips("c.nge.s $f9, $f22".to_string()); assert_eq!( instruction_list[0].binary, @@ -683,7 +2323,7 @@ mod read_instructions_tests { #[test] fn read_instructions_c_nge_d() { - let instruction_list = instruction_parser("c.nge.d $f9, $f22".to_string()); + let instruction_list = instruction_parser_mips("c.nge.d $f9, $f22".to_string()); assert_eq!( instruction_list[0].binary, @@ -694,7 +2334,7 @@ mod read_instructions_tests { #[test] fn read_instruction_bc1t() { let instruction_list = - instruction_parser("instruction: add $t1, $t2, $t3\nbc1t instruction".to_string()); + instruction_parser_mips("instruction: add $t1, $t2, $t3\nbc1t instruction".to_string()); assert_eq!( instruction_list[1].binary, @@ -705,7 +2345,7 @@ mod read_instructions_tests { #[test] fn read_instruction_bc1f() { let instruction_list = - instruction_parser("instruction: add $t1, $t2, $t3\nbc1f instruction".to_string()); + instruction_parser_mips("instruction: add $t1, $t2, $t3\nbc1f instruction".to_string()); assert_eq!( instruction_list[1].binary, @@ -715,7 +2355,7 @@ mod read_instructions_tests { #[test] fn read_instruction_jalr_with_rd() { - let instruction_list = instruction_parser("jalr $t1, $t2".to_string()); + let instruction_list = instruction_parser_mips("jalr $t1, $t2".to_string()); assert_eq!( instruction_list[0].binary, @@ -725,7 +2365,7 @@ mod read_instructions_tests { #[test] fn read_instruction_jalr_without_rd() { - let instruction_list = instruction_parser("jalr $t2".to_string()); + let instruction_list = instruction_parser_mips("jalr $t2".to_string()); assert_eq!( instruction_list[0].binary, @@ -735,7 +2375,7 @@ mod read_instructions_tests { #[test] fn read_instruction_jalr_creates_error_with_rd_equal_0() { - let instruction_list = instruction_parser("jalr $zero, $t2".to_string()); + let instruction_list = instruction_parser_mips("jalr $zero, $t2".to_string()); assert_eq!(instruction_list[0].errors[0].error_name, JALRRDRegisterZero); } @@ -743,7 +2383,7 @@ mod read_instructions_tests { #[test] fn read_instructions_recognizes_b() { let instruction_list = - instruction_parser(".text\njump: addi $t1, $t2, 100\nb jump".to_string()); + instruction_parser_mips(".text\njump: addi $t1, $t2, 100\nb jump".to_string()); assert_eq!( instruction_list[1].binary, @@ -753,7 +2393,7 @@ mod read_instructions_tests { #[test] fn read_instructions_recognizes_jr() { - let instruction_list = instruction_parser(".text\njump: jr $zero\nb jump".to_string()); + let instruction_list = instruction_parser_mips(".text\njump: jr $zero\nb jump".to_string()); assert_eq!( instruction_list[0].binary, @@ -763,7 +2403,7 @@ mod read_instructions_tests { #[test] fn read_instructions_recognizes_jr_ra() { - let instruction_list = instruction_parser(".text\njump: jr $ra\nb jump".to_string()); + let instruction_list = instruction_parser_mips(".text\njump: jr $ra\nb jump".to_string()); // Page 249 in the MIPS64 release 6 manual // https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MIPS_Architecture_MIPS64_InstructionSet_%20AFP_P_MD00087_06.05.pdf @@ -775,7 +2415,7 @@ mod read_instructions_tests { #[test] fn read_instructions_recognizes_sll() { - let instruction_list = instruction_parser(".text\nsll $t1, $t2, 5".to_string()); + let instruction_list = instruction_parser_mips(".text\nsll $t1, $t2, 5".to_string()); assert_eq!( instruction_list[0].binary, @@ -785,7 +2425,7 @@ mod read_instructions_tests { #[test] fn read_instructions_recognizes_nop() { - let instruction_list = instruction_parser(".text\nnop".to_string()); + let instruction_list = instruction_parser_mips(".text\nnop".to_string()); assert_eq!(instruction_list[0].binary, 0); } @@ -831,13 +2471,16 @@ fn place_binary_works_dahi() { mod helper_functions { use crate::parser::assembling::assemble_data_binary; - use crate::parser::parser_assembler_main::read_instructions; + use crate::parser::parser_assembler_main::{read_instructions, read_instructions_riscv}; use crate::parser::parser_structs_and_enums::Instruction; use crate::parser::parsing::{create_label_map, separate_data_and_text, tokenize_program}; - use crate::parser::pseudo_instruction_parsing::expand_pseudo_instructions_and_assign_instruction_numbers; + use crate::parser::pseudo_instruction_parsing::{ + expand_pseudo_instructions_and_assign_instruction_numbers, + expand_pseudo_instructions_and_assign_instruction_numbers_riscv, + }; use std::collections::HashMap; - pub fn instruction_parser(mut file_string: String) -> Vec { + pub fn instruction_parser_mips(mut file_string: String) -> Vec { file_string = file_string.to_lowercase(); let mut monaco_line_info_vec = tokenize_program(file_string); @@ -856,6 +2499,26 @@ mod helper_functions { instruction_list } + + pub fn instruction_parser_riscv(mut file_string: String) -> Vec { + file_string = file_string.to_lowercase(); + + let mut monaco_line_info_vec = tokenize_program(file_string); + let (mut instruction_list, mut data) = + separate_data_and_text(&mut monaco_line_info_vec.clone()); + expand_pseudo_instructions_and_assign_instruction_numbers_riscv( + &mut instruction_list, + &data, + &mut monaco_line_info_vec, + ); + assemble_data_binary(&mut data); + + let labels: HashMap = create_label_map(&mut instruction_list, &mut data); + + read_instructions_riscv(&mut instruction_list, &labels, &mut monaco_line_info_vec); + + instruction_list + } } #[test] @@ -1087,7 +2750,7 @@ fn create_binary_vec_works_with_all_mod_4_options() { } #[test] -fn no_unsupported_instructions_are_recognized_by_parser() { +fn no_unsupported_mips_instructions_are_recognized_by_parser() { for instruction in UNSUPPORTED_INSTRUCTIONS_MIPS { let result = parser(instruction.to_string(), Architecture::MIPS) .0 @@ -1097,7 +2760,7 @@ fn no_unsupported_instructions_are_recognized_by_parser() { } #[test] -fn supported_instructions_are_recognized_by_parser() { +fn supported_mips_instructions_are_recognized_by_parser() { for instruction in SUPPORTED_INSTRUCTIONS_MIPS { let result = parser(instruction.to_string(), Architecture::MIPS) .0 diff --git a/static/assembly_examples/riscv_test.asm b/static/assembly_examples/riscv_test.asm index 7c017e8e1..ef828b552 100644 --- a/static/assembly_examples/riscv_test.asm +++ b/static/assembly_examples/riscv_test.asm @@ -1,4 +1,4 @@ main: - jal x1, 2047 + jal x1, 2044 fmv.s f1, f2 ret \ No newline at end of file From f989e86410424d0a1c29845d4da0b1ce0f2397cd Mon Sep 17 00:00:00 2001 From: Geetis <59862178+Geetis@users.noreply.github.com> Date: Thu, 7 Mar 2024 12:52:38 -0500 Subject: [PATCH 04/10] cargo fmt --- src/parser/parser_assembler_main.rs | 19 +- src/tests/parser/parser_assembler_main.rs | 537 +++++++++------------- 2 files changed, 212 insertions(+), 344 deletions(-) diff --git a/src/parser/parser_assembler_main.rs b/src/parser/parser_assembler_main.rs index 7ac4dd2e6..df2f3ff3d 100644 --- a/src/parser/parser_assembler_main.rs +++ b/src/parser/parser_assembler_main.rs @@ -10,8 +10,6 @@ use crate::parser::pseudo_instruction_parsing::{ }; use std::collections::HashMap; -use gloo_console::log; - ///Parser is the starting function of the parser / assembler process. It takes a string representation of a MIPS /// program and builds the binary of the instructions while cataloging any errors that are found. pub fn parser(file_string: String, arch: Architecture) -> (ProgramInfo, Vec) { @@ -1907,7 +1905,6 @@ pub fn read_instructions_riscv( } } "xori" => { - read_operands_riscv( instruction, vec![RegisterGP, RegisterGP, Immediate], @@ -3192,7 +3189,6 @@ pub fn read_instructions_riscv( } } "remu" => { - // Funct7 instruction.binary = append_binary(instruction.binary, 0b0000001, 7); @@ -3363,8 +3359,7 @@ pub fn read_instructions_riscv( } } // Start of RV32F - "fmadd.s" => - { + "fmadd.s" => { read_operands_riscv( instruction, vec![RegisterFP, RegisterFP, RegisterFP, RegisterFP], @@ -4251,7 +4246,7 @@ pub fn read_instructions_riscv( "fsqrt.d" => { // Funct5 + fmt + rs2 instruction.binary = append_binary(instruction.binary, 0b010110100000, 12); - + read_operands_riscv( instruction, vec![RegisterFP, RegisterFP], @@ -4779,7 +4774,6 @@ pub fn read_instructions_riscv( } } "fsd" => { - read_operands_riscv( instruction, vec![RegisterFP, MemoryAddress], @@ -4972,7 +4966,6 @@ fn immediate_to_branch(mut bin: u32) -> u32 { // Extract imm[10:5] let upper_imm = (bin >> 25) & 0b111111; - // Extract bit 11 and bit 12 let bit_11 = (bin >> 30) & 0b1; let bit_12 = (bin >> 31) & 0b1; @@ -5009,13 +5002,13 @@ fn immediate_to_branch(mut bin: u32) -> u32 { fn upper_to_jump(mut bin: u32) -> u32 { // Extract bits immediate let imm = bin >> 12; - + // Extract bits imm[1-10] let lower_imm = (imm >> 1) & 0b1111111111; - + // Extracts bits imm[12:19] let upper_imm = imm >> 12; - + // Extract bit imm[11] let bit_11 = (imm >> 11) & 1; @@ -5024,7 +5017,7 @@ fn upper_to_jump(mut bin: u32) -> u32 { // Clear bits [12-31] bin &= !(0b11111111111111111111 << 12); - + bin |= (upper_imm << 12) | (bit_11 << 20) | (lower_imm << 21) | (bit_20 << 31); bin diff --git a/src/tests/parser/parser_assembler_main.rs b/src/tests/parser/parser_assembler_main.rs index 15cdf7f15..23ad4ce7a 100644 --- a/src/tests/parser/parser_assembler_main.rs +++ b/src/tests/parser/parser_assembler_main.rs @@ -32,9 +32,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_add() { - let file_string = "add ra, t5, s0".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -45,9 +44,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_sub() { - let file_string = "sub x1, x2, x3".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -58,9 +56,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_sll() { - let file_string = "sll x4, x5, x6".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -71,9 +68,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_slt() { - let file_string = "slt x7, x8, x9".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -84,9 +80,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_sltu() { - let file_string = "sltu x10, x11, x12".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -97,9 +92,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_xor() { - let file_string = "xor x13, x14, x15".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -110,9 +104,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_srl() { - let file_string = "srl x16, x17, x18".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -123,9 +116,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_sra() { - let file_string = "sra x19, x20, x21".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -136,9 +128,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_or() { - let file_string = "or x22, x23, x24".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -149,9 +140,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_and() { - let file_string = "and x25, x26, x27".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -162,9 +152,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_addi() { - let file_string = "addi x28, x29, x30".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -175,9 +164,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_slti() { - let file_string = "slti x31, t0, 150".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -188,9 +176,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_sltiu() { - let file_string = "sltiu t1, t2, 241".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -201,9 +188,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_xori() { - let file_string = "xori t3, t4, 440".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -214,9 +200,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_ori() { - let file_string = "ori t5, t6, 621".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -227,9 +212,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_andi() { - let file_string = "andi ra, sp, 1024".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -240,9 +224,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_slli() { - let file_string = "slli gp, tp, 5".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -253,9 +236,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_srli() { - let file_string = "srli s0, s1, 10".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -266,9 +248,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_srai() { - let file_string = "srai a0, a1, 6".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -279,9 +260,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_lb() { - let file_string = "lb a2, 150(a3)".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -292,9 +272,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_lh() { - let file_string = "lh a4, 220(a5)".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -305,9 +284,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_lw() { - let file_string = "lw a6, 32(a7)".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -318,9 +296,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_lbu() { - let file_string = "lbu s2, 128(s3)".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -331,9 +308,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_lhu() { - let file_string = "lhu s4, 256(s5)".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -344,9 +320,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_sb() { - let file_string = "sb s6, 512(s7)".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -357,9 +332,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_sh() { - let file_string = "sh s8, 1024(s9)".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -370,9 +344,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_sw() { - let file_string = "sw s10, 2044(s11)".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -383,9 +356,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_jal() { - let file_string = "jal x1, 2044".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -396,9 +368,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_jalr() { - let file_string = "jalr x2, 128(x3)".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -409,9 +380,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_beq() { - let file_string = "beq x4, x5, 256".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -422,9 +392,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_bne() { - let file_string = "bne x6, x7, 512".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -435,9 +404,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_blt() { - let file_string = "blt x8, x9, 1024".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -448,9 +416,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_bge() { - let file_string = "bge x10, x11, 256".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -461,9 +428,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_bltu() { - let file_string = "bltu x12, x13, 64".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -474,9 +440,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_bgeu() { - let file_string = "bgeu x14, x15, 32".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -487,9 +452,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_ecall() { - let file_string = "ecall".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -500,9 +464,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_ebreak() { - let file_string = "ebreak".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -513,9 +476,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_uret() { - let file_string = "uret".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -526,9 +488,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_sret() { - let file_string = "sret".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -539,9 +500,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_mret() { - let file_string = "mret".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -552,9 +512,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_wfi() { - let file_string = "wfi".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -565,9 +524,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fencei() { - let file_string = "fence.i".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -578,9 +536,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_lui() { - let file_string = "lui x16, 4096".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -591,9 +548,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_auipc() { - let file_string = "auipc x17, 5024".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -606,9 +562,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_addiw() { - let file_string = "addiw x18, x19, 50".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -619,9 +574,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_slliw() { - let file_string = "slliw x20, x21, 16".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -632,9 +586,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_srliw() { - let file_string = "srliw x22, x23, 20".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -645,9 +598,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_sraiw() { - let file_string = "sraiw x24, x25, 10".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -658,9 +610,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_addw() { - let file_string = "addw x26, x27, x28".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -671,9 +622,8 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_subw() { - let file_string = "subw x29, x30, x31".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); assert_eq!( @@ -681,14 +631,13 @@ mod read_riscv_instructions_tests { 0b01000001111111110000111010111011 ); } - + #[test] fn read_instructions_sllw() { - let file_string = "sllw ra, sp, gp".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00000000001100010001000010111011 @@ -697,78 +646,72 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_srlw() { - let file_string = "srlw tp, t0, t1".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00000000011000101101001000111011 ); } - + #[test] fn read_instructions_sraw() { - let file_string = "sraw t2, fp, s1".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b01000000100101000101001110111011 ); } - + #[test] fn read_instructions_lwu() { - let file_string = "lwu a0, 50(a1)".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00000011001001011110010100000011 ); } - + #[test] fn read_instructions_ld() { - let file_string = "ld a2, 50(a3)".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00000011001001101011011000000011 ); } - + #[test] fn read_instructions_sd() { - let file_string = "sd a4, 50(a5)".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00000010111001111011100100100011 ); } - + // Start of RV32M #[test] fn read_instructions_mul() { - let file_string = "mul a6, a7, s2".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00000011001010001000100000110011 @@ -777,11 +720,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_mulh() { - let file_string = "mulh s3, s4, s5".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00000011010110100001100110110011 @@ -790,11 +732,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_mulhsu() { - let file_string = "mulhsu s6, s7, s8".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00000011100010111010101100110011 @@ -803,11 +744,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_mulhu() { - let file_string = "mulhu s9, s10, s11".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00000011101111010011110010110011 @@ -816,11 +756,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_div() { - let file_string = "div t3, t4, t5".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00000011111011101100111000110011 @@ -829,11 +768,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_divu() { - let file_string = "divu t6, x1, x2".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00000010001000001101111110110011 @@ -842,11 +780,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_rem() { - let file_string = "rem x3, x4, x5".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00000010010100100110000110110011 @@ -855,11 +792,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_remu() { - let file_string = "remu x6, x7, x8".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00000010100000111111001100110011 @@ -870,11 +806,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_mulw() { - let file_string = "mulw x9, x10, x11".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00000010101101010000010010111011 @@ -883,11 +818,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_divw() { - let file_string = "divw x12, x13, x14".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00000010111001101100011000111011 @@ -896,11 +830,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_divuw() { - let file_string = "divuw x15, x16, x17".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00000011000110000101011110111011 @@ -909,11 +842,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_remw() { - let file_string = "remw x18, x19, x20".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00000011010010011110100100111011 @@ -922,11 +854,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_remuw() { - let file_string = "remuw x21, x22, x23".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00000011011110110111101010111011 @@ -937,11 +868,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fmadds() { - let file_string = "fmadd.s f1, f2, f3, f4".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00100000001100010111000011000011 @@ -950,11 +880,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fmsubs() { - let file_string = "fmsub.s f5, f6, f7, f8".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b01000000011100110111001011000111 @@ -963,11 +892,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fnmsubs() { - let file_string = "fnmsub.s f9, f10, f11, f12".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b01100000101101010111010011001011 @@ -976,11 +904,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fnmadds() { - let file_string = "fnmadd.s f13, f14, f15, f16".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b10000000111101110111011011001111 @@ -989,11 +916,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fadds() { - let file_string = "fadd.s f17, f18, f19".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00000001001110010111100011010011 @@ -1002,11 +928,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fsubs() { - let file_string = "fsub.s f20, f21, f22".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00001001011010101111101001010011 @@ -1015,11 +940,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fmuls() { - let file_string = "fmul.s f23, f24, f25".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00010001100111000111101111010011 @@ -1028,11 +952,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fdivs() { - let file_string = "fdiv.s f26, f27, f28".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00011001110011011111110101010011 @@ -1041,11 +964,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fsqrts() { - let file_string = "fsqrt.s f29, f30".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b01011000000011110111111011010011 @@ -1054,11 +976,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fsgnjs() { - let file_string = "fsgnj.s f31, ft1, ft2".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00100000001000001000111111010011 @@ -1067,11 +988,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fsgnjns() { - let file_string = "fsgnjn.s ft3, ft4, ft5".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00100000010100100001000111010011 @@ -1080,11 +1000,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fsgnjxs() { - let file_string = "fsgnjx.s f6, f7, f8".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00100000100000111010001101010011 @@ -1093,11 +1012,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fmins() { - let file_string = "fmin.s fs1, fa0, fa1".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00101000101101010000010011010011 @@ -1106,11 +1024,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fmaxs() { - let file_string = "fmax.s fa2, fa3, fa4".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00101000111001101001011001010011 @@ -1119,11 +1036,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fcvtws() { - let file_string = "fcvt.w.s x1, fa5".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b11000000000001111111000011010011 @@ -1132,11 +1048,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fcvtwus() { - let file_string = "fcvt.wu.s x2, fa6".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b11000000000110000111000101010011 @@ -1145,11 +1060,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fmvxw() { - let file_string = "fmv.x.w x3, fa7".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b11100000000010001000000111010011 @@ -1158,11 +1072,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_feqs() { - let file_string = "feq.s x4, fs2, fs3".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b10100001001110010010001001010011 @@ -1171,11 +1084,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_flts() { - let file_string = "flt.s x5, fs4, fs5".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b10100001010110100001001011010011 @@ -1184,11 +1096,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fles() { - let file_string = "fle.s x6, fs6, fs7".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b10100001011110110000001101010011 @@ -1197,11 +1108,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fclasss() { - let file_string = "fclass.s x7, fs8".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b11100000000011000001001111010011 @@ -1210,11 +1120,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fcvtsw() { - let file_string = "fcvt.s.w fs9, x8".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b11010000000001000111110011010011 @@ -1223,11 +1132,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fcvtswu() { - let file_string = "fcvt.s.wu fs10, x9".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b11010000000101001111110101010011 @@ -1236,11 +1144,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fmvwx() { - let file_string = "fmv.w.x fs11, x10".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b11110000000001010000110111010011 @@ -1249,11 +1156,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fmaddd() { - let file_string = "fmadd.d ft8, ft9, ft10, ft11".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b11111011111011101111111001000011 @@ -1262,11 +1168,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fmsubd() { - let file_string = "fmsub.d f1, f2, f3, f4".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00100010001100010111000011000111 @@ -1275,11 +1180,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fnmaddd() { - let file_string = "fnmsub.d f5, f6, f7, f8".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b01000010011100110111001011001011 @@ -1288,11 +1192,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fnmsubd() { - let file_string = "fnmadd.d f9, f10, f11, f12".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b01100010101101010111010011001111 @@ -1301,11 +1204,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_faddd() { - let file_string = "fadd.d f13, f14, f15".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00000010111101110111011011010011 @@ -1314,11 +1216,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fsubd() { - let file_string = "fsub.d f16, f17, f18".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00001011001010001111100001010011 @@ -1327,11 +1228,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fmuld() { - let file_string = "fmul.d f19, f20, f21".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00010011010110100111100111010011 @@ -1340,11 +1240,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fdivd() { - let file_string = "fdiv.d f22, f23, f24".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00011011100010111111101101010011 @@ -1353,11 +1252,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fsqrtd() { - let file_string = "fsqrt.d f25, f26".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b01011010000011010111110011010011 @@ -1366,11 +1264,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fsgnjd() { - let file_string = "fsgnj.d f27, f28, f29".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00100011110111100000110111010011 @@ -1379,11 +1276,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fsgnjnd() { - let file_string = "fsgnjn.d f30, f31, f1".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00100010000111111001111101010011 @@ -1392,11 +1288,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fsgnjxd() { - let file_string = "fsgnjx.d f2, f3, f4".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00100010010000011010000101010011 @@ -1405,11 +1300,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fmind() { - let file_string = "fmin.d f5, f6, f7".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00101010011100110000001011010011 @@ -1418,11 +1312,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fmaxd() { - let file_string = "fmax.d f8, f9, f10".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00101010101001001001010001010011 @@ -1431,11 +1324,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fcvtsd() { - let file_string = "fcvt.s.d f11, f12".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b01000000000101100111010111010011 @@ -1444,11 +1336,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fcvtds() { - let file_string = "fcvt.d.s f13, f14".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b01000010000001110111011011010011 @@ -1457,11 +1348,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_feqd() { - let file_string = "feq.d x11, f15, f16".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b10100011000001111010010111010011 @@ -1470,11 +1360,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fltd() { - let file_string = "flt.d x12, f17, f18".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b10100011001010001001011001010011 @@ -1483,11 +1372,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fled() { - let file_string = "fle.d x13, f19, f20".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b10100011010010011000011011010011 @@ -1496,11 +1384,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fclassd() { - let file_string = "fclass.d x14, f21".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b11100010000010101001011101010011 @@ -1509,11 +1396,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fcvtwd() { - let file_string = "fcvt.w.d x15, f22".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b11000010000010110111011111010011 @@ -1522,11 +1408,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fcvtwud() { - let file_string = "fcvt.wu.d x16, f23".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b11000010000110111111100001010011 @@ -1535,11 +1420,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fcvtdw() { - let file_string = "fcvt.d.w f24, x17".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b11010010000010001111110001010011 @@ -1548,11 +1432,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fcvtdwu() { - let file_string = "fcvt.d.wu f25, x18".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b11010010000110010111110011010011 @@ -1561,11 +1444,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_flw() { - let file_string = "flw f26, 128(x19)".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00001000000010011010110100000111 @@ -1574,11 +1456,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fsw() { - let file_string = "fsw f27, 256(x20)".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00010001101110100010000000100111 @@ -1587,11 +1468,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fld() { - let file_string = "fld f28, 512(x21)".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b00100000000010101011111000000111 @@ -1600,11 +1480,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fsd() { - let file_string = "fsd f29, 1024(x22)".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b01000001110110110011000000100111 @@ -1613,11 +1492,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fcvtls() { - let file_string = "fcvt.l.s x23, f30".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b11000000001011110111101111010011 @@ -1626,11 +1504,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fcvtlus() { - let file_string = "fcvt.lu.s x24, f31".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b11000000001111111111110001010011 @@ -1639,11 +1516,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fcvtsl() { - let file_string = "fcvt.s.l f1, x25".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b11010000001011001111000011010011 @@ -1652,11 +1528,10 @@ mod read_riscv_instructions_tests { #[test] fn read_instructions_fcvtslu() { - let file_string = "fcvt.s.lu f2, x26".to_string(); - + let instruction_list = instruction_parser_riscv(file_string); - + assert_eq!( instruction_list[0].binary, 0b11010000001111010111000101010011 From 8b2845c80cb3c1d78bf325e9ce8d1cee78e6ee84 Mon Sep 17 00:00:00 2001 From: Geetis <59862178+Geetis@users.noreply.github.com> Date: Thu, 7 Mar 2024 13:15:07 -0500 Subject: [PATCH 05/10] Resolved conflicts --- src/parser/pseudo_instruction_parsing.rs | 4 ++-- src/tests/integration/core_parser/fibonacci.rs | 15 ++++++++------- 2 files changed, 10 insertions(+), 9 deletions(-) diff --git a/src/parser/pseudo_instruction_parsing.rs b/src/parser/pseudo_instruction_parsing.rs index ed8e66228..8c63364c2 100644 --- a/src/parser/pseudo_instruction_parsing.rs +++ b/src/parser/pseudo_instruction_parsing.rs @@ -1276,7 +1276,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); // Check operands - if instruction.operands.len() != 0 { + if !instruction.operands.is_empty() { instruction.errors.push(Error { error_name: IncorrectNumberOfOperands, token_causing_error: "".to_string(), @@ -2066,7 +2066,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); // Check operands - if instruction.operands.len() != 0 { + if !instruction.operands.is_empty() { instruction.errors.push(Error { error_name: IncorrectNumberOfOperands, token_causing_error: "".to_string(), diff --git a/src/tests/integration/core_parser/fibonacci.rs b/src/tests/integration/core_parser/fibonacci.rs index 0f5ac4531..c2e099a20 100644 --- a/src/tests/integration/core_parser/fibonacci.rs +++ b/src/tests/integration/core_parser/fibonacci.rs @@ -1,5 +1,6 @@ use crate::{ - emulation_core::mips::registers::GpRegisterType, parser::parser_structs_and_enums::Architecture, + emulation_core::mips::gp_registers::GpRegisterType, + parser::parser_structs_and_enums::Architecture, }; use super::*; @@ -24,11 +25,11 @@ fn recursive_fibonacci() -> Result<(), String> { slt $v0,$v0,$s1 beq $v0,$zero,L2 nop - + lw $v0,40($fp) b L3 nop - + L2: lw $v0,40($fp) nop @@ -36,7 +37,7 @@ fn recursive_fibonacci() -> Result<(), String> { move $a0,$v0 jal fib(int) nop - + move $s0,$v0 lw $v0,40($fp) nop @@ -44,7 +45,7 @@ fn recursive_fibonacci() -> Result<(), String> { move $a0,$v0 jal fib(int) nop - + addu $v0,$s0,$v0 L3: move $sp,$fp @@ -54,7 +55,7 @@ fn recursive_fibonacci() -> Result<(), String> { addiu $sp,$sp,40 jr $ra nop - + main: addiu $sp,$sp,-40 sw $ra,36($sp) @@ -65,7 +66,7 @@ fn recursive_fibonacci() -> Result<(), String> { lw $a0,24($fp) jal fib(int) nop - + sw $v0,28($fp) lw $v0,28($fp) # This is where the final answer gets loaded off the stack move $sp,$fp From 7cd7dd9c820fbb2b041d1aa06df4310d854a8265 Mon Sep 17 00:00:00 2001 From: Geetis <59862178+Geetis@users.noreply.github.com> Date: Wed, 13 Mar 2024 11:07:08 -0400 Subject: [PATCH 06/10] PR Fixes --- src/bin/main.rs | 7 +- src/emulation_core/architectures.rs | 2 +- src/parser/parser_assembler_main.rs | 220 ++++++++--------- src/parser/parser_structs_and_enums.rs | 7 - src/parser/parsing.rs | 29 ++- src/parser/pseudo_instruction_parsing.rs | 222 +++--------------- src/tests/emulation_core/mips.rs | 6 +- .../integration/core_parser/arithmetic.rs | 10 +- .../core_parser/basic_immediate.rs | 22 +- .../core_parser/basic_operations.rs | 14 +- .../integration/core_parser/branch_jump.rs | 16 +- .../integration/core_parser/conditions.rs | 6 +- .../core_parser/coprocessor_move.rs | 14 +- .../core_parser/double_arithmetic.rs | 6 +- .../core_parser/double_immediate.rs | 12 +- .../integration/core_parser/fibonacci.rs | 8 +- .../core_parser/floating_point_arithmetic.rs | 6 +- .../core_parser/floating_point_branch.rs | 6 +- .../core_parser/floating_point_comparison.rs | 6 +- src/tests/integration/core_parser/mod.rs | 8 +- .../core_parser/store_load_word.rs | 10 +- src/tests/parser/assembling.rs | 12 +- src/tests/parser/parser_assembler_main.rs | 56 ++--- src/tests/parser/parsing.rs | 27 ++- .../parser/pseudo_instruction_parsing.rs | 19 +- 25 files changed, 306 insertions(+), 445 deletions(-) diff --git a/src/bin/main.rs b/src/bin/main.rs index 860747774..8bc7d421e 100644 --- a/src/bin/main.rs +++ b/src/bin/main.rs @@ -9,6 +9,7 @@ use monaco::{ sys::{editor::IMarkerData, MarkerSeverity}, }; use std::rc::Rc; +use swim::agent::datapath_communicator::DatapathCommunicator; use swim::agent::datapath_reducer::DatapathReducer; use swim::agent::EmulationCoreAgent; use swim::emulation_core::mips::datapath::Stage; @@ -17,10 +18,6 @@ use swim::parser::parser_structs_and_enums::ProgramInfo; use swim::ui::footer::component::Footer; use swim::ui::regview::component::Regview; use swim::ui::swim_editor::component::SwimEditor; -use swim::{ - agent::datapath_communicator::DatapathCommunicator, - parser::parser_structs_and_enums::Architecture, -}; use swim::{ emulation_core::{architectures::AvailableDatapaths, mips::instruction::get_string_version}, ui::{ @@ -42,7 +39,7 @@ use yew_hooks::prelude::*; // and comment the code, language, and text_model lines. IMPORTANT: // rename fib_model to text_model to have it work. const CONTENT: &str = include_str!("../../static/assembly_examples/riscv_test.asm"); -const ARCH: Architecture = Architecture::RISCV; +const ARCH: AvailableDatapaths = AvailableDatapaths::RISCV; #[derive(Properties, Clone, PartialEq)] struct AppProps { diff --git a/src/emulation_core/architectures.rs b/src/emulation_core/architectures.rs index 9dfe17a25..a78d2065d 100644 --- a/src/emulation_core/architectures.rs +++ b/src/emulation_core/architectures.rs @@ -2,7 +2,7 @@ use crate::agent::messages::MipsStateUpdate; use crate::emulation_core::mips::datapath::MipsDatapath; use serde::{Deserialize, Serialize}; -#[derive(Clone, Debug, Serialize, Deserialize, PartialEq)] +#[derive(Clone, Copy, Debug, Serialize, Deserialize, PartialEq)] pub enum AvailableDatapaths { MIPS, RISCV, diff --git a/src/parser/parser_assembler_main.rs b/src/parser/parser_assembler_main.rs index df2f3ff3d..6e92dc21e 100644 --- a/src/parser/parser_assembler_main.rs +++ b/src/parser/parser_assembler_main.rs @@ -1,3 +1,4 @@ +use crate::emulation_core::architectures::AvailableDatapaths; use crate::parser::assembling::{assemble_data_binary, read_operands, read_operands_riscv}; use crate::parser::parser_structs_and_enums::ErrorType::*; use crate::parser::parser_structs_and_enums::OperandType::*; @@ -12,120 +13,123 @@ use std::collections::HashMap; ///Parser is the starting function of the parser / assembler process. It takes a string representation of a MIPS /// program and builds the binary of the instructions while cataloging any errors that are found. -pub fn parser(file_string: String, arch: Architecture) -> (ProgramInfo, Vec) { - if arch == Architecture::MIPS { - let mut program_info = ProgramInfo { - monaco_line_info: tokenize_program(file_string), - ..Default::default() - }; - - (program_info.instructions, program_info.data) = - separate_data_and_text(&mut program_info.monaco_line_info); - - expand_pseudo_instructions_and_assign_instruction_numbers( - &mut program_info.instructions, - &program_info.data, - &mut program_info.monaco_line_info, - ); - - let vec_of_data = assemble_data_binary(&mut program_info.data); - - let labels: HashMap = - create_label_map(&mut program_info.instructions, &mut program_info.data); - - complete_lw_sw_pseudo_instructions( - &mut program_info.instructions, - &labels, - &mut program_info.monaco_line_info, - ); - - read_instructions( - &mut program_info.instructions, - &labels, - &mut program_info.monaco_line_info, - ); - - program_info.console_out_post_assembly = suggest_error_corrections( - &mut program_info.instructions, - &mut program_info.data, - &labels, - &mut program_info.monaco_line_info, - arch, - ); - - let (binary, data_starting_point) = - create_binary_vec(program_info.instructions.clone(), vec_of_data); - - for entry in &program_info.monaco_line_info { - program_info - .updated_monaco_string - .push_str(&format!("{}\n", entry.updated_monaco_string)); +pub fn parser(file_string: String, arch: AvailableDatapaths) -> (ProgramInfo, Vec) { + match arch { + AvailableDatapaths::MIPS => { + let mut program_info = ProgramInfo { + monaco_line_info: tokenize_program(file_string), + ..Default::default() + }; + + (program_info.instructions, program_info.data) = + separate_data_and_text(&mut program_info.monaco_line_info); + + expand_pseudo_instructions_and_assign_instruction_numbers( + &mut program_info.instructions, + &program_info.data, + &mut program_info.monaco_line_info, + ); + + let vec_of_data = assemble_data_binary(&mut program_info.data); + + let labels: HashMap = + create_label_map(&mut program_info.instructions, &mut program_info.data); + + complete_lw_sw_pseudo_instructions( + &mut program_info.instructions, + &labels, + &mut program_info.monaco_line_info, + ); + + read_instructions( + &mut program_info.instructions, + &labels, + &mut program_info.monaco_line_info, + ); + + program_info.console_out_post_assembly = suggest_error_corrections( + &mut program_info.instructions, + &mut program_info.data, + &labels, + &mut program_info.monaco_line_info, + arch, + ); + + let (binary, data_starting_point) = + create_binary_vec(program_info.instructions.clone(), vec_of_data); + + for entry in &program_info.monaco_line_info { + program_info + .updated_monaco_string + .push_str(&format!("{}\n", entry.updated_monaco_string)); + } + + for instruction in program_info.instructions.clone() { + program_info + .address_to_line_number + .push(instruction.line_number); + } + + program_info.pc_starting_point = determine_pc_starting_point(labels); + program_info.data_starting_point = data_starting_point; + + return (program_info.clone(), binary); } + AvailableDatapaths::RISCV => { + let mut program_info = ProgramInfo { + monaco_line_info: tokenize_program(file_string), + ..Default::default() + }; - for instruction in program_info.instructions.clone() { - program_info - .address_to_line_number - .push(instruction.line_number); - } + (program_info.instructions, program_info.data) = + separate_data_and_text(&mut program_info.monaco_line_info); - program_info.pc_starting_point = determine_pc_starting_point(labels); - program_info.data_starting_point = data_starting_point; - - (program_info.clone(), binary) - } else { - let mut program_info = ProgramInfo { - monaco_line_info: tokenize_program(file_string), - ..Default::default() - }; - - (program_info.instructions, program_info.data) = - separate_data_and_text(&mut program_info.monaco_line_info); - - // Implement a RISC-V version - expand_pseudo_instructions_and_assign_instruction_numbers_riscv( - &mut program_info.instructions, - &program_info.data, - &mut program_info.monaco_line_info, - ); - - let vec_of_data = assemble_data_binary(&mut program_info.data); - - let labels: HashMap = - create_label_map(&mut program_info.instructions, &mut program_info.data); - - read_instructions_riscv( - &mut program_info.instructions, - &labels, - &mut program_info.monaco_line_info, - ); - - program_info.console_out_post_assembly = suggest_error_corrections( - &mut program_info.instructions, - &mut program_info.data, - &labels, - &mut program_info.monaco_line_info, - arch, - ); - - let (binary, data_starting_point) = - create_binary_vec(program_info.instructions.clone(), vec_of_data); - - for entry in &program_info.monaco_line_info { - program_info - .updated_monaco_string - .push_str(&format!("{}\n", entry.updated_monaco_string)); - } + // Implement a RISC-V version + expand_pseudo_instructions_and_assign_instruction_numbers_riscv( + &mut program_info.instructions, + &program_info.data, + &mut program_info.monaco_line_info, + ); - for instruction in program_info.instructions.clone() { - program_info - .address_to_line_number - .push(instruction.line_number); - } + let vec_of_data = assemble_data_binary(&mut program_info.data); + + let labels: HashMap = + create_label_map(&mut program_info.instructions, &mut program_info.data); + + read_instructions_riscv( + &mut program_info.instructions, + &labels, + &mut program_info.monaco_line_info, + ); + + program_info.console_out_post_assembly = suggest_error_corrections( + &mut program_info.instructions, + &mut program_info.data, + &labels, + &mut program_info.monaco_line_info, + arch, + ); - program_info.pc_starting_point = determine_pc_starting_point(labels); - program_info.data_starting_point = data_starting_point; + let (binary, data_starting_point) = + create_binary_vec(program_info.instructions.clone(), vec_of_data); - (program_info.clone(), binary) + for entry in &program_info.monaco_line_info { + program_info + .updated_monaco_string + .push_str(&format!("{}\n", entry.updated_monaco_string)); + } + + for instruction in program_info.instructions.clone() { + program_info + .address_to_line_number + .push(instruction.line_number); + } + + program_info.pc_starting_point = determine_pc_starting_point(labels); + program_info.data_starting_point = data_starting_point; + + return (program_info.clone(), binary); + } } } diff --git a/src/parser/parser_structs_and_enums.rs b/src/parser/parser_structs_and_enums.rs index 8a5afb547..2b8b52ad9 100644 --- a/src/parser/parser_structs_and_enums.rs +++ b/src/parser/parser_structs_and_enums.rs @@ -18,13 +18,6 @@ pub struct ProgramInfo { pub data_starting_point: usize, } -#[derive(Clone, Debug, Default, Eq, PartialEq)] -pub enum Architecture { - #[default] - MIPS, - RISCV, -} - #[derive(Clone, Debug, Default, Eq, PartialEq)] ///This struct holds all the information we gather in the parser & assembler about a single line the user wrote pub struct MonacoLineInfo { diff --git a/src/parser/parsing.rs b/src/parser/parsing.rs index b0f1c95ea..4881ce8e6 100644 --- a/src/parser/parsing.rs +++ b/src/parser/parsing.rs @@ -1,3 +1,4 @@ +use crate::emulation_core::architectures::AvailableDatapaths; use crate::parser::parser_structs_and_enums::ErrorType::*; use crate::parser::parser_structs_and_enums::TokenType::{Directive, Label, Operator, Unknown}; use crate::parser::parser_structs_and_enums::{ @@ -7,7 +8,7 @@ use crate::parser::parser_structs_and_enums::{ use levenshtein::levenshtein; use std::collections::HashMap; -use super::parser_structs_and_enums::{Architecture, SUPPORTED_INSTRUCTIONS_RISCV}; +use super::parser_structs_and_enums::SUPPORTED_INSTRUCTIONS_RISCV; ///Takes the initial string of the program given by the editor and turns it into a vector of Line, /// a struct that holds tokens and the original line number. @@ -404,7 +405,7 @@ pub fn suggest_error_corrections( data: &mut [Data], labels: &HashMap, monaco_line_info: &mut [MonacoLineInfo], - arch: Architecture, + arch: AvailableDatapaths, ) -> String { let levenshtein_threshold = 2_f32 / 3_f32; let mut console_out_string: String = "".to_string(); @@ -471,19 +472,21 @@ pub fn suggest_error_corrections( let given_string = &instruction.operator.token_name; let mut closest: (usize, String) = (usize::MAX, "".to_string()); - if arch == Architecture::MIPS { - for instruction in SUPPORTED_INSTRUCTIONS_MIPS { - if levenshtein(given_string, instruction) < closest.0 { - closest.0 = levenshtein(given_string, instruction); - closest.1 = instruction.to_string(); + match arch { + AvailableDatapaths::MIPS => { + for instruction in SUPPORTED_INSTRUCTIONS_MIPS { + if levenshtein(given_string, instruction) < closest.0 { + closest.0 = levenshtein(given_string, instruction); + closest.1 = instruction.to_string(); + } } } - } - if arch == Architecture::RISCV { - for instruction in SUPPORTED_INSTRUCTIONS_RISCV { - if levenshtein(given_string, instruction) < closest.0 { - closest.0 = levenshtein(given_string, instruction); - closest.1 = instruction.to_string(); + AvailableDatapaths::RISCV => { + for instruction in SUPPORTED_INSTRUCTIONS_RISCV { + if levenshtein(given_string, instruction) < closest.0 { + closest.0 = levenshtein(given_string, instruction); + closest.1 = instruction.to_string(); + } } } } diff --git a/src/parser/pseudo_instruction_parsing.rs b/src/parser/pseudo_instruction_parsing.rs index 8c63364c2..b70eb6a8d 100644 --- a/src/parser/pseudo_instruction_parsing.rs +++ b/src/parser/pseudo_instruction_parsing.rs @@ -1276,13 +1276,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); // Check operands - if !instruction.operands.is_empty() { - instruction.errors.push(Error { - error_name: IncorrectNumberOfOperands, - token_causing_error: "".to_string(), - start_end_columns: instruction.operator.start_end_columns, - message: "".to_string(), - }); + if !check_operands(instruction, 0) { continue; } @@ -1328,13 +1322,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); // Check operands - if instruction.operands.len() != 2 { - instruction.errors.push(Error { - error_name: IncorrectNumberOfOperands, - token_causing_error: "".to_string(), - start_end_columns: instruction.operator.start_end_columns, - message: "".to_string(), - }); + if !check_operands(instruction, 2) { continue; } @@ -1364,13 +1352,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); // Check operands - if instruction.operands.len() != 2 { - instruction.errors.push(Error { - error_name: IncorrectNumberOfOperands, - token_causing_error: "".to_string(), - start_end_columns: instruction.operator.start_end_columns, - message: "".to_string(), - }); + if !check_operands(instruction, 2) { continue; } @@ -1400,13 +1382,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); // Check operands - if instruction.operands.len() != 2 { - instruction.errors.push(Error { - error_name: IncorrectNumberOfOperands, - token_causing_error: "".to_string(), - start_end_columns: instruction.operator.start_end_columns, - message: "".to_string(), - }); + if !check_operands(instruction, 2) { continue; } @@ -1436,13 +1412,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); // Check operands - if instruction.operands.len() != 2 { - instruction.errors.push(Error { - error_name: IncorrectNumberOfOperands, - token_causing_error: "".to_string(), - start_end_columns: instruction.operator.start_end_columns, - message: "".to_string(), - }); + if !check_operands(instruction, 2) { continue; } @@ -1472,13 +1442,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); // Check operands - if instruction.operands.len() != 2 { - instruction.errors.push(Error { - error_name: IncorrectNumberOfOperands, - token_causing_error: "".to_string(), - start_end_columns: instruction.operator.start_end_columns, - message: "".to_string(), - }); + if !check_operands(instruction, 2) { continue; } @@ -1508,13 +1472,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); // Check operands - if instruction.operands.len() != 2 { - instruction.errors.push(Error { - error_name: IncorrectNumberOfOperands, - token_causing_error: "".to_string(), - start_end_columns: instruction.operator.start_end_columns, - message: "".to_string(), - }); + if !check_operands(instruction, 2) { continue; } @@ -1544,13 +1502,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); // Check operands - if instruction.operands.len() != 2 { - instruction.errors.push(Error { - error_name: IncorrectNumberOfOperands, - token_causing_error: "".to_string(), - start_end_columns: instruction.operator.start_end_columns, - message: "".to_string(), - }); + if !check_operands(instruction, 2) { continue; } @@ -1580,13 +1532,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); // Check operands - if instruction.operands.len() != 2 { - instruction.errors.push(Error { - error_name: IncorrectNumberOfOperands, - token_causing_error: "".to_string(), - start_end_columns: instruction.operator.start_end_columns, - message: "".to_string(), - }); + if !check_operands(instruction, 2) { continue; } @@ -1616,13 +1562,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); // Check operands - if instruction.operands.len() != 2 { - instruction.errors.push(Error { - error_name: IncorrectNumberOfOperands, - token_causing_error: "".to_string(), - start_end_columns: instruction.operator.start_end_columns, - message: "".to_string(), - }); + if !check_operands(instruction, 2) { continue; } @@ -1652,13 +1592,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); // Check operands - if instruction.operands.len() != 2 { - instruction.errors.push(Error { - error_name: IncorrectNumberOfOperands, - token_causing_error: "".to_string(), - start_end_columns: instruction.operator.start_end_columns, - message: "".to_string(), - }); + if !check_operands(instruction, 2) { continue; } @@ -1688,13 +1622,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); // Check operands - if instruction.operands.len() != 2 { - instruction.errors.push(Error { - error_name: IncorrectNumberOfOperands, - token_causing_error: "".to_string(), - start_end_columns: instruction.operator.start_end_columns, - message: "".to_string(), - }); + if !check_operands(instruction, 2) { continue; } @@ -1710,7 +1638,6 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( token_type: Default::default(), }, ); - instruction.operands[2].start_end_columns = (0, 0); // Update Line Info //monaco_line_info[instruction.line_number].update_pseudo_string(vec![instruction]); @@ -1725,13 +1652,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); // Check operands - if instruction.operands.len() != 2 { - instruction.errors.push(Error { - error_name: IncorrectNumberOfOperands, - token_causing_error: "".to_string(), - start_end_columns: instruction.operator.start_end_columns, - message: "".to_string(), - }); + if !check_operands(instruction, 2) { continue; } @@ -1761,13 +1682,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); // Check operands - if instruction.operands.len() != 2 { - instruction.errors.push(Error { - error_name: IncorrectNumberOfOperands, - token_causing_error: "".to_string(), - start_end_columns: instruction.operator.start_end_columns, - message: "".to_string(), - }); + if !check_operands(instruction, 2) { continue; } @@ -1797,13 +1712,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); // Check operands - if instruction.operands.len() != 2 { - instruction.errors.push(Error { - error_name: IncorrectNumberOfOperands, - token_causing_error: "".to_string(), - start_end_columns: instruction.operator.start_end_columns, - message: "".to_string(), - }); + if !check_operands(instruction, 2) { continue; } @@ -1833,13 +1742,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); // Check operands - if instruction.operands.len() != 2 { - instruction.errors.push(Error { - error_name: IncorrectNumberOfOperands, - token_causing_error: "".to_string(), - start_end_columns: instruction.operator.start_end_columns, - message: "".to_string(), - }); + if !check_operands(instruction, 2) { continue; } @@ -1869,13 +1772,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); // Check operands - if instruction.operands.len() != 3 { - instruction.errors.push(Error { - error_name: IncorrectNumberOfOperands, - token_causing_error: "".to_string(), - start_end_columns: instruction.operator.start_end_columns, - message: "".to_string(), - }); + if !check_operands(instruction, 3) { continue; } @@ -1900,13 +1797,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); // Check operands - if instruction.operands.len() != 3 { - instruction.errors.push(Error { - error_name: IncorrectNumberOfOperands, - token_causing_error: "".to_string(), - start_end_columns: instruction.operator.start_end_columns, - message: "".to_string(), - }); + if !check_operands(instruction, 3) { continue; } @@ -1931,13 +1822,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); // Check operands - if instruction.operands.len() != 3 { - instruction.errors.push(Error { - error_name: IncorrectNumberOfOperands, - token_causing_error: "".to_string(), - start_end_columns: instruction.operator.start_end_columns, - message: "".to_string(), - }); + if !check_operands(instruction, 3) { continue; } @@ -1962,13 +1847,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); // Check operands - if instruction.operands.len() != 3 { - instruction.errors.push(Error { - error_name: IncorrectNumberOfOperands, - token_causing_error: "".to_string(), - start_end_columns: instruction.operator.start_end_columns, - message: "".to_string(), - }); + if !check_operands(instruction, 3) { continue; } @@ -1994,13 +1873,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); // Check operands - if instruction.operands.len() != 1 { - instruction.errors.push(Error { - error_name: IncorrectNumberOfOperands, - token_causing_error: "".to_string(), - start_end_columns: instruction.operator.start_end_columns, - message: "".to_string(), - }); + if !check_operands(instruction, 1) { continue; } @@ -2030,13 +1903,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); // Check operands - if instruction.operands.len() != 1 { - instruction.errors.push(Error { - error_name: IncorrectNumberOfOperands, - token_causing_error: "".to_string(), - start_end_columns: instruction.operator.start_end_columns, - message: "".to_string(), - }); + if !check_operands(instruction, 1) { continue; } @@ -2066,13 +1933,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); // Check operands - if !instruction.operands.is_empty() { - instruction.errors.push(Error { - error_name: IncorrectNumberOfOperands, - token_causing_error: "".to_string(), - start_end_columns: instruction.operator.start_end_columns, - message: "".to_string(), - }); + if !check_operands(instruction, 0) { continue; } @@ -2111,13 +1972,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); // Check operands - if instruction.operands.len() != 2 { - instruction.errors.push(Error { - error_name: IncorrectNumberOfOperands, - token_causing_error: "".to_string(), - start_end_columns: instruction.operator.start_end_columns, - message: "".to_string(), - }); + if !check_operands(instruction, 2) { continue; } @@ -2142,13 +1997,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); // Check operands - if instruction.operands.len() != 2 { - instruction.errors.push(Error { - error_name: IncorrectNumberOfOperands, - token_causing_error: "".to_string(), - start_end_columns: instruction.operator.start_end_columns, - message: "".to_string(), - }); + if !check_operands(instruction, 2) { continue; } @@ -2173,13 +2022,7 @@ pub fn expand_pseudo_instructions_and_assign_instruction_numbers_riscv( monaco_line_info[instruction.line_number].mouse_hover_string = info.to_string(); // Check operands - if instruction.operands.len() != 2 { - instruction.errors.push(Error { - error_name: IncorrectNumberOfOperands, - token_causing_error: "".to_string(), - start_end_columns: instruction.operator.start_end_columns, - message: "".to_string(), - }); + if !check_operands(instruction, 2) { continue; } @@ -2245,3 +2088,16 @@ pub fn complete_lw_sw_pseudo_instructions( } } } + +fn check_operands(instruction: &mut Instruction, num_operands: usize) -> bool { + if instruction.operands.len() != num_operands { + instruction.errors.push(Error { + error_name: IncorrectNumberOfOperands, + token_causing_error: "".to_string(), + start_end_columns: instruction.operator.start_end_columns, + message: "".to_string(), + }); + return false; + } + return true; +} diff --git a/src/tests/emulation_core/mips.rs b/src/tests/emulation_core/mips.rs index bba858afe..0581f9b11 100644 --- a/src/tests/emulation_core/mips.rs +++ b/src/tests/emulation_core/mips.rs @@ -6,7 +6,9 @@ use crate::emulation_core::mips::gp_registers::GpRegisterType; pub mod api { use super::*; - use crate::parser::{parser_assembler_main::parser, parser_structs_and_enums::Architecture}; + use crate::{ + emulation_core::architectures::AvailableDatapaths, parser::parser_assembler_main::parser, + }; #[test] fn reset_datapath() -> Result<(), String> { @@ -14,7 +16,7 @@ pub mod api { // Add instruction into emulation core memory. let instruction = String::from("ori $s0, $zero, 5"); - let (_, instruction_bits) = parser(instruction, Architecture::MIPS); + let (_, instruction_bits) = parser(instruction, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.execute_instruction(); diff --git a/src/tests/integration/core_parser/arithmetic.rs b/src/tests/integration/core_parser/arithmetic.rs index 32368eec6..6c6f86693 100644 --- a/src/tests/integration/core_parser/arithmetic.rs +++ b/src/tests/integration/core_parser/arithmetic.rs @@ -1,6 +1,6 @@ //! Tests for additional arithmetic instructions: addu, sll, move, nop. -use crate::parser::parser_structs_and_enums::Architecture; +use crate::emulation_core::architectures::AvailableDatapaths; use super::*; @@ -10,7 +10,7 @@ fn basic_addu() -> Result<(), String> { let instructions = String::from("addu r20, r19, r18"); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[18] = 6849841; @@ -34,7 +34,7 @@ fn basic_sll() -> Result<(), String> { sll $s1, $s1, 3"#, ); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; while !datapath.is_halted() { @@ -55,7 +55,7 @@ fn basic_move() -> Result<(), String> { move $s5, $s4"#, ); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; while !datapath.is_halted() { @@ -73,7 +73,7 @@ fn basic_nop() -> Result<(), String> { let instructions = String::from(r#"nop"#); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; let mut expected_registers = datapath.registers; diff --git a/src/tests/integration/core_parser/basic_immediate.rs b/src/tests/integration/core_parser/basic_immediate.rs index 3b5078f35..169b1389f 100644 --- a/src/tests/integration/core_parser/basic_immediate.rs +++ b/src/tests/integration/core_parser/basic_immediate.rs @@ -2,7 +2,7 @@ //! //! Note that some of these instructions are pseudo-instructions. -use crate::parser::parser_structs_and_enums::Architecture; +use crate::emulation_core::architectures::AvailableDatapaths; use super::*; @@ -12,7 +12,7 @@ fn basic_addi() -> Result<(), String> { let instructions = String::from("addi r11, r15, 2"); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[15] = 100; @@ -32,7 +32,7 @@ fn basic_addiu() -> Result<(), String> { let instructions = String::from("addiu r14, r17, 5"); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[17] = 500; @@ -52,7 +52,7 @@ fn basic_subi() -> Result<(), String> { let instructions = String::from("subi r11, r15, 2"); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[15] = 100; @@ -72,7 +72,7 @@ fn basic_muli() -> Result<(), String> { let instructions = String::from("muli r11, r15, 2"); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[15] = 100; @@ -92,7 +92,7 @@ fn basic_divi() -> Result<(), String> { let instructions = String::from("divi r11, r15, 2"); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[15] = 100; @@ -112,7 +112,7 @@ fn basic_ori() -> Result<(), String> { let instructions = String::from("ori r11, r15, 2"); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[15] = 100; @@ -132,7 +132,7 @@ fn basic_andi() -> Result<(), String> { let instructions = String::from("andi r11, r15, 4"); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[15] = 100; @@ -152,7 +152,7 @@ fn basic_li() -> Result<(), String> { let instructions = String::from("li r15, 56"); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; while !datapath.is_halted() { @@ -171,7 +171,7 @@ fn basic_lui() -> Result<(), String> { // 65530 == 0xFFFA let instructions = String::from("lui r20, 65530"); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; while !datapath.is_halted() { @@ -191,7 +191,7 @@ fn basic_aui() -> Result<(), String> { // 4612 == 0x1204 let instructions = String::from("aui r15, r18, 4612"); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[18] = 0x0000_0000_0030_ABCD; diff --git a/src/tests/integration/core_parser/basic_operations.rs b/src/tests/integration/core_parser/basic_operations.rs index 0f3ce09ce..6319b01c8 100644 --- a/src/tests/integration/core_parser/basic_operations.rs +++ b/src/tests/integration/core_parser/basic_operations.rs @@ -1,6 +1,6 @@ //! Covering the basic arithmetic instructions: add, sub, mul, div, or, and. -use crate::parser::parser_structs_and_enums::Architecture; +use crate::emulation_core::architectures::AvailableDatapaths; use super::*; @@ -10,7 +10,7 @@ fn basic_add() -> Result<(), String> { let instructions = String::from("add r11, r7, r8"); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[7] = 51; @@ -31,7 +31,7 @@ fn basic_sub() -> Result<(), String> { let instructions = String::from("sub r12, r7, r8"); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[7] = 51; @@ -52,7 +52,7 @@ fn basic_mul() -> Result<(), String> { let instructions = String::from("mul r13, r7, r8"); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[7] = 51; @@ -73,7 +73,7 @@ fn basic_div() -> Result<(), String> { let instructions = String::from("div r14, r7, r8"); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[7] = 51; @@ -94,7 +94,7 @@ fn basic_or() -> Result<(), String> { let instructions = String::from("or r15, r7, r8"); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[7] = 51; @@ -115,7 +115,7 @@ fn basic_and() -> Result<(), String> { let instructions = String::from("and r16, r7, r8"); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[7] = 51; diff --git a/src/tests/integration/core_parser/branch_jump.rs b/src/tests/integration/core_parser/branch_jump.rs index bc963a1fb..e886a531e 100644 --- a/src/tests/integration/core_parser/branch_jump.rs +++ b/src/tests/integration/core_parser/branch_jump.rs @@ -1,6 +1,6 @@ //! Tests for the branch and jump instructions: j, jr, jal, jalr, beq, bne -use crate::parser::parser_structs_and_enums::Architecture; +use crate::emulation_core::architectures::AvailableDatapaths; use super::*; @@ -18,7 +18,7 @@ loop: daddu $s1, $s1, $s0 j loop"#, ); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; // Execute the ori instruction. @@ -46,7 +46,7 @@ fn basic_jr() -> Result<(), String> { jr r15"#, ); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; // Execute 2 instructions. @@ -71,7 +71,7 @@ syscall function: ori $t0, $zero, 5831"#, ); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; while !datapath.is_halted() { @@ -97,7 +97,7 @@ or $zero, $zero, $zero function: ori $t1, $zero, 9548"#, ); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; // Execute 3 instructions. @@ -146,7 +146,7 @@ daddiu $s2, $s2, 20 change10: daddiu $s2, $s2, 10"#, ); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; while !datapath.is_halted() { @@ -187,7 +187,7 @@ syscall changez: daddiu $s2, $s2, 20"#, ); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; while !datapath.is_halted() { @@ -219,7 +219,7 @@ daddiu $s0, $s0, 1 bne $s0, $s2, loop"#, ); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; let mut iterations = 0; diff --git a/src/tests/integration/core_parser/conditions.rs b/src/tests/integration/core_parser/conditions.rs index 58de55dae..6f2503498 100644 --- a/src/tests/integration/core_parser/conditions.rs +++ b/src/tests/integration/core_parser/conditions.rs @@ -2,7 +2,7 @@ //! //! Includes: seq, sne, slt, sltu, sle, sleu, sgt, sgtu, sge, sgeu. -use crate::parser::parser_structs_and_enums::Architecture; +use crate::emulation_core::architectures::AvailableDatapaths; use super::*; @@ -28,7 +28,7 @@ akin! { let mut datapath = MipsDatapath::default(); let instructions = String::from("*instruction_name r*destination_register, r5, r6"); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[5] = *true_value1; @@ -47,7 +47,7 @@ akin! { let mut datapath = MipsDatapath::default(); let instructions = String::from("*instruction_name r*destination_register, r5, r6"); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[5] = *false_value1; diff --git a/src/tests/integration/core_parser/coprocessor_move.rs b/src/tests/integration/core_parser/coprocessor_move.rs index e09e7dd68..36380e127 100644 --- a/src/tests/integration/core_parser/coprocessor_move.rs +++ b/src/tests/integration/core_parser/coprocessor_move.rs @@ -1,6 +1,6 @@ //! Tests for the "move from/to Coprocessor 1" instructions: mtc1, dmtc1, mfc1, dmfc1 -use crate::parser::parser_structs_and_enums::Architecture; +use crate::emulation_core::architectures::AvailableDatapaths; use super::*; @@ -9,7 +9,7 @@ fn basic_mtc1() -> Result<(), String> { let mut datapath = MipsDatapath::default(); let instructions = String::from("mtc1 $t2, $f5"); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[10] = 658461658; // $t2 @@ -27,7 +27,7 @@ fn truncate_32_bit_mtc1() -> Result<(), String> { let mut datapath = MipsDatapath::default(); let instructions = String::from("mtc1 $t3, $f6"); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[11] = 0x0000_02F2_AC71_AC41; // $t3 @@ -45,7 +45,7 @@ fn basic_mfc1() -> Result<(), String> { let mut datapath = MipsDatapath::default(); let instructions = String::from("mfc1 $t3, $f5"); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.coprocessor.registers.fpr[5] = 657861659; @@ -63,7 +63,7 @@ fn truncate_32_bit_mfc1() -> Result<(), String> { let mut datapath = MipsDatapath::default(); let instructions = String::from("mfc1 $t4, $f6"); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.coprocessor.registers.fpr[6] = 0x0003_7F80_E5E7_D785; @@ -81,7 +81,7 @@ fn basic_dmtc1() -> Result<(), String> { let mut datapath = MipsDatapath::default(); let instructions = String::from("dmtc1 $t3, $f6"); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[11] = 0x0120_02F2_AC71_AC41; // $t3 @@ -99,7 +99,7 @@ fn basic_dmfc1() -> Result<(), String> { let mut datapath = MipsDatapath::default(); let instructions = String::from("dmfc1 $t4, $f6"); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.coprocessor.registers.fpr[6] = 0x0003_7F90_E5E7_D785; diff --git a/src/tests/integration/core_parser/double_arithmetic.rs b/src/tests/integration/core_parser/double_arithmetic.rs index 3261c5ed9..9e975fc80 100644 --- a/src/tests/integration/core_parser/double_arithmetic.rs +++ b/src/tests/integration/core_parser/double_arithmetic.rs @@ -1,6 +1,6 @@ //! Tests for the double arithmetic instructions: dadd, dsub, dmul, ddiv, daddu, dsubu, dmulu, ddivu. -use crate::parser::parser_structs_and_enums::Architecture; +use crate::emulation_core::architectures::AvailableDatapaths; use super::*; @@ -18,7 +18,7 @@ akin! { let mut datapath = MipsDatapath::default(); let instructions = String::from(*instruction); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[16] = *value1; @@ -47,7 +47,7 @@ akin! { let mut datapath = MipsDatapath::default(); let instructions = String::from(*instruction); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[25] = *value1; diff --git a/src/tests/integration/core_parser/double_immediate.rs b/src/tests/integration/core_parser/double_immediate.rs index 833f54466..773c47680 100644 --- a/src/tests/integration/core_parser/double_immediate.rs +++ b/src/tests/integration/core_parser/double_immediate.rs @@ -1,6 +1,6 @@ //! Tests for the double immediate instructions: dahi, dati, daddi, dsubi, dmuli, ddivi, daddiu, dsubiu, dmuliu, ddiviu. -use crate::parser::parser_structs_and_enums::Architecture; +use crate::emulation_core::architectures::AvailableDatapaths; use super::*; @@ -9,7 +9,7 @@ fn basic_dahi() -> Result<(), String> { let mut datapath = MipsDatapath::default(); let instructions = String::from("dahi r3, 123"); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[3] = 0; @@ -30,7 +30,7 @@ fn dahi_sign_extend() -> Result<(), String> { let mut datapath = MipsDatapath::default(); let instructions = String::from("dahi r5, 43158"); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[5] = 0; @@ -51,7 +51,7 @@ fn basic_dati() -> Result<(), String> { let mut datapath = MipsDatapath::default(); let instructions = String::from("dati r10, 4321"); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[10] = 0; @@ -79,7 +79,7 @@ akin! { let mut datapath = MipsDatapath::default(); let instructions = String::from(*instruction); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[20] = *rs_value; @@ -105,7 +105,7 @@ akin! { let mut datapath = MipsDatapath::default(); let instructions = String::from(*instruction); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.registers.gpr[20] = *rs_value; diff --git a/src/tests/integration/core_parser/fibonacci.rs b/src/tests/integration/core_parser/fibonacci.rs index c2e099a20..3fe8924e7 100644 --- a/src/tests/integration/core_parser/fibonacci.rs +++ b/src/tests/integration/core_parser/fibonacci.rs @@ -1,7 +1,5 @@ -use crate::{ - emulation_core::mips::gp_registers::GpRegisterType, - parser::parser_structs_and_enums::Architecture, -}; +use crate::emulation_core::architectures::AvailableDatapaths; +use crate::emulation_core::mips::gp_registers::GpRegisterType; use super::*; @@ -77,7 +75,7 @@ fn recursive_fibonacci() -> Result<(), String> { nop", ); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; while !datapath.is_halted() { diff --git a/src/tests/integration/core_parser/floating_point_arithmetic.rs b/src/tests/integration/core_parser/floating_point_arithmetic.rs index 675effd35..9d68307d6 100644 --- a/src/tests/integration/core_parser/floating_point_arithmetic.rs +++ b/src/tests/integration/core_parser/floating_point_arithmetic.rs @@ -1,6 +1,6 @@ //! Tests for the floating-point arithmetic instructions: add.s, add.d, sub.s, sub.d, mul.s, mul.d, div.s, div.d -use crate::parser::parser_structs_and_enums::Architecture; +use crate::emulation_core::architectures::AvailableDatapaths; use super::*; @@ -20,7 +20,7 @@ akin! { let mut datapath = MipsDatapath::default(); let instructions = String::from(*instruction); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.coprocessor.registers.fpr[15] = *value1; @@ -51,7 +51,7 @@ akin! { let mut datapath = MipsDatapath::default(); let instructions = String::from(*instruction); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.coprocessor.registers.fpr[15] = *value1; diff --git a/src/tests/integration/core_parser/floating_point_branch.rs b/src/tests/integration/core_parser/floating_point_branch.rs index fe43c7828..60444e64b 100644 --- a/src/tests/integration/core_parser/floating_point_branch.rs +++ b/src/tests/integration/core_parser/floating_point_branch.rs @@ -1,6 +1,6 @@ //! Tests for the floating-point branch instructions: bc1t, bc1f -use crate::parser::parser_structs_and_enums::Architecture; +use crate::emulation_core::architectures::AvailableDatapaths; use super::*; @@ -32,7 +32,7 @@ c.lt.s $f0, $f2 bc1t loop"#, ); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; while !datapath.is_halted() { @@ -78,7 +78,7 @@ c.lt.s $f2, $f0 bc1f loop"#, ); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; while !datapath.is_halted() { diff --git a/src/tests/integration/core_parser/floating_point_comparison.rs b/src/tests/integration/core_parser/floating_point_comparison.rs index 4f99cc83e..e5632850d 100644 --- a/src/tests/integration/core_parser/floating_point_comparison.rs +++ b/src/tests/integration/core_parser/floating_point_comparison.rs @@ -1,6 +1,6 @@ //! Tests for the floating-point comparison instructions: c.eq.s, c.eq.d, c.lt.s, c.lt.d, c.le.s, c.le.d, c.ngt.s, c.ngt.d, c.nge.s, c.nge.d -use crate::parser::parser_structs_and_enums::Architecture; +use crate::emulation_core::architectures::AvailableDatapaths; use super::*; @@ -18,7 +18,7 @@ akin! { let mut datapath = MipsDatapath::default(); let instructions = String::from(*instruction); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.coprocessor.registers.fpr[15] = *value1; @@ -47,7 +47,7 @@ akin! { let mut datapath = MipsDatapath::default(); let instructions = String::from(*instruction); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.coprocessor.registers.fpr[15] = *value1; diff --git a/src/tests/integration/core_parser/mod.rs b/src/tests/integration/core_parser/mod.rs index 758f6f44c..7b94c18ee 100644 --- a/src/tests/integration/core_parser/mod.rs +++ b/src/tests/integration/core_parser/mod.rs @@ -1,9 +1,9 @@ use akin::akin; +use crate::emulation_core::architectures::AvailableDatapaths; use crate::emulation_core::datapath::Datapath; use crate::emulation_core::mips::datapath::MipsDatapath; use crate::parser::parser_assembler_main::parser; -use crate::parser::parser_structs_and_enums::Architecture; pub mod arithmetic; pub mod basic_immediate; @@ -31,7 +31,7 @@ add $s1, $s0, $s0"#, ); // Parse instructions and load into emulation core memory. - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; // Execute 2 instructions. @@ -70,7 +70,7 @@ dati r1, 43982"#, // dati r1, 43982 | ABCD 8765 CCCC EEEE | 43982 == 0xABCE. FFFF + ABCE = ABCD. // Parse instructions and load into emulation core memory. - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; // Execute 4 instructions. @@ -97,7 +97,7 @@ dadd r7, r5, r6 dmuli r8, r7, 2"#, ); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; while !datapath.is_halted() { diff --git a/src/tests/integration/core_parser/store_load_word.rs b/src/tests/integration/core_parser/store_load_word.rs index 7f953af13..5cdfec739 100644 --- a/src/tests/integration/core_parser/store_load_word.rs +++ b/src/tests/integration/core_parser/store_load_word.rs @@ -12,7 +12,7 @@ li r25, 1234 sw r25, 0(r14)"#, ); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; while !datapath.is_halted() { @@ -33,7 +33,7 @@ fn basic_lw() -> Result<(), String> { lw r25, 0(r14)"#, ); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.memory.memory[403] = 36; @@ -61,7 +61,7 @@ daddiu $s2, $s1, 1 sw $s2, secret_number"#, ); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; while !datapath.is_halted() { @@ -88,7 +88,7 @@ mtc1 $s1, $f25 swc1 $f25, 0($s0)"#, ); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; while !datapath.is_halted() { @@ -109,7 +109,7 @@ fn basic_lwc1() -> Result<(), String> { lwc1 $f12, 0($t4)"#, ); - let (_, instruction_bits) = parser(instructions, Architecture::MIPS); + let (_, instruction_bits) = parser(instructions, AvailableDatapaths::MIPS); datapath.initialize_legacy(instruction_bits)?; datapath.memory.memory[403] = 36; diff --git a/src/tests/parser/assembling.rs b/src/tests/parser/assembling.rs index ecfd86f63..0c0ec4868 100644 --- a/src/tests/parser/assembling.rs +++ b/src/tests/parser/assembling.rs @@ -1,6 +1,6 @@ +use crate::emulation_core::architectures::AvailableDatapaths; use crate::parser::assembling::assemble_data_binary; use crate::parser::parser_assembler_main::parser; -use crate::parser::parser_structs_and_enums::Architecture; use crate::parser::parser_structs_and_enums::ErrorType::{NonASCIIChar, NonASCIIString}; use crate::parser::parsing::{separate_data_and_text, tokenize_program}; mod read_register_tests { @@ -377,7 +377,7 @@ fn assemble_data_binary_works_for_asciiz() { fn assemble_data_binary_gives_errors_on_non_ascii_characters_for_ascii_asciiz_and_byte() { let result = parser( ".data\nlabel: .ascii \"❤️🦧❤️\"".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0; @@ -388,7 +388,7 @@ fn assemble_data_binary_gives_errors_on_non_ascii_characters_for_ascii_asciiz_an let result = parser( ".data\nlabel: .asciiz \"❤️🦧❤️\"".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0; assert_eq!( @@ -396,7 +396,11 @@ fn assemble_data_binary_gives_errors_on_non_ascii_characters_for_ascii_asciiz_an NonASCIIString ); - let result = parser(".data\nlabel: .byte \'🦧\'".to_string(), Architecture::MIPS).0; + let result = parser( + ".data\nlabel: .byte \'🦧\'".to_string(), + AvailableDatapaths::MIPS, + ) + .0; assert_eq!( result.monaco_line_info[1].errors[0].error_name, NonASCIIChar diff --git a/src/tests/parser/parser_assembler_main.rs b/src/tests/parser/parser_assembler_main.rs index 23ad4ce7a..398b0acf4 100644 --- a/src/tests/parser/parser_assembler_main.rs +++ b/src/tests/parser/parser_assembler_main.rs @@ -1,12 +1,13 @@ #[cfg(test)] mod parser_main_function_tests { - use crate::parser::{parser_assembler_main::*, parser_structs_and_enums::Architecture}; + use crate::emulation_core::architectures::AvailableDatapaths; + use crate::parser::parser_assembler_main::*; #[test] fn parser_takes_string_and_returns_vec_of_instructions() { let results = parser( "lw $t1, 512($t1)\nadd $t1, $s6, $t2\naddi $t1, $t2, 43690".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ); assert_eq!( @@ -2306,6 +2307,7 @@ mod read_mips_instructions_tests { } } +use crate::emulation_core::architectures::AvailableDatapaths; use crate::parser::assembling::assemble_data_binary; use crate::parser::parser_assembler_main::{ create_binary_vec, parser, place_binary_in_middle_of_another, read_instructions, @@ -2314,7 +2316,7 @@ use crate::parser::parser_structs_and_enums::ErrorType::{ UnrecognizedInstruction, UnsupportedInstruction, }; use crate::parser::parser_structs_and_enums::{ - Architecture, ProgramInfo, SUPPORTED_INSTRUCTIONS_MIPS, UNSUPPORTED_INSTRUCTIONS_MIPS, + ProgramInfo, SUPPORTED_INSTRUCTIONS_MIPS, UNSUPPORTED_INSTRUCTIONS_MIPS, }; use crate::parser::parsing::{create_label_map, separate_data_and_text, tokenize_program}; use crate::parser::pseudo_instruction_parsing::{ @@ -2438,7 +2440,7 @@ fn create_binary_vec_works_with_data() { fn read_instructions_recognizes_valid_but_unsupported_instructions() { let program_info = parser( "nor $t1, $t2, $t3\ndsrav $t1, $t2, $t3\n".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0; @@ -2456,7 +2458,7 @@ fn read_instructions_recognizes_valid_but_unsupported_instructions() { fn console_output_post_assembly_works_with_errors() { let result = parser( ".text\nadd $t1, $t2, 1235\n.data\nlabel: .ascii 100\n.text\nlw t1, address".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0 .console_out_post_assembly; @@ -2469,7 +2471,7 @@ fn console_output_post_assembly_works_with_no_errors_present() { let result = parser( ".text\nadd $t1, $t2, $t3\n.data\nlabel: .ascii \"string\"\n.text\nlw $t1, 40($t1)" .to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0 .console_out_post_assembly; @@ -2481,7 +2483,7 @@ fn console_output_post_assembly_works_with_no_errors_present() { fn mouse_hover_holds_information_about_valid_instructions() { let program_info = parser( ".text\nori $t1, $t2, 100\nsyscall".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0; @@ -2493,7 +2495,7 @@ fn mouse_hover_holds_information_about_valid_instructions() { fn mouse_hover_holds_information_about_pseudo_instructions() { let program_info = parser( ".text\nlabel: subi $t1, $t2, 100\nsyscall".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0; @@ -2505,7 +2507,7 @@ fn mouse_hover_holds_information_about_pseudo_instructions() { fn errors_do_not_go_into_mouse_hover() { let program_info = parser( ".text\nori $t1, $t2, $t3\nsyscall".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0; @@ -2517,7 +2519,7 @@ fn errors_do_not_go_into_mouse_hover() { fn syscall_message_and_binary_does_not_go_in_mouse_hover_if_the_syscall_was_added_by_parser() { let monaco_line_info = parser( ".text\nori $t1, $t2, 100\nlabel: subi $t1, $t2, 100\nadd $t1, $t2, $t3\n".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0 .monaco_line_info; @@ -2527,7 +2529,7 @@ fn syscall_message_and_binary_does_not_go_in_mouse_hover_if_the_syscall_was_adde assert_eq!(monaco_line_info[2].mouse_hover_string, "`subi` is a pseudo-instruction.\n\n```\nsubi rt, rs, immediate =>\nori $at, $zero, immediate\nsub rt, rs, $at\n\n```\n\n\n\n**Binary:** `0b00110100000000010000000001100100`\n\n**Binary:** `0b00000001010000010100100000100010`"); assert_eq!(monaco_line_info[3].mouse_hover_string, "**Syntax:** `add rd, rs, rt`\n\nAdds the 32-bit values in `rs` and `rt`, and places the result in `rd`.\n\nIn hardware implementations, the result is not placed in `rd` if adding `rs` and `rt` causes a 32-bit overflow. However, SWIM places the result in `rd` regardless since there is no exception handling.\n\n**Binary:** `0b00000001010010110100100000100000`\n\n"); - let monaco_line_info = parser(".text".to_string(), Architecture::MIPS) + let monaco_line_info = parser(".text".to_string(), AvailableDatapaths::MIPS) .0 .monaco_line_info; assert_eq!(monaco_line_info[0].mouse_hover_string, "\n\n"); @@ -2538,7 +2540,7 @@ fn mouse_hover_holds_information_info_for_various_instruction_types() { let program_info = parser( ".text\nori $t1, $t2, 100\nlabel: subi $t1, $t2, 100\nadd $t1, $t2, $t3\nsyscall\n" .to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0; @@ -2553,12 +2555,12 @@ fn mouse_hover_holds_information_info_for_various_instruction_types() { fn instructions_directives_and_registers_work_regardless_of_capitalization() { let result = parser( ".TexT\nOR $t1, $T2, $t3\nor $t1, $t2, $t3\n.DATA\nabel: .WOrD 100".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ); let correct = parser( ".TexT\nOR $t1, $T2, $t3\nor $t1, $t2, $t3\n.DATA\nabel: .WOrD 100".to_lowercase(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ); assert_eq!(result.1, correct.1); assert_eq!( @@ -2579,23 +2581,23 @@ fn instructions_directives_and_registers_work_regardless_of_capitalization() { #[test] fn parser_assembler_works_with_empty_strings() { - let _ = parser("".to_string(), Architecture::MIPS); - let _ = parser("\n".to_string(), Architecture::MIPS); - let _ = parser("\n\n".to_string(), Architecture::MIPS); + let _ = parser("".to_string(), AvailableDatapaths::MIPS); + let _ = parser("\n".to_string(), AvailableDatapaths::MIPS); + let _ = parser("\n\n".to_string(), AvailableDatapaths::MIPS); } #[test] fn create_binary_vec_works_with_all_mod_4_options() { let result = parser( "ori $s0, $zero, 12345\nori $s0, $zero, 12345\n.data\nlab: .ascii \"h\"".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .1; assert_eq!(result, vec![873476153, 873476153, 12, 1744830464]); let result = parser( "ori $s0, $zero, 12345\nori $s0, $zero, 12345\n.data\nlab: .ascii \"ha\"".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .1; assert_eq!( @@ -2605,7 +2607,7 @@ fn create_binary_vec_works_with_all_mod_4_options() { let result = parser( "ori $s0, $zero, 12345\nori $s0, $zero, 12345\n.data\nlab: .ascii \"han\"".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .1; assert_eq!( @@ -2615,7 +2617,7 @@ fn create_binary_vec_works_with_all_mod_4_options() { let result = parser( "ori $s0, $zero, 12345\nori $s0, $zero, 12345\n.data\nlab: .ascii \"hank\"".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .1; assert_eq!( @@ -2627,7 +2629,7 @@ fn create_binary_vec_works_with_all_mod_4_options() { #[test] fn no_unsupported_mips_instructions_are_recognized_by_parser() { for instruction in UNSUPPORTED_INSTRUCTIONS_MIPS { - let result = parser(instruction.to_string(), Architecture::MIPS) + let result = parser(instruction.to_string(), AvailableDatapaths::MIPS) .0 .monaco_line_info; assert_eq!(result[0].errors[0].error_name, UnsupportedInstruction); @@ -2637,7 +2639,7 @@ fn no_unsupported_mips_instructions_are_recognized_by_parser() { #[test] fn supported_mips_instructions_are_recognized_by_parser() { for instruction in SUPPORTED_INSTRUCTIONS_MIPS { - let result = parser(instruction.to_string(), Architecture::MIPS) + let result = parser(instruction.to_string(), AvailableDatapaths::MIPS) .0 .monaco_line_info; for error in &result[0].errors { @@ -2651,7 +2653,7 @@ fn supported_mips_instructions_are_recognized_by_parser() { fn main_and_start_labelled_instructions_change_program_info_pc_starting_point() { let result = parser( "addi $t1, $t2, 100\nsw $t1, 400($zero)".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0 .pc_starting_point; @@ -2659,7 +2661,7 @@ fn main_and_start_labelled_instructions_change_program_info_pc_starting_point() let result = parser( "addi $t1, $t2, 100\nsw $t1, 400($zero)\nmain: lw $t2, 320($zero)".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0 .pc_starting_point; @@ -2667,7 +2669,7 @@ fn main_and_start_labelled_instructions_change_program_info_pc_starting_point() let result = parser( "addi $t1, $t2, 100\nstart: sw $t1, 400($zero)\nlw $t2, 320($zero)".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0 .pc_starting_point; @@ -2675,7 +2677,7 @@ fn main_and_start_labelled_instructions_change_program_info_pc_starting_point() let result = parser( "addi $t1, $t2, 100\nstart: sw $t1, 400($zero)\nmain: lw $t2, 320($zero)".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0 .pc_starting_point; diff --git a/src/tests/parser/parsing.rs b/src/tests/parser/parsing.rs index e9c4d4117..c0ca9ae18 100644 --- a/src/tests/parser/parsing.rs +++ b/src/tests/parser/parsing.rs @@ -1,3 +1,4 @@ +use crate::emulation_core::architectures::AvailableDatapaths; use crate::parser::assembling::assemble_data_binary; use crate::parser::parser_assembler_main::parser; use crate::parser::parser_structs_and_enums::ErrorType::{ @@ -5,7 +6,7 @@ use crate::parser::parser_structs_and_enums::ErrorType::{ }; use crate::parser::parser_structs_and_enums::TokenType::{Label, Operator, Unknown}; use crate::parser::parser_structs_and_enums::{ - Architecture, Data, Error, ErrorType, Instruction, LabelInstance, MonacoLineInfo, Token, + Data, Error, ErrorType, Instruction, LabelInstance, MonacoLineInfo, Token, }; use crate::parser::parsing::create_label_map; #[cfg(test)] @@ -327,13 +328,13 @@ fn separate_data_and_text_can_handle_empty_lines() { //check that the result generated with empty lines is identical to the result without empty lines save for line number let mut result_1 = parser( ".text\nori $s0, $zero, 0x1234\n\n.data\nlabel: .word 0xface".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0 .monaco_line_info; let result_2 = parser( ".text\nori $s0, $zero, 0x1234\n.data\nlabel: .word 0xface".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0 .monaco_line_info; @@ -351,7 +352,7 @@ fn separate_data_and_text_can_handle_empty_lines() { fn separate_data_and_text_generates_error_on_missing_commas_text() { let result = parser( "add, $t1, $t2, $t3,\nlw $t1 400($t2)".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0 .monaco_line_info; @@ -746,7 +747,7 @@ fn build_instruction_list_allows_double_label_on_instructions() { fn build_instruction_list_generates_error_on_label_on_last_line() { let result = parser( "lw $t1, 400($zero)\nadd $t1, $t2, $t3\nlabel:\n".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0 .monaco_line_info; @@ -845,7 +846,7 @@ fn create_label_map_pushes_errors_instead_of_inserting_duplicate_label_name() { fn suggest_error_corrections_works_with_various_gp_registers() { let result = parser( "add $t1, $t2, @t3\nori not, ro, 100".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0 .instructions; @@ -868,7 +869,7 @@ fn suggest_error_corrections_works_with_various_gp_registers() { fn suggest_error_corrections_works_with_various_fp_registers() { let result = parser( "add.s $f1, $f2, f3\nadd.d fake, $052, 1qp".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0 .instructions; @@ -895,7 +896,7 @@ fn suggest_error_corrections_works_with_various_fp_registers() { fn suggest_error_corrections_works_with_labels() { let result = parser( "j stable\nlabel: add $t1, $t2, $t3\ntable: sub $t1, $t2, $t3\nj lapel".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0 .instructions; @@ -914,7 +915,7 @@ fn suggest_error_corrections_works_with_labels() { fn suggest_error_corrections_works_with_labels_when_no_labels_specified() { let result = parser( "add $t1, $t2, $t3\nj stable\nlw $t1, 100($zero)\n".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0 .instructions; @@ -928,7 +929,7 @@ fn suggest_error_corrections_works_with_labels_when_no_labels_specified() { fn suggest_error_corrections_works_with_instructions() { let result = parser( "sun $t1, $t2, $t3\nqq $t1, 100($zero)\n.c.eqd $f1, $f1, $f3".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0 .instructions; @@ -952,7 +953,7 @@ fn suggest_error_corrections_works_with_data_types() { let result = parser( ".data\nlabel: word 100\ntable: .bite 'c','1'\nlapel: gobbledygook \"this is a string\"" .to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0 .data; @@ -975,7 +976,7 @@ fn suggest_error_corrections_works_with_data_types() { fn suggest_error_suggestions_associates_error_with_monaco_line_info() { let lines = parser( "ori $t1, 100, $t2\nlw $f1, 400($zero)\n.data\nword .wod \"a\"\n".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0 .monaco_line_info; @@ -1023,7 +1024,7 @@ fn suggest_error_suggestions_associates_error_with_monaco_line_info() { #[test] fn operators_with_commas_cause_error() { - let result = parser("ori, $t1, $t2, 100".to_string(), Architecture::MIPS) + let result = parser("ori, $t1, $t2, 100".to_string(), AvailableDatapaths::MIPS) .0 .monaco_line_info; diff --git a/src/tests/parser/pseudo_instruction_parsing.rs b/src/tests/parser/pseudo_instruction_parsing.rs index 603ddcf4b..1fcfb0b18 100644 --- a/src/tests/parser/pseudo_instruction_parsing.rs +++ b/src/tests/parser/pseudo_instruction_parsing.rs @@ -1,7 +1,8 @@ +use crate::emulation_core::architectures::AvailableDatapaths; use crate::parser::assembling::assemble_data_binary; use crate::parser::parser_assembler_main::parser; use crate::parser::parser_structs_and_enums::TokenType::Operator; -use crate::parser::parser_structs_and_enums::{Architecture, Instruction, ProgramInfo, Token}; +use crate::parser::parser_structs_and_enums::{Instruction, ProgramInfo, Token}; use crate::parser::parsing::{create_label_map, separate_data_and_text, tokenize_program}; use crate::parser::pseudo_instruction_parsing::{ complete_lw_sw_pseudo_instructions, expand_pseudo_instructions_and_assign_instruction_numbers, @@ -12,7 +13,7 @@ use std::collections::HashMap; fn expand_pseudo_instructions_and_assign_instruction_number_adds_syscall_if_it_is_missing() { let result = parser( "addi $t1, $t2, 100\nsw $t1, label".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0 .updated_monaco_string; @@ -26,7 +27,7 @@ fn expand_pseudo_instructions_and_assign_instruction_number_adds_syscall_at_begi ) { let result = parser( ".data\nword .word 100\nother .byte 'a','a'\n".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0 .updated_monaco_string; @@ -39,7 +40,7 @@ fn expand_pseudo_instructions_and_assign_instruction_number_adds_syscall_at_begi #[test] fn expand_pseudo_instructions_and_assign_instruction_number_adds_syscall_after_first_instance_of_text( ) { - let result = parser(".data\nword .word 100\n.text\n.data\nother .byte 'a','a'\n.text\n.data\nfinal: .space 10\n".to_string(), Architecture::MIPS).0.updated_monaco_string; + let result = parser(".data\nword .word 100\n.text\n.data\nother .byte 'a','a'\n.text\n.data\nfinal: .space 10\n".to_string(), AvailableDatapaths::MIPS).0.updated_monaco_string; let correct_result = ".data\nword .word 100\n.text\nsyscall\n.data\nother .byte 'a','a'\n.text\n.data\nfinal: .space 10\n".to_string(); @@ -51,7 +52,7 @@ fn expand_pseudo_instructions_and_assign_instruction_number_does_not_add_syscall { let result = parser( "addi $t1, $t2, 100\nsw $t1, label\nsyscall\n".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0 .updated_monaco_string; @@ -66,7 +67,7 @@ fn expand_pseudo_instructions_and_assign_instruction_number_adds_syscall_at_prop ) { let result = parser( "addi $t1, $t2, 100\nsw $t1, label\n.data\n word: .word 100\n".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0 .updated_monaco_string; @@ -81,7 +82,7 @@ fn expand_pseudo_instructions_and_assign_instruction_number_adds_syscall_at_prop fn add_syscall_to_program_info() { let result = parser( ".text\naddi $t1, $t2, $t3\nsyscall\n.data\n".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0 .instructions; @@ -1976,7 +1977,7 @@ fn complete_lw_sw_pseudo_instructions_doesnt_break_with_empty_instruction_list() fn expanded_pseudo_instructions_are_added_into_updated_monaco_string() { let result = parser( ".text\nli $t1, 100\nseq $t1, $t2, $t3\nsne $t1, $t2, $t3\nsle $t1, $t2, $t3\nsleu $t1, $t2, $t3\nsgt $t1, $t2, $t3\nsgtu $t1, $t2, $t3\nsge $t1, $t2, $t3\nsgeu $t1, $t2, $t3\nsubi $t1, $t2, 100\ndsubi $t1, $t2, 100\ndsubiu $t1, $t2, 100\nmuli $t1, $t2, 100\ndmuli $t1, $t2, 100\ndmuliu $t1, $t2, 100\ndivi $t1, 100\nddivi $t1, 100\nddiviu $t1, 100\nlw $t1, memory\n.data\nmemory: .word 200" - .to_string(), Architecture::MIPS + .to_string(), AvailableDatapaths::MIPS ) .0.updated_monaco_string; @@ -1987,7 +1988,7 @@ fn expanded_pseudo_instructions_are_added_into_updated_monaco_string() { fn pseudo_instructions_with_labels_put_label_on_the_first_expanded_instruction() { let result = parser( "label: ddiviu $t2, $t2, 100\n".to_string(), - Architecture::MIPS, + AvailableDatapaths::MIPS, ) .0 .instructions; From d83a540b8f2de1b92957390e66fdc22781b27ab0 Mon Sep 17 00:00:00 2001 From: Geetis <59862178+Geetis@users.noreply.github.com> Date: Wed, 13 Mar 2024 11:08:50 -0400 Subject: [PATCH 07/10] Fix --- src/emulation_core/architectures.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/emulation_core/architectures.rs b/src/emulation_core/architectures.rs index a78d2065d..9dfe17a25 100644 --- a/src/emulation_core/architectures.rs +++ b/src/emulation_core/architectures.rs @@ -2,7 +2,7 @@ use crate::agent::messages::MipsStateUpdate; use crate::emulation_core::mips::datapath::MipsDatapath; use serde::{Deserialize, Serialize}; -#[derive(Clone, Copy, Debug, Serialize, Deserialize, PartialEq)] +#[derive(Clone, Debug, Serialize, Deserialize, PartialEq)] pub enum AvailableDatapaths { MIPS, RISCV, From 15f74899ed5d3ad7160c596fb91fd600c6548d1f Mon Sep 17 00:00:00 2001 From: Geetis <59862178+Geetis@users.noreply.github.com> Date: Wed, 13 Mar 2024 11:10:31 -0400 Subject: [PATCH 08/10] Clippy fixes --- src/parser/parser_assembler_main.rs | 4 ++-- src/parser/pseudo_instruction_parsing.rs | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/parser/parser_assembler_main.rs b/src/parser/parser_assembler_main.rs index 6e92dc21e..aab92cea1 100644 --- a/src/parser/parser_assembler_main.rs +++ b/src/parser/parser_assembler_main.rs @@ -73,7 +73,7 @@ pub fn parser(file_string: String, arch: AvailableDatapaths) -> (ProgramInfo, Ve program_info.pc_starting_point = determine_pc_starting_point(labels); program_info.data_starting_point = data_starting_point; - return (program_info.clone(), binary); + (program_info.clone(), binary) } AvailableDatapaths::RISCV => { let mut program_info = ProgramInfo { @@ -128,7 +128,7 @@ pub fn parser(file_string: String, arch: AvailableDatapaths) -> (ProgramInfo, Ve program_info.pc_starting_point = determine_pc_starting_point(labels); program_info.data_starting_point = data_starting_point; - return (program_info.clone(), binary); + (program_info.clone(), binary) } } } diff --git a/src/parser/pseudo_instruction_parsing.rs b/src/parser/pseudo_instruction_parsing.rs index b70eb6a8d..02a1dcfbc 100644 --- a/src/parser/pseudo_instruction_parsing.rs +++ b/src/parser/pseudo_instruction_parsing.rs @@ -2099,5 +2099,5 @@ fn check_operands(instruction: &mut Instruction, num_operands: usize) -> bool { }); return false; } - return true; + true } From 28b367337f9b11baa4f75cb735a7649e1ce6bf9c Mon Sep 17 00:00:00 2001 From: Geetis <59862178+Geetis@users.noreply.github.com> Date: Wed, 13 Mar 2024 16:02:27 -0400 Subject: [PATCH 09/10] MIPS as default --- src/bin/main.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/bin/main.rs b/src/bin/main.rs index 8bc7d421e..afb2c1867 100644 --- a/src/bin/main.rs +++ b/src/bin/main.rs @@ -38,8 +38,8 @@ use yew_hooks::prelude::*; // To load in the Fibonacci example, uncomment the CONTENT and fib_model lines // and comment the code, language, and text_model lines. IMPORTANT: // rename fib_model to text_model to have it work. -const CONTENT: &str = include_str!("../../static/assembly_examples/riscv_test.asm"); -const ARCH: AvailableDatapaths = AvailableDatapaths::RISCV; +const CONTENT: &str = include_str!("../../static/assembly_examples/Fibonacci.asm"); +const ARCH: AvailableDatapaths = AvailableDatapaths::MIPS; #[derive(Properties, Clone, PartialEq)] struct AppProps { From f6d8ee725dd2353fed56b7a82df177fdf0abbf05 Mon Sep 17 00:00:00 2001 From: Geetis <59862178+Geetis@users.noreply.github.com> Date: Wed, 13 Mar 2024 16:05:27 -0400 Subject: [PATCH 10/10] Lowercase assembly example file --- src/bin/main.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/bin/main.rs b/src/bin/main.rs index afb2c1867..cad68d3c6 100644 --- a/src/bin/main.rs +++ b/src/bin/main.rs @@ -38,7 +38,7 @@ use yew_hooks::prelude::*; // To load in the Fibonacci example, uncomment the CONTENT and fib_model lines // and comment the code, language, and text_model lines. IMPORTANT: // rename fib_model to text_model to have it work. -const CONTENT: &str = include_str!("../../static/assembly_examples/Fibonacci.asm"); +const CONTENT: &str = include_str!("../../static/assembly_examples/fibonacci.asm"); const ARCH: AvailableDatapaths = AvailableDatapaths::MIPS; #[derive(Properties, Clone, PartialEq)]