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Reading isn't implemented because Sizif does not have enough cells inside CPLD to fit all ULA+ registers and instead use SRAM to store em. Reading would make things a much more complex. |
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Implemented with commit 8e09254 |
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According to the ULA+ specification, port 65339 is read/write. In sizif512 it looks like the port for registers (0-63) is write-only, it can only read from register 64 and only bit0.
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I also have Just Speccy 128k with SLAM+128 and it matches the specifications there.
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