From f72af511ed1283e4bd5758c18c9ad5788b20ce9d Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 21 Jan 2025 13:26:01 +0700 Subject: [PATCH 1/2] better workaround for S3 timing issue --- ports/espressif/supervisor/usb.c | 36 +++----------------------------- 1 file changed, 3 insertions(+), 33 deletions(-) diff --git a/ports/espressif/supervisor/usb.c b/ports/espressif/supervisor/usb.c index f9757926506a2..b3d8e633393dd 100644 --- a/ports/espressif/supervisor/usb.c +++ b/ports/espressif/supervisor/usb.c @@ -89,49 +89,19 @@ void tud_cdc_rx_cb(uint8_t itf) { } #endif // CIRCUITPY_USB_DEVICE - -#if defined(CONFIG_IDF_TARGET_ESP32S3) -// TEMPORARY WORKAROUND for https://github.com/hathach/tinyusb/issues/2943 -#include "soc/rtc_cntl_struct.h" -#include "soc/usb_wrap_struct.h" -#endif - void init_usb_hardware(void) { #if CIRCUITPY_USB_DEVICE // Configure USB PHY - - // TEMPORARY WORKAROUND for https://github.com/hathach/tinyusb/issues/2943 - #if defined(CONFIG_IDF_TARGET_ESP32S3) - - (void)phy_hdl; - periph_module_reset(PERIPH_USB_MODULE); - periph_module_enable(PERIPH_USB_MODULE); - - USB_WRAP.otg_conf.pad_enable = 1; - // USB_OTG use internal PHY - USB_WRAP.otg_conf.phy_sel = 0; - // phy_sel is controlled by the following register value - RTCCNTL.usb_conf.sw_hw_usb_phy_sel = 1; - // phy_sel=sw_usb_phy_sel=1, USB_OTG is connected with internal PHY - RTCCNTL.usb_conf.sw_usb_phy_sel = 1; - - gpio_set_drive_capability(USBPHY_DM_NUM, GPIO_DRIVE_CAP_3); - gpio_set_drive_capability(USBPHY_DP_NUM, GPIO_DRIVE_CAP_3); - #else - usb_phy_config_t phy_conf = { .controller = USB_PHY_CTRL_OTG, .target = USB_PHY_TARGET_INT, .otg_mode = USB_OTG_MODE_DEVICE, - #ifdef CONFIG_IDF_TARGET_ESP32P4 - .otg_speed = USB_PHY_SPEED_HIGH, - #else - .otg_speed = USB_PHY_SPEED_FULL, - #endif + // https://github.com/hathach/tinyusb/issues/2943#issuecomment-2601888322 + // Set speed to undefined (auto-detect) to avoid timinng/racing issue with S3 with host such as macOS + .otg_speed = USB_PHY_SPEED_UNDEFINED, }; usb_new_phy(&phy_conf, &phy_hdl); - #endif // Pin the USB task to the same core as CircuitPython. This way we leave // the other core for networking. From df142f285a4d13dbcec631e5d3a929fbf326077f Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Tue, 21 Jan 2025 09:28:23 -0500 Subject: [PATCH 2/2] ports/espressif/supervisor/usb.c: fix comment typo --- ports/espressif/supervisor/usb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ports/espressif/supervisor/usb.c b/ports/espressif/supervisor/usb.c index b3d8e633393dd..c2bf90b21b1f4 100644 --- a/ports/espressif/supervisor/usb.c +++ b/ports/espressif/supervisor/usb.c @@ -98,7 +98,7 @@ void init_usb_hardware(void) { .otg_mode = USB_OTG_MODE_DEVICE, // https://github.com/hathach/tinyusb/issues/2943#issuecomment-2601888322 - // Set speed to undefined (auto-detect) to avoid timinng/racing issue with S3 with host such as macOS + // Set speed to undefined (auto-detect) to avoid timing/race issue with S3 with host such as macOS .otg_speed = USB_PHY_SPEED_UNDEFINED, }; usb_new_phy(&phy_conf, &phy_hdl);