From d817097ca1504bbac68afa03578e31444b8f4284 Mon Sep 17 00:00:00 2001 From: Pop Ioan Daniel Date: Mon, 20 Jan 2025 09:32:51 +0200 Subject: [PATCH] docs: Update block diagrams Signed-off-by: Pop Ioan Daniel --- .../ad7405_fmc/ad7405_zed_cmos_diagram.svg | 10 +- .../ad7405_fmc/ad7405_zed_lvds_diagram.svg | 132 +++++++++++------- 2 files changed, 89 insertions(+), 53 deletions(-) diff --git a/docs/projects/ad7405_fmc/ad7405_zed_cmos_diagram.svg b/docs/projects/ad7405_fmc/ad7405_zed_cmos_diagram.svg index 7b51e67a6b..cdc04af875 100644 --- a/docs/projects/ad7405_fmc/ad7405_zed_cmos_diagram.svg +++ b/docs/projects/ad7405_fmc/ad7405_zed_cmos_diagram.svg @@ -24,9 +24,9 @@ inkscape:pagecheckerboard="0" inkscape:document-units="mm" showgrid="false" - inkscape:zoom="2.0938813" - inkscape:cx="357.23133" - inkscape:cy="289.41469" + inkscape:zoom="1.4805977" + inkscape:cx="275.9021" + inkscape:cy="301.90511" inkscape:window-width="1920" inkscape:window-height="1122" inkscape:window-x="-8" @@ -1302,7 +1302,7 @@ id="tspan41770-8" style="font-style:normal;font-variant:normal;font-weight:normal;font-stretch:normal;font-size:2.64583px;font-family:Arial;-inkscape-font-specification:'Arial, Normal';font-variant-ligatures:normal;font-variant-caps:normal;font-variant-numeric:normal;font-variant-east-asian:normal;stroke-width:0.264583" x="70.483963" - y="165.88783">ADC clock=50MHz + y="165.88783">ADC clock=40MHz + y="141.97137" /> diff --git a/docs/projects/ad7405_fmc/ad7405_zed_lvds_diagram.svg b/docs/projects/ad7405_fmc/ad7405_zed_lvds_diagram.svg index 421a1c3d92..8ccd1ea29a 100644 --- a/docs/projects/ad7405_fmc/ad7405_zed_lvds_diagram.svg +++ b/docs/projects/ad7405_fmc/ad7405_zed_lvds_diagram.svg @@ -11,6 +11,7 @@ inkscape:version="1.3 (0e150ed6c4, 2023-07-21)" xmlns:inkscape="http://www.inkscape.org/namespaces/inkscape" xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd" + xmlns:xlink="http://www.w3.org/1999/xlink" xmlns="http://www.w3.org/2000/svg" xmlns:svg="http://www.w3.org/2000/svg"> + + + + + 16 - - util_dec256sinc24b - - UTIL_DEC256SINC24B adc_data_p adc_data_n ADC clock=50MHz + y="177.97098">ADC clock=40MHz + style="stroke-width:0.44" /> + + + sinc3 filter + + AXI_AD7405