From 19db7127746bf60958af6021544fbfb2ae79cbd0 Mon Sep 17 00:00:00 2001 From: Daryl Maier Date: Thu, 3 Feb 2022 21:19:20 -0500 Subject: [PATCH] Fix JIT code breakpoints on x86 Code breakpoints inserted by the JIT should use an `int3` instruction rather than the `bad` pseudo instruction. Signed-off-by: Daryl Maier --- .../compiler/x/amd64/codegen/AMD64PrivateLinkage.cpp | 4 ++-- runtime/compiler/x/codegen/J9TreeEvaluator.cpp | 12 ++++++------ runtime/compiler/x/codegen/X86PrivateLinkage.cpp | 8 ++++---- .../compiler/x/i386/codegen/IA32PrivateLinkage.cpp | 4 ++-- 4 files changed, 14 insertions(+), 14 deletions(-) diff --git a/runtime/compiler/x/amd64/codegen/AMD64PrivateLinkage.cpp b/runtime/compiler/x/amd64/codegen/AMD64PrivateLinkage.cpp index e3cffb8db3a..d734097dbb1 100644 --- a/runtime/compiler/x/amd64/codegen/AMD64PrivateLinkage.cpp +++ b/runtime/compiler/x/amd64/codegen/AMD64PrivateLinkage.cpp @@ -1,5 +1,5 @@ /******************************************************************************* - * Copyright (c) 2000, 2021 IBM Corp. and others + * Copyright (c) 2000, 2022 IBM Corp. and others * * This program and the accompanying materials are made available under * the terms of the Eclipse Public License 2.0 which accompanies this @@ -1258,7 +1258,7 @@ void J9::X86::AMD64::PrivateLinkage::buildIPIC(TR::X86CallSite &site, TR::LabelS // let's just lay it down. It's likely not worth the effort to get // this exactly right in all cases. // - generateInstruction(TR::InstOpCode::bad, site.getCallNode(), cg()); + generateInstruction(TR::InstOpCode::INT3, site.getCallNode(), cg()); } } diff --git a/runtime/compiler/x/codegen/J9TreeEvaluator.cpp b/runtime/compiler/x/codegen/J9TreeEvaluator.cpp index b1b2b588771..0b752fef18d 100644 --- a/runtime/compiler/x/codegen/J9TreeEvaluator.cpp +++ b/runtime/compiler/x/codegen/J9TreeEvaluator.cpp @@ -217,7 +217,7 @@ static TR_OutlinedInstructions *generateArrayletReference( static char *forceArrayletInt = feGetEnv("TR_forceArrayletInt"); if (forceArrayletInt) { - generateInstruction(TR::InstOpCode::bad, node, cg); + generateInstruction(TR::InstOpCode::INT3, node, cg); } // ----------------------------------------------------------------------------------- @@ -4418,7 +4418,7 @@ void J9::X86::TreeEvaluator::asyncGCMapCheckPatching(TR::Node *node, TR::CodeGen // static char *d = feGetEnv("TR_GCOnAsyncBREAK"); if (d) - generateInstruction(TR::InstOpCode::bad, node, cg); + generateInstruction(TR::InstOpCode::INT3, node, cg); generateMemImmInstruction(TR::InstOpCode::S8MemImm4, node, generateX86MemoryReference(cg->getVMThreadRegister(), offsetof(J9VMThread, stackOverflowMark), cg), -1, cg); generateRegImmInstruction(TR::InstOpCode::MOV8RegImm4, node, tempReg, 1 << comp->getPersistentInfo()->getGCMapCheckEventHandle(), cg); @@ -4513,7 +4513,7 @@ void J9::X86::TreeEvaluator::asyncGCMapCheckPatching(TR::Node *node, TR::CodeGen static char *d = feGetEnv("TR_GCOnAsyncBREAK"); if (d) - generateInstruction(TR::InstOpCode::bad, node, cg); + generateInstruction(TR::InstOpCode::INT3, node, cg); //Populate the existing inline code // @@ -5933,7 +5933,7 @@ static void genHeapAlloc( UDATA sizeClass = fej9->getObjectSizeClass(allocationSizeOrDataOffset); if (comp->getOption(TR_BreakOnNew)) - generateInstruction(TR::InstOpCode::bad, node, cg); + generateInstruction(TR::InstOpCode::INT3, node, cg); // heap allocation, so proceed if (sizeReg) @@ -10511,7 +10511,7 @@ void J9::X86::TreeEvaluator::VMwrtbarRealTimeWithoutStoreEvaluator( if (comp->getOption(TR_BreakOnWriteBarrier)) { - generateInstruction(TR::InstOpCode::bad, node, cg); + generateInstruction(TR::InstOpCode::INT3, node, cg); } TR::SymbolReference *wrtBarSymRef = NULL; @@ -10842,7 +10842,7 @@ void J9::X86::TreeEvaluator::VMwrtbarWithoutStoreEvaluator( if (comp->getOption(TR_BreakOnWriteBarrier)) { - generateInstruction(TR::InstOpCode::bad, node, cg); + generateInstruction(TR::InstOpCode::INT3, node, cg); } TR::MemoryReference *fragmentParentMR = generateX86MemoryReference(cg->getVMThreadRegister(), fej9->thisThreadRememberedSetFragmentOffset() + fej9->getFragmentParentOffset(), cg); diff --git a/runtime/compiler/x/codegen/X86PrivateLinkage.cpp b/runtime/compiler/x/codegen/X86PrivateLinkage.cpp index 0104a11b7ea..f1b777b2fb6 100644 --- a/runtime/compiler/x/codegen/X86PrivateLinkage.cpp +++ b/runtime/compiler/x/codegen/X86PrivateLinkage.cpp @@ -1,5 +1,5 @@ /******************************************************************************* - * Copyright (c) 2000, 2021 IBM Corp. and others + * Copyright (c) 2000, 2022 IBM Corp. and others * * This program and the accompanying materials are made available under * the terms of the Eclipse Public License 2.0 which accompanies this @@ -596,7 +596,7 @@ void J9::X86::PrivateLinkage::createPrologue(TR::Instruction *cursor) // cursor = new (trHeapMemory()) TR::X86PaddingInstruction(cursor, minInstructionSize, TR_AtomicNoOpPadding, cg()); } - cursor = new (trHeapMemory()) TR::Instruction(TR::InstOpCode::bad, cursor, cg()); + cursor = new (trHeapMemory()) TR::Instruction(TR::InstOpCode::INT3, cursor, cg()); } // Compute the nature of the preserved regs @@ -1090,7 +1090,7 @@ J9::X86::PrivateLinkage::buildDirectDispatch( { if (TR::SimpleRegex::matchIgnoringLocale(r, name)) { - generateInstruction(TR::InstOpCode::bad, callNode, cg()); + generateInstruction(TR::InstOpCode::INT3, callNode, cg()); } } } @@ -2563,7 +2563,7 @@ void J9::X86::PrivateLinkage::buildInterfaceDispatchUsingLastITable (TR::X86Call // generateLabelInstruction(TR::InstOpCode::label, callNode, lastITableTestLabel, cg()); if (breakBeforeInterfaceDispatchUsingLastITable) - generateInstruction(TR::InstOpCode::bad, callNode, cg()); + generateInstruction(TR::InstOpCode::INT3, callNode, cg()); generateRegMemInstruction(TR::InstOpCode::LRegMem(), callNode, scratchReg, generateX86MemoryReference(vftReg, (int32_t)fej9->getOffsetOfLastITableFromClassField(), cg()), cg()); bool use32BitInterfacePointers = comp()->target().is32Bit(); if (comp()->useCompressedPointers() /* actually compressed object headers */) diff --git a/runtime/compiler/x/i386/codegen/IA32PrivateLinkage.cpp b/runtime/compiler/x/i386/codegen/IA32PrivateLinkage.cpp index 317614f9ab5..9fb80d7a760 100644 --- a/runtime/compiler/x/i386/codegen/IA32PrivateLinkage.cpp +++ b/runtime/compiler/x/i386/codegen/IA32PrivateLinkage.cpp @@ -1,5 +1,5 @@ /******************************************************************************* - * Copyright (c) 2000, 2021 IBM Corp. and others + * Copyright (c) 2000, 2022 IBM Corp. and others * * This program and the accompanying materials are made available under * the terms of the Eclipse Public License 2.0 which accompanies this @@ -606,7 +606,7 @@ void J9::X86::I386::PrivateLinkage::buildIPIC( if (useLastITableCache) { if (breakBeforeIPICUsingLastITable) - generateInstruction(TR::InstOpCode::bad, site.getCallNode(), cg()); + generateInstruction(TR::InstOpCode::INT3, site.getCallNode(), cg()); if (numIPicSlotsBeforeLastITable) numIPicSlots = atoi(numIPicSlotsBeforeLastITable); }