From ede324db11bbcde1eb7a41ff80bc2cca5093631d Mon Sep 17 00:00:00 2001 From: mr-sven Date: Sat, 25 Jan 2020 18:15:22 +0100 Subject: [PATCH 01/19] modified include for hal --- platform/freertos/btstack_run_loop_freertos.c | 2 +- platform/freertos/btstack_uart_block_freertos.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/platform/freertos/btstack_run_loop_freertos.c b/platform/freertos/btstack_run_loop_freertos.c index 3052300946..c2fbcf3964 100644 --- a/platform/freertos/btstack_run_loop_freertos.c +++ b/platform/freertos/btstack_run_loop_freertos.c @@ -52,7 +52,7 @@ #include "btstack_linked_list.h" #include "btstack_debug.h" #include "btstack_util.h" -#include "hal_time_ms.h" +#include // some SDKs, e.g. esp-idf, place FreeRTOS headers into an 'freertos' folder to avoid name collisions (e.g. list.h, queue.h, ..) // wih this flag, the headers are properly found diff --git a/platform/freertos/btstack_uart_block_freertos.c b/platform/freertos/btstack_uart_block_freertos.c index eeba24e490..48f659c587 100644 --- a/platform/freertos/btstack_uart_block_freertos.c +++ b/platform/freertos/btstack_uart_block_freertos.c @@ -48,7 +48,7 @@ #include "btstack_debug.h" #include "btstack_uart_block.h" #include "btstack_run_loop_freertos.h" -#include "hal_uart_dma.h" +#include #ifdef HAVE_FREERTOS_INCLUDE_PREFIX #include "freertos/FreeRTOS.h" From 6780a87f2fda295fd93a8a01fa0b7d1949a879be Mon Sep 17 00:00:00 2001 From: mr-sven Date: Sat, 25 Jan 2020 18:19:01 +0100 Subject: [PATCH 02/19] fixed prototype error --- platform/embedded/btstack_em9304_spi_embedded.c | 2 +- platform/embedded/hal_em9304_spi.h | 2 +- src/hci_transport_h5.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/platform/embedded/btstack_em9304_spi_embedded.c b/platform/embedded/btstack_em9304_spi_embedded.c index 85318bb447..b0dcd02693 100644 --- a/platform/embedded/btstack_em9304_spi_embedded.c +++ b/platform/embedded/btstack_em9304_spi_embedded.c @@ -145,7 +145,7 @@ static void btstack_em9304_spi_embedded_set_transfer_done_callback(void (*callba /** * @brief Poll READY state */ -static int btstack_em9304_spi_embedded_get_ready(){ +static int btstack_em9304_spi_embedded_get_ready(void){ return hal_em9304_spi_get_ready(); } diff --git a/platform/embedded/hal_em9304_spi.h b/platform/embedded/hal_em9304_spi.h index c7a7b9e2db..cec539109f 100644 --- a/platform/embedded/hal_em9304_spi.h +++ b/platform/embedded/hal_em9304_spi.h @@ -87,7 +87,7 @@ void hal_em9304_spi_disable_ready_interrupt(void); /** * @brief Poll READY state */ -int hal_em9304_spi_get_ready(); +int hal_em9304_spi_get_ready(void); /** * @brief Set Chip Selet diff --git a/src/hci_transport_h5.c b/src/hci_transport_h5.c index 8a5c40e913..4f01e6b3dd 100644 --- a/src/hci_transport_h5.c +++ b/src/hci_transport_h5.c @@ -738,7 +738,7 @@ static void hci_transport_h5_read_next_byte(void){ // track time receiving SLIP frame static uint32_t hci_transport_h5_receive_start; -static void hci_transport_h5_block_received(){ +static void hci_transport_h5_block_received(void){ if (hci_transport_h5_active == 0) return; // track start time when receiving first byte // a bit hackish From 424c8ee6a610ffaa43e5eb23aff699cd71f3ed74 Mon Sep 17 00:00:00 2001 From: mr-sven Date: Sat, 25 Jan 2020 18:23:21 +0100 Subject: [PATCH 03/19] make OPCODE() global available --- src/bluetooth.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/bluetooth.h b/src/bluetooth.h index 55ab64ebdb..e176491365 100644 --- a/src/bluetooth.h +++ b/src/bluetooth.h @@ -380,7 +380,7 @@ typedef enum { #define OGF_LE_CONTROLLER 0x08 #define OGF_VENDOR 0x3f - +#define OPCODE(ogf, ocf) ((ocf) | ((ogf) << 10)) /** From 6a756957f898c5b91499b216378dd1c1b11c5721 Mon Sep 17 00:00:00 2001 From: mr-sven Date: Sat, 25 Jan 2020 18:32:24 +0100 Subject: [PATCH 04/19] removed OPCODE() due global available --- chipset/em9301/btstack_chipset_em9301.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/chipset/em9301/btstack_chipset_em9301.c b/chipset/em9301/btstack_chipset_em9301.c index d956fee826..6d9953bc40 100644 --- a/chipset/em9301/btstack_chipset_em9301.c +++ b/chipset/em9301/btstack_chipset_em9301.c @@ -53,9 +53,6 @@ #include /* memcpy */ #include "hci.h" -// should go to some common place -#define OPCODE(ogf, ocf) (ocf | ogf << 10) - #define HCI_OPCODE_EM_WRITE_PATCH_START (0xFC27) #define HCI_OPCODE_EM_WRITE_PATCH_CONTINUE (0xFC28) #define HCI_OPCODE_EM_WRITE_PATCH_ABORT (0xFC29) From 01230371cc1ea0f36b93360a1e22fffad8dab024 Mon Sep 17 00:00:00 2001 From: mr-sven Date: Sat, 25 Jan 2020 18:47:41 +0100 Subject: [PATCH 05/19] used OPCODE() and const --- chipset/em9301/btstack_chipset_em9301.c | 52 +++++++++++++++++-------- chipset/em9301/btstack_chipset_em9301.h | 1 + 2 files changed, 37 insertions(+), 16 deletions(-) diff --git a/chipset/em9301/btstack_chipset_em9301.c b/chipset/em9301/btstack_chipset_em9301.c index 6d9953bc40..be8bd44fc1 100644 --- a/chipset/em9301/btstack_chipset_em9301.c +++ b/chipset/em9301/btstack_chipset_em9301.c @@ -53,23 +53,36 @@ #include /* memcpy */ #include "hci.h" -#define HCI_OPCODE_EM_WRITE_PATCH_START (0xFC27) -#define HCI_OPCODE_EM_WRITE_PATCH_CONTINUE (0xFC28) -#define HCI_OPCODE_EM_WRITE_PATCH_ABORT (0xFC29) -#define HCI_OPCODE_EM_CPU_RESET (0xFC32) +// general vendor opcodes +#define HCI_OPCODE_EM_SET_PUBLIC_ADDRESS 0x02 +#define HCI_OPCODE_EM_SET_UART_BAUD_RATE 0x07 +#define HCI_OPCODE_EM_TRANSMITTER_TEST 0x11 +#define HCI_OPCODE_EM_TRANSMITTER_TEST_END 0x12 + +// EM9301 vendor opcodes +#define HCI_OPCODE_EM_SET_OPERATING_STATE 0x03 + +// EM9304 vendor opcodes +#define HCI_OPCODE_EM_WRITE_PATCH_START 0x27 +#define HCI_OPCODE_EM_WRITE_PATCH_CONTINUE 0x28 +#define HCI_OPCODE_EM_WRITE_PATCH_ABORT 0x29 +#define HCI_OPCODE_EM_SET_MEMORY_MODE 0x2B +#define HCI_OPCODE_EM_SET_SLEEP_OPTIONS 0x2D +#define HCI_OPCODE_EM_CPU_RESET 0x32 +#define HCI_OPCODE_EM_PATCH_QUERY 0x34 /** * @param bd_addr */ const hci_cmd_t hci_vendor_em_set_public_address = { - 0xFC02, "B" + OPCODE(OGF_VENDOR, HCI_OPCODE_EM_SET_PUBLIC_ADDRESS), "B" }; /** * @param baud_rate_index */ const hci_cmd_t hci_vendor_em_set_uart_baudrate = { - 0xFC07, "1" + OPCODE(OGF_VENDOR, HCI_OPCODE_EM_SET_UART_BAUD_RATE), "1" }; /** @@ -79,20 +92,20 @@ const hci_cmd_t hci_vendor_em_set_uart_baudrate = { * @param packet_payload_type */ const hci_cmd_t hci_vendor_em_transmitter_test = { - 0xFC11, "1111" + OPCODE(OGF_VENDOR, HCI_OPCODE_EM_TRANSMITTER_TEST), "1111" }; /** */ const hci_cmd_t hci_vendor_em_transmitter_test_end = { - 0xFC12, "" + OPCODE(OGF_VENDOR, HCI_OPCODE_EM_TRANSMITTER_TEST_END), "" }; /** * @param patch_index */ const hci_cmd_t hci_vendor_em_patch_query = { - 0xFC34, "2" + OPCODE(OGF_VENDOR, HCI_OPCODE_EM_PATCH_QUERY), "2" }; /** @@ -100,14 +113,21 @@ const hci_cmd_t hci_vendor_em_patch_query = { * @param memory_attribute */ const hci_cmd_t hci_vendor_em_set_memory_mode = { - 0xFC2B, "1" + OPCODE(OGF_VENDOR, HCI_OPCODE_EM_SET_MEMORY_MODE), "1" }; /** * @param sleep_option_settings */ const hci_cmd_t hci_vendor_em_set_sleep_options = { - 0xFC2D, "1" + OPCODE(OGF_VENDOR, HCI_OPCODE_EM_SET_SLEEP_OPTIONS), "1" +}; + +/** + * @param operating_state_settings + */ +const hci_cmd_t hci_vendor_em_set_operating_state = { + OPCODE(OGF_VENDOR, HCI_OPCODE_EM_SET_OPERATING_STATE), "1" }; // baudrate to index for hci_vendor_em_set_uart_baudrate @@ -167,7 +187,7 @@ static uint32_t btstack_crc32(const uint8_t *buf, uint16_t size){ #endif static void chipset_set_bd_addr_command(bd_addr_t addr, uint8_t *hci_cmd_buffer){ - little_endian_store_16(hci_cmd_buffer, 0, OPCODE(OGF_VENDOR, 0x02)); + little_endian_store_16(hci_cmd_buffer, 0, hci_vendor_em_set_public_address.opcode); hci_cmd_buffer[2] = 0x06; reverse_bd_addr(addr, &hci_cmd_buffer[3]); } @@ -186,7 +206,7 @@ static void chipset_set_baudrate_command(uint32_t baudrate, uint8_t *hci_cmd_buf log_error("Baudrate %u not found in table", baudrate); return; } - little_endian_store_16(hci_cmd_buffer, 0, OPCODE(OGF_VENDOR, 0x07)); + little_endian_store_16(hci_cmd_buffer, 0, hci_vendor_em_set_uart_baudrate.opcode); hci_cmd_buffer[2] = 0x01; hci_cmd_buffer[3] = i; } @@ -205,7 +225,7 @@ static btstack_chipset_result_t chipset_next_command(uint8_t * hci_cmd_buffer){ if (container_blob_offset >= container_blob_size) { if (0 == em_cpu_reset_sent){ // send EM CPU Reset - little_endian_store_16(hci_cmd_buffer, 0, HCI_OPCODE_EM_CPU_RESET); + little_endian_store_16(hci_cmd_buffer, 0, OPCODE(OGF_VENDOR, HCI_OPCODE_EM_CPU_RESET)); hci_cmd_buffer[2] = 0; em_cpu_reset_sent = 1; return BTSTACK_CHIPSET_VALID_COMMAND; @@ -241,7 +261,7 @@ static btstack_chipset_result_t chipset_next_command(uint8_t * hci_cmd_buffer){ (int) little_endian_read_16(container_blob_data, container_blob_offset+14), (int) container_size); // build command - little_endian_store_16(hci_cmd_buffer, 0, HCI_OPCODE_EM_WRITE_PATCH_START); + little_endian_store_16(hci_cmd_buffer, 0, OPCODE(OGF_VENDOR, HCI_OPCODE_EM_WRITE_PATCH_START)); hci_cmd_buffer[2] = 5 + bytes_to_upload; hci_cmd_buffer[3] = 0; // upload to iRAM1 little_endian_store_32(hci_cmd_buffer, 4, crc); @@ -256,7 +276,7 @@ static btstack_chipset_result_t chipset_next_command(uint8_t * hci_cmd_buffer){ bytes_to_upload = btstack_min(58, container_end - container_blob_offset); crc = btstack_crc32(&container_blob_data[container_blob_offset], bytes_to_upload); // build command - little_endian_store_16(hci_cmd_buffer, 0, HCI_OPCODE_EM_WRITE_PATCH_CONTINUE); + little_endian_store_16(hci_cmd_buffer, 0, OPCODE(OGF_VENDOR, HCI_OPCODE_EM_WRITE_PATCH_CONTINUE)); hci_cmd_buffer[2] = 6 + bytes_to_upload; little_endian_store_16(hci_cmd_buffer, 3, patch_sequence_number++); little_endian_store_32(hci_cmd_buffer, 5, crc); diff --git a/chipset/em9301/btstack_chipset_em9301.h b/chipset/em9301/btstack_chipset_em9301.h index 053f7dbd78..704b1b22b4 100644 --- a/chipset/em9301/btstack_chipset_em9301.h +++ b/chipset/em9301/btstack_chipset_em9301.h @@ -63,6 +63,7 @@ extern const hci_cmd_t hci_vendor_em_transmitter_test_end; extern const hci_cmd_t hci_vendor_em_patch_query; extern const hci_cmd_t hci_vendor_em_set_memory_mode; extern const hci_cmd_t hci_vendor_em_set_sleep_options; +extern const hci_cmd_t hci_vendor_em_set_operating_state; #if defined __cplusplus } From 2a405b72a9739afdcad919d134056b0cb3271970 Mon Sep 17 00:00:00 2001 From: mr-sven Date: Tue, 11 Feb 2020 12:36:44 +0100 Subject: [PATCH 06/19] added subevents --- chipset/em9301/btstack_chipset_em9301.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/chipset/em9301/btstack_chipset_em9301.h b/chipset/em9301/btstack_chipset_em9301.h index 704b1b22b4..5871209a87 100644 --- a/chipset/em9301/btstack_chipset_em9301.h +++ b/chipset/em9301/btstack_chipset_em9301.h @@ -65,6 +65,9 @@ extern const hci_cmd_t hci_vendor_em_set_memory_mode; extern const hci_cmd_t hci_vendor_em_set_sleep_options; extern const hci_cmd_t hci_vendor_em_set_operating_state; +#define HCI_SUBEVENT_EM_STANDBY_STATE 0x01 +#define HCI_SUBEVENT_EM_BLE_IDLE_ENTERED 0x02 + #if defined __cplusplus } #endif From 08702600a65ebf305a546780cc7f016f14b49fb7 Mon Sep 17 00:00:00 2001 From: mr-sven Date: Tue, 11 Feb 2020 12:49:24 +0100 Subject: [PATCH 07/19] added macro HAL_UART_DMA_DEINIT for enabling UART close function --- platform/embedded/hal_uart_dma.h | 5 +++++ platform/freertos/btstack_uart_block_freertos.c | 4 +++- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/platform/embedded/hal_uart_dma.h b/platform/embedded/hal_uart_dma.h index f3d5a3aeed..315f0d04e6 100644 --- a/platform/embedded/hal_uart_dma.h +++ b/platform/embedded/hal_uart_dma.h @@ -61,6 +61,11 @@ extern "C" { */ void hal_uart_dma_init(void); +/** + * @brief Deinit and close device + */ +void hal_uart_dma_deinit(void); + /** * @brief Set callback for block received - can be called from ISR context * @param callback diff --git a/platform/freertos/btstack_uart_block_freertos.c b/platform/freertos/btstack_uart_block_freertos.c index 48f659c587..68aced341e 100644 --- a/platform/freertos/btstack_uart_block_freertos.c +++ b/platform/freertos/btstack_uart_block_freertos.c @@ -126,9 +126,11 @@ static int btstack_uart_block_freertos_open(void){ } static int btstack_uart_block_freertos_close(void){ - // close device // ... +#ifdef HAL_UART_DMA_DEINIT + hal_uart_dma_deinit(); +#endif return 0; } From cc297182311aa01837cb90c981fc532139df49fb Mon Sep 17 00:00:00 2001 From: mr-sven Date: Tue, 11 Feb 2020 13:12:44 +0100 Subject: [PATCH 08/19] modified OPCODE to HCI_CMD_OPCODE --- chipset/em9301/btstack_chipset_em9301.c | 22 +++++++++++----------- src/bluetooth.h | 2 +- 2 files changed, 12 insertions(+), 12 deletions(-) diff --git a/chipset/em9301/btstack_chipset_em9301.c b/chipset/em9301/btstack_chipset_em9301.c index be8bd44fc1..5e6605209e 100644 --- a/chipset/em9301/btstack_chipset_em9301.c +++ b/chipset/em9301/btstack_chipset_em9301.c @@ -75,14 +75,14 @@ * @param bd_addr */ const hci_cmd_t hci_vendor_em_set_public_address = { - OPCODE(OGF_VENDOR, HCI_OPCODE_EM_SET_PUBLIC_ADDRESS), "B" + HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_SET_PUBLIC_ADDRESS), "B" }; /** * @param baud_rate_index */ const hci_cmd_t hci_vendor_em_set_uart_baudrate = { - OPCODE(OGF_VENDOR, HCI_OPCODE_EM_SET_UART_BAUD_RATE), "1" + HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_SET_UART_BAUD_RATE), "1" }; /** @@ -92,20 +92,20 @@ const hci_cmd_t hci_vendor_em_set_uart_baudrate = { * @param packet_payload_type */ const hci_cmd_t hci_vendor_em_transmitter_test = { - OPCODE(OGF_VENDOR, HCI_OPCODE_EM_TRANSMITTER_TEST), "1111" + HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_TRANSMITTER_TEST), "1111" }; /** */ const hci_cmd_t hci_vendor_em_transmitter_test_end = { - OPCODE(OGF_VENDOR, HCI_OPCODE_EM_TRANSMITTER_TEST_END), "" + HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_TRANSMITTER_TEST_END), "" }; /** * @param patch_index */ const hci_cmd_t hci_vendor_em_patch_query = { - OPCODE(OGF_VENDOR, HCI_OPCODE_EM_PATCH_QUERY), "2" + HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_PATCH_QUERY), "2" }; /** @@ -113,21 +113,21 @@ const hci_cmd_t hci_vendor_em_patch_query = { * @param memory_attribute */ const hci_cmd_t hci_vendor_em_set_memory_mode = { - OPCODE(OGF_VENDOR, HCI_OPCODE_EM_SET_MEMORY_MODE), "1" + HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_SET_MEMORY_MODE), "1" }; /** * @param sleep_option_settings */ const hci_cmd_t hci_vendor_em_set_sleep_options = { - OPCODE(OGF_VENDOR, HCI_OPCODE_EM_SET_SLEEP_OPTIONS), "1" + HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_SET_SLEEP_OPTIONS), "1" }; /** * @param operating_state_settings */ const hci_cmd_t hci_vendor_em_set_operating_state = { - OPCODE(OGF_VENDOR, HCI_OPCODE_EM_SET_OPERATING_STATE), "1" + HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_SET_OPERATING_STATE), "1" }; // baudrate to index for hci_vendor_em_set_uart_baudrate @@ -225,7 +225,7 @@ static btstack_chipset_result_t chipset_next_command(uint8_t * hci_cmd_buffer){ if (container_blob_offset >= container_blob_size) { if (0 == em_cpu_reset_sent){ // send EM CPU Reset - little_endian_store_16(hci_cmd_buffer, 0, OPCODE(OGF_VENDOR, HCI_OPCODE_EM_CPU_RESET)); + little_endian_store_16(hci_cmd_buffer, 0, HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_CPU_RESET)); hci_cmd_buffer[2] = 0; em_cpu_reset_sent = 1; return BTSTACK_CHIPSET_VALID_COMMAND; @@ -261,7 +261,7 @@ static btstack_chipset_result_t chipset_next_command(uint8_t * hci_cmd_buffer){ (int) little_endian_read_16(container_blob_data, container_blob_offset+14), (int) container_size); // build command - little_endian_store_16(hci_cmd_buffer, 0, OPCODE(OGF_VENDOR, HCI_OPCODE_EM_WRITE_PATCH_START)); + little_endian_store_16(hci_cmd_buffer, 0, HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_WRITE_PATCH_START)); hci_cmd_buffer[2] = 5 + bytes_to_upload; hci_cmd_buffer[3] = 0; // upload to iRAM1 little_endian_store_32(hci_cmd_buffer, 4, crc); @@ -276,7 +276,7 @@ static btstack_chipset_result_t chipset_next_command(uint8_t * hci_cmd_buffer){ bytes_to_upload = btstack_min(58, container_end - container_blob_offset); crc = btstack_crc32(&container_blob_data[container_blob_offset], bytes_to_upload); // build command - little_endian_store_16(hci_cmd_buffer, 0, OPCODE(OGF_VENDOR, HCI_OPCODE_EM_WRITE_PATCH_CONTINUE)); + little_endian_store_16(hci_cmd_buffer, 0, HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_WRITE_PATCH_CONTINUE)); hci_cmd_buffer[2] = 6 + bytes_to_upload; little_endian_store_16(hci_cmd_buffer, 3, patch_sequence_number++); little_endian_store_32(hci_cmd_buffer, 5, crc); diff --git a/src/bluetooth.h b/src/bluetooth.h index e176491365..9cc5962bb2 100644 --- a/src/bluetooth.h +++ b/src/bluetooth.h @@ -380,7 +380,7 @@ typedef enum { #define OGF_LE_CONTROLLER 0x08 #define OGF_VENDOR 0x3f -#define OPCODE(ogf, ocf) ((ocf) | ((ogf) << 10)) +#define HCI_CMD_OPCODE(ogf, ocf) ((ocf) | ((ogf) << 10)) /** From 617747ee870919eb3dd91e279c8d81c35b74a00f Mon Sep 17 00:00:00 2001 From: mr-sven Date: Fri, 14 Feb 2020 09:42:37 +0100 Subject: [PATCH 09/19] Added patch file for EM9301 --- chipset/em9301/EM9301_Patch_V0x0A.c | 142 ++++++++++++++++++++++++++++ 1 file changed, 142 insertions(+) create mode 100644 chipset/em9301/EM9301_Patch_V0x0A.c diff --git a/chipset/em9301/EM9301_Patch_V0x0A.c b/chipset/em9301/EM9301_Patch_V0x0A.c new file mode 100644 index 0000000000..d6afa024cf --- /dev/null +++ b/chipset/em9301/EM9301_Patch_V0x0A.c @@ -0,0 +1,142 @@ +/* + * EM9301_Patch_V0x0A.c + * + * Created on: 14.02.2020 + * Author: sven + */ + +#define BTSTACK_FILE__ "EM9301_Patch_V0x0A.c" + +//EM9301 patch version pram_2kx22_v0x0A_patch +const uint8_t EMPatchArray[] = { +0xef, 0xff, 0xfe, 0xf7, 0x3b, 0xff, 0xfc, 0xf7, 0xd9, 0xf8, 0xd8, 0xf8, 0xc8, 0xf8, 0xc7, 0xf8, 0x5a, 0xf8, 0x59, 0xf8, 0x58, 0xf8, 0x57, 0xf8, 0x56, 0xf8, 0x55, 0xf8, 0x54, 0xf8, 0x53, 0xf8, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, +0xf3, 0xa7, 0xff, 0xa6, 0xe9, 0xff, 0xff, 0xdf, 0x1f, 0xaa, 0xec, 0xff, 0xff, 0x74, 0xff, 0x75, 0xff, 0x78, 0xff, 0x79, 0xfe, 0xaf, 0xff, 0xaf, 0x00, 0xff, 0xff, 0xaf, 0x01, 0xff, 0xf3, 0xab, 0x0e, 0x0e, 0x33, 0x0b, 0x0e, 0x33, 0x03, 0x03, 0x03, 0x03, 0x16, 0x0e, 0x02, 0x0e, 0x02, 0x04, +0xbf, 0x2b, 0xff, 0x1b, 0xe0, 0xff, 0x29, 0xf3, 0xc4, 0xaf, 0xf7, 0xab, 0xef, 0xbb, 0xf7, 0xbb, 0x03, 0x2a, 0x97, 0xab, 0xbf, 0x2b, 0xff, 0x1b, 0xcb, 0xff, 0xff, 0xdf, 0xfc, 0xef, 0x03, 0x2a, 0x0e, 0x0e, 0x32, 0x3a, 0x0c, 0x04, 0x0e, 0x01, 0x0e, 0x04, 0x0e, 0x0e, 0x32, 0x0b, 0x00, 0x0e, +0x97, 0xab, 0xbf, 0x2b, 0xff, 0x1b, 0xd2, 0xff, 0xf7, 0xab, 0x10, 0x2b, 0xf7, 0xbb, 0x98, 0xab, 0xfb, 0x1b, 0xb0, 0xff, 0x98, 0xab, 0xc0, 0xff, 0x99, 0x7f, 0x98, 0xab, 0xc3, 0xff, 0xfe, 0xaf, 0x04, 0x0e, 0x0e, 0x36, 0x04, 0x0e, 0x01, 0x04, 0x0e, 0x36, 0x04, 0x36, 0x00, 0x04, 0x32, 0x0e, +0x01, 0xff, 0xff, 0xab, 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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, +0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, +0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x0a, 0x00, 0x00, 0x00, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x00, 0x00 +}; + +const uint32_t EMPatchArray_size = sizeof(EMPatchArray); From fc3a29b6d34e1ce8791add390804aed2d9a33b8b Mon Sep 17 00:00:00 2001 From: mr-sven Date: Fri, 14 Feb 2020 09:42:52 +0100 Subject: [PATCH 10/19] added patch commands --- chipset/em9301/btstack_chipset_em9301.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/chipset/em9301/btstack_chipset_em9301.c b/chipset/em9301/btstack_chipset_em9301.c index 5e6605209e..fdc0bbe788 100644 --- a/chipset/em9301/btstack_chipset_em9301.c +++ b/chipset/em9301/btstack_chipset_em9301.c @@ -60,7 +60,11 @@ #define HCI_OPCODE_EM_TRANSMITTER_TEST_END 0x12 // EM9301 vendor opcodes +#define HCI_OPCODE_EM_WRITE_DATA 0x00 +#define HCI_OPCODE_EM_READ_DATA 0x01 #define HCI_OPCODE_EM_SET_OPERATING_STATE 0x03 +#define HCI_OPCODE_EM_WRITE_PROGRAM 0x80 // only in IPS mode available +#define HCI_OPCODE_EM_CALC_CRC_CODE 0x81 // only in IPS mode available // EM9304 vendor opcodes #define HCI_OPCODE_EM_WRITE_PATCH_START 0x27 From 335cc0f2e269fd3bb8bc740c55b982e4ed1b9e15 Mon Sep 17 00:00:00 2001 From: mr-sven Date: Fri, 14 Feb 2020 11:23:50 +0100 Subject: [PATCH 11/19] missing include --- chipset/em9301/EM9301_Patch_V0x0A.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/chipset/em9301/EM9301_Patch_V0x0A.c b/chipset/em9301/EM9301_Patch_V0x0A.c index d6afa024cf..3c36203b29 100644 --- a/chipset/em9301/EM9301_Patch_V0x0A.c +++ b/chipset/em9301/EM9301_Patch_V0x0A.c @@ -7,6 +7,8 @@ #define BTSTACK_FILE__ "EM9301_Patch_V0x0A.c" +#include + //EM9301 patch version pram_2kx22_v0x0A_patch const uint8_t EMPatchArray[] = { 0xef, 0xff, 0xfe, 0xf7, 0x3b, 0xff, 0xfc, 0xf7, 0xd9, 0xf8, 0xd8, 0xf8, 0xc8, 0xf8, 0xc7, 0xf8, 0x5a, 0xf8, 0x59, 0xf8, 0x58, 0xf8, 0x57, 0xf8, 0x56, 0xf8, 0x55, 0xf8, 0x54, 0xf8, 0x53, 0xf8, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, From 2778e122e94b3c0d87f82786111759ac282893d7 Mon Sep 17 00:00:00 2001 From: mr-sven Date: Fri, 14 Feb 2020 11:24:14 +0100 Subject: [PATCH 12/19] WIP: added em9301 patch routine --- chipset/em9301/btstack_chipset_em9301.c | 125 ++++++++++++++++++++++++ 1 file changed, 125 insertions(+) diff --git a/chipset/em9301/btstack_chipset_em9301.c b/chipset/em9301/btstack_chipset_em9301.c index fdc0bbe788..576a917a38 100644 --- a/chipset/em9301/btstack_chipset_em9301.c +++ b/chipset/em9301/btstack_chipset_em9301.c @@ -296,14 +296,139 @@ static btstack_chipset_result_t chipset_next_command(uint8_t * hci_cmd_buffer){ } #endif +#ifdef HAVE_EM9301_PATCH_CONTAINER + +/* Number of ROW in patch file [0-63] */ +#define NUMBER_OF_ROWS 64 + +/* Number of Bytes Per ROW in patch file [0-63] */ +#define ROW_SIZE 48 + +/* Number of Sectors [0-17] in patch file [0-63] */ +#define NUMBER_OF_SECTORS 2 + +extern const uint8_t EMPatchArray[]; +extern const uint32_t EMPatchArray_size; + +signed char currentRow; +signed char currentSector; + +uint8_t patchLoadingState; + +#define PATCH_LOAD_STATE_NOTSTARTED 0x00u +#define PATCH_LOAD_STATE_ENTERINGISPMODE 0x01u +#define PATCH_LOAD_STATE_LOADING 0x02u +#define PATCH_LOAD_STATE_EXITINGISPMODE 0x04u +#define PATCH_LOAD_STATE_DONE 0x08u + + +void em9301_hardware_error(uint8_t error){ + //TODO: Stack is freezing, wait how to continue + if (patchLoadingState == PATCH_LOAD_STATE_LOADING && error == 0x80) { + return; // everything ok + } + //TODO: something is wrong +} + +static void chipset_init(const void * config){ + UNUSED(config); + + currentRow = NUMBER_OF_ROWS - 1; + currentSector = NUMBER_OF_SECTORS - 1; + + patchLoadingState = PATCH_LOAD_STATE_NOTSTARTED; + + hci_set_hardware_error_callback(&em9301_hardware_error); +} + +static btstack_chipset_result_t chipset_next_command(uint8_t * hci_cmd_buffer){ + log_info("current row %d, current sector %d, blob size %u", currentRow, currentSector, EMPatchArray_size); + + switch (patchLoadingState) + { + case PATCH_LOAD_STATE_NOTSTARTED: + /* we have not yet loading the patch, start the + loading procedure now + try to enter in ISP mode by sending HCI command + HCI_EM_Write_Data with parameters (address=0x1FFE, data=0x0000).*/ + patchLoadingState = PATCH_LOAD_STATE_ENTERINGISPMODE; + + little_endian_store_16(hci_cmd_buffer, 0, HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_WRITE_DATA)); + hci_cmd_buffer[2] = 4; + little_endian_store_16(hci_cmd_buffer, 3, 0x1FFE); + little_endian_store_16(hci_cmd_buffer, 5, 0x0000); + log_debug("PATCH_LOAD_STATE_ENTERINGISPMODE"); + + return BTSTACK_CHIPSET_VALID_COMMAND; + + case PATCH_LOAD_STATE_ENTERINGISPMODE: + patchLoadingState = PATCH_LOAD_STATE_LOADING; + // send EM CPU Reset + little_endian_store_16(hci_cmd_buffer, 0, hci_reset.opcode); + hci_cmd_buffer[2] = 0; + log_debug("PATCH_LOAD_STATE_LOADING"); + + return BTSTACK_CHIPSET_VALID_COMMAND; + + case PATCH_LOAD_STATE_LOADING: + + if (currentSector < 0) { + /* We have now finish to load the patch it is now time to exiting ISP mode + try to exit in ISP mode by sending HCI command HCI_EM_Write_Data with parameters (address=0x1FFE, data=0x55AA).*/ + patchLoadingState = PATCH_LOAD_STATE_EXITINGISPMODE; + + little_endian_store_16(hci_cmd_buffer, 0, HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_WRITE_DATA)); + hci_cmd_buffer[2] = 4; + little_endian_store_16(hci_cmd_buffer, 3, 0x1FFE); + little_endian_store_16(hci_cmd_buffer, 5, 0x55AA); + + return BTSTACK_CHIPSET_VALID_COMMAND; + } + + little_endian_store_16(hci_cmd_buffer, 0, HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_WRITE_PROGRAM)); + hci_cmd_buffer[2] = ROW_SIZE + 2; + hci_cmd_buffer[3] = currentRow; + hci_cmd_buffer[4] = currentSector; + memcpy(&hci_cmd_buffer[5], &EMPatchArray[(ROW_SIZE * currentRow) + (NUMBER_OF_ROWS * ROW_SIZE * currentSector)], ROW_SIZE); + + if (currentRow == 0) { + currentRow = NUMBER_OF_ROWS - 1; + currentSector--; + } else { + currentRow--; + } + + return BTSTACK_CHIPSET_VALID_COMMAND; + + case PATCH_LOAD_STATE_EXITINGISPMODE: + patchLoadingState = PATCH_LOAD_STATE_DONE; + // send EM CPU Reset + little_endian_store_16(hci_cmd_buffer, 0, hci_reset.opcode); + hci_cmd_buffer[2] = 0; + + return BTSTACK_CHIPSET_VALID_COMMAND; + + case PATCH_LOAD_STATE_DONE: + return BTSTACK_CHIPSET_DONE; + } + return BTSTACK_CHIPSET_DONE; +} + +#endif + static const btstack_chipset_t btstack_chipset_em9301 = { "EM9301", #ifdef HAVE_EM9304_PATCH_CONTAINER chipset_init, chipset_next_command, +#else +#ifdef HAVE_EM9301_PATCH_CONTAINER + chipset_init, + chipset_next_command, #else NULL, NULL, +#endif #endif chipset_set_baudrate_command, chipset_set_bd_addr_command, From cad5f2b50284db05e12f41b48fe9f637126178f0 Mon Sep 17 00:00:00 2001 From: mr-sven Date: Fri, 14 Feb 2020 12:02:36 +0100 Subject: [PATCH 13/19] rename functions --- chipset/em9301/btstack_chipset_em9301.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/chipset/em9301/btstack_chipset_em9301.c b/chipset/em9301/btstack_chipset_em9301.c index 576a917a38..91ab02f3ac 100644 --- a/chipset/em9301/btstack_chipset_em9301.c +++ b/chipset/em9301/btstack_chipset_em9301.c @@ -216,14 +216,14 @@ static void chipset_set_baudrate_command(uint32_t baudrate, uint8_t *hci_cmd_buf } #ifdef HAVE_EM9304_PATCH_CONTAINER -static void chipset_init(const void * config){ +static void chipset_em9304_init(const void * config){ UNUSED(config); container_blob_offset = 0; em_cpu_reset_sent = 0; upload_state = UPLOAD_IDLE; } -static btstack_chipset_result_t chipset_next_command(uint8_t * hci_cmd_buffer){ +static btstack_chipset_result_t chipset_em9304_next_command(uint8_t * hci_cmd_buffer){ log_info("pos %u, container end %u, blob size %u", container_blob_offset, container_end, container_blob_size); if (container_blob_offset >= container_blob_size) { @@ -330,7 +330,7 @@ void em9301_hardware_error(uint8_t error){ //TODO: something is wrong } -static void chipset_init(const void * config){ +static void chipset_em9301_init(const void * config){ UNUSED(config); currentRow = NUMBER_OF_ROWS - 1; @@ -341,7 +341,7 @@ static void chipset_init(const void * config){ hci_set_hardware_error_callback(&em9301_hardware_error); } -static btstack_chipset_result_t chipset_next_command(uint8_t * hci_cmd_buffer){ +static btstack_chipset_result_t chipset_em9301_next_command(uint8_t * hci_cmd_buffer){ log_info("current row %d, current sector %d, blob size %u", currentRow, currentSector, EMPatchArray_size); switch (patchLoadingState) @@ -419,12 +419,12 @@ static btstack_chipset_result_t chipset_next_command(uint8_t * hci_cmd_buffer){ static const btstack_chipset_t btstack_chipset_em9301 = { "EM9301", #ifdef HAVE_EM9304_PATCH_CONTAINER - chipset_init, - chipset_next_command, + chipset_em9304_init, + chipset_em9304_next_command, #else #ifdef HAVE_EM9301_PATCH_CONTAINER - chipset_init, - chipset_next_command, + chipset_em9301_init, + chipset_em9301_next_command, #else NULL, NULL, From 7bef3d08998e1f5da8e7234dd8726f00ea18426e Mon Sep 17 00:00:00 2001 From: mr-sven Date: Fri, 14 Feb 2020 12:05:22 +0100 Subject: [PATCH 14/19] code format --- chipset/em9301/btstack_chipset_em9301.c | 384 ++++++++++++------------ 1 file changed, 192 insertions(+), 192 deletions(-) diff --git a/chipset/em9301/btstack_chipset_em9301.c b/chipset/em9301/btstack_chipset_em9301.c index 91ab02f3ac..624efd3819 100644 --- a/chipset/em9301/btstack_chipset_em9301.c +++ b/chipset/em9301/btstack_chipset_em9301.c @@ -79,14 +79,14 @@ * @param bd_addr */ const hci_cmd_t hci_vendor_em_set_public_address = { - HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_SET_PUBLIC_ADDRESS), "B" + HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_SET_PUBLIC_ADDRESS), "B" }; /** * @param baud_rate_index */ const hci_cmd_t hci_vendor_em_set_uart_baudrate = { - HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_SET_UART_BAUD_RATE), "1" + HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_SET_UART_BAUD_RATE), "1" }; /** @@ -96,20 +96,20 @@ const hci_cmd_t hci_vendor_em_set_uart_baudrate = { * @param packet_payload_type */ const hci_cmd_t hci_vendor_em_transmitter_test = { - HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_TRANSMITTER_TEST), "1111" + HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_TRANSMITTER_TEST), "1111" }; /** */ const hci_cmd_t hci_vendor_em_transmitter_test_end = { - HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_TRANSMITTER_TEST_END), "" + HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_TRANSMITTER_TEST_END), "" }; /** * @param patch_index */ const hci_cmd_t hci_vendor_em_patch_query = { - HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_PATCH_QUERY), "2" + HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_PATCH_QUERY), "2" }; /** @@ -117,40 +117,40 @@ const hci_cmd_t hci_vendor_em_patch_query = { * @param memory_attribute */ const hci_cmd_t hci_vendor_em_set_memory_mode = { - HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_SET_MEMORY_MODE), "1" + HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_SET_MEMORY_MODE), "1" }; /** * @param sleep_option_settings */ const hci_cmd_t hci_vendor_em_set_sleep_options = { - HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_SET_SLEEP_OPTIONS), "1" + HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_SET_SLEEP_OPTIONS), "1" }; /** * @param operating_state_settings */ const hci_cmd_t hci_vendor_em_set_operating_state = { - HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_SET_OPERATING_STATE), "1" + HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_SET_OPERATING_STATE), "1" }; // baudrate to index for hci_vendor_em_set_uart_baudrate static const uint32_t baudrates[] = { - 0, - 0, - 0, - 9600, - 14400, - 19200, - 28800, - 38400, - 57600, - 76800, - 115200, - 230400, - 460800, - 921600, - 1843200, + 0, + 0, + 0, + 9600, + 14400, + 19200, + 28800, + 38400, + 57600, + 76800, + 115200, + 230400, + 460800, + 921600, + 1843200, }; #ifdef HAVE_EM9304_PATCH_CONTAINER @@ -159,33 +159,33 @@ extern const uint8_t container_blob_data[]; extern const uint32_t container_blob_size; static uint32_t container_blob_offset = 0; -static uint32_t container_end; // current container +static uint32_t container_end; // current container static uint16_t patch_sequence_number; static int em_cpu_reset_sent; static enum { - UPLOAD_IDLE, - UPLOAD_ACTIVE, + UPLOAD_IDLE, + UPLOAD_ACTIVE, } upload_state; // CRC32 implementation using 4-bit lookup table created by pycrc v0.9.1, https://pycrc.org // ./pycrc.py --model crc-32 --algorithm table-driven --table-idx-width=4 --generate c static const uint32_t crc32_table[16] = { - 0x00000000, 0x1db71064, 0x3b6e20c8, 0x26d930ac, 0x76dc4190, 0x6b6b51f4, 0x4db26158, 0x5005713c, - 0xedb88320, 0xf00f9344, 0xd6d6a3e8, 0xcb61b38c, 0x9b64c2b0, 0x86d3d2d4, 0xa00ae278, 0xbdbdf21c + 0x00000000, 0x1db71064, 0x3b6e20c8, 0x26d930ac, 0x76dc4190, 0x6b6b51f4, 0x4db26158, 0x5005713c, + 0xedb88320, 0xf00f9344, 0xd6d6a3e8, 0xcb61b38c, 0x9b64c2b0, 0x86d3d2d4, 0xa00ae278, 0xbdbdf21c }; static uint32_t btstack_crc32(const uint8_t *buf, uint16_t size){ - uint16_t pos; - uint32_t crc = 0xffffffff; - for (pos=0 ; pos> 4); tbl_idx = crc ^ (buf[pos] >> 4); crc = crc32_table[tbl_idx & 0x0f] ^ (crc >> 4); } - return ~crc; + return ~crc; } #endif @@ -197,19 +197,19 @@ static void chipset_set_bd_addr_command(bd_addr_t addr, uint8_t *hci_cmd_buffer) } static void chipset_set_baudrate_command(uint32_t baudrate, uint8_t *hci_cmd_buffer){ - // lookup baudrates - int i; - int found = 0; - for (i=0 ; i < sizeof(baudrates)/sizeof(uint32_t) ; i++){ - if (baudrates[i] == baudrate){ - found = i; - break; - } - } - if (!found){ - log_error("Baudrate %u not found in table", baudrate); - return; - } + // lookup baudrates + int i; + int found = 0; + for (i=0 ; i < sizeof(baudrates)/sizeof(uint32_t) ; i++){ + if (baudrates[i] == baudrate){ + found = i; + break; + } + } + if (!found){ + log_error("Baudrate %u not found in table", baudrate); + return; + } little_endian_store_16(hci_cmd_buffer, 0, hci_vendor_em_set_uart_baudrate.opcode); hci_cmd_buffer[2] = 0x01; hci_cmd_buffer[3] = i; @@ -217,25 +217,25 @@ static void chipset_set_baudrate_command(uint32_t baudrate, uint8_t *hci_cmd_buf #ifdef HAVE_EM9304_PATCH_CONTAINER static void chipset_em9304_init(const void * config){ - UNUSED(config); - container_blob_offset = 0; - em_cpu_reset_sent = 0; - upload_state = UPLOAD_IDLE; + UNUSED(config); + container_blob_offset = 0; + em_cpu_reset_sent = 0; + upload_state = UPLOAD_IDLE; } static btstack_chipset_result_t chipset_em9304_next_command(uint8_t * hci_cmd_buffer){ - log_info("pos %u, container end %u, blob size %u", container_blob_offset, container_end, container_blob_size); + log_info("pos %u, container end %u, blob size %u", container_blob_offset, container_end, container_blob_size); if (container_blob_offset >= container_blob_size) { - if (0 == em_cpu_reset_sent){ - // send EM CPU Reset - little_endian_store_16(hci_cmd_buffer, 0, HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_CPU_RESET)); - hci_cmd_buffer[2] = 0; - em_cpu_reset_sent = 1; - return BTSTACK_CHIPSET_VALID_COMMAND; - } else { - return BTSTACK_CHIPSET_DONE; - } + if (0 == em_cpu_reset_sent){ + // send EM CPU Reset + little_endian_store_16(hci_cmd_buffer, 0, HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_CPU_RESET)); + hci_cmd_buffer[2] = 0; + em_cpu_reset_sent = 1; + return BTSTACK_CHIPSET_VALID_COMMAND; + } else { + return BTSTACK_CHIPSET_DONE; + } } uint32_t tag; @@ -243,69 +243,69 @@ static btstack_chipset_result_t chipset_em9304_next_command(uint8_t * hci_cmd_bu uint32_t crc; uint32_t container_size; - switch (upload_state){ - case UPLOAD_IDLE: - // check for 'em93' tag - tag = little_endian_read_32(container_blob_data, container_blob_offset); - if (0x656d3933 != tag) { - log_error("Expected 0x656d3933 ('em934') but got %08x", (int) tag); - return BTSTACK_CHIPSET_DONE; - } - // fetch info for current container - container_size = little_endian_read_32(container_blob_data, container_blob_offset + 4); - container_end = container_blob_offset + container_size; - // start uploading (<= 59 bytes) - patch_sequence_number = 1; - bytes_to_upload = btstack_min(59, container_end - container_blob_offset); - crc = btstack_crc32(&container_blob_data[container_blob_offset], bytes_to_upload); - log_info("Container type 0x%02x, id %u, build nr %u, user build nr %u, size %u", - (int) container_blob_data[container_blob_offset+9], - (int) container_blob_data[container_blob_offset+10], - (int) little_endian_read_16(container_blob_data, container_blob_offset+12), - (int) little_endian_read_16(container_blob_data, container_blob_offset+14), - (int) container_size); - // build command - little_endian_store_16(hci_cmd_buffer, 0, HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_WRITE_PATCH_START)); - hci_cmd_buffer[2] = 5 + bytes_to_upload; - hci_cmd_buffer[3] = 0; // upload to iRAM1 - little_endian_store_32(hci_cmd_buffer, 4, crc); - memcpy(&hci_cmd_buffer[8], &container_blob_data[container_blob_offset], bytes_to_upload); - container_blob_offset += bytes_to_upload; - if (container_blob_offset < container_end){ - upload_state = UPLOAD_ACTIVE; - } - return BTSTACK_CHIPSET_VALID_COMMAND; - case UPLOAD_ACTIVE: - // Upload next segement - bytes_to_upload = btstack_min(58, container_end - container_blob_offset); - crc = btstack_crc32(&container_blob_data[container_blob_offset], bytes_to_upload); - // build command - little_endian_store_16(hci_cmd_buffer, 0, HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_WRITE_PATCH_CONTINUE)); - hci_cmd_buffer[2] = 6 + bytes_to_upload; - little_endian_store_16(hci_cmd_buffer, 3, patch_sequence_number++); - little_endian_store_32(hci_cmd_buffer, 5, crc); - memcpy(&hci_cmd_buffer[9], &container_blob_data[container_blob_offset], bytes_to_upload); - container_blob_offset += bytes_to_upload; - if (container_blob_offset >= container_end){ - log_info("container done maybe another one"); - upload_state = UPLOAD_IDLE; - } - return BTSTACK_CHIPSET_VALID_COMMAND; - } - return BTSTACK_CHIPSET_DONE; + switch (upload_state){ + case UPLOAD_IDLE: + // check for 'em93' tag + tag = little_endian_read_32(container_blob_data, container_blob_offset); + if (0x656d3933 != tag) { + log_error("Expected 0x656d3933 ('em934') but got %08x", (int) tag); + return BTSTACK_CHIPSET_DONE; + } + // fetch info for current container + container_size = little_endian_read_32(container_blob_data, container_blob_offset + 4); + container_end = container_blob_offset + container_size; + // start uploading (<= 59 bytes) + patch_sequence_number = 1; + bytes_to_upload = btstack_min(59, container_end - container_blob_offset); + crc = btstack_crc32(&container_blob_data[container_blob_offset], bytes_to_upload); + log_info("Container type 0x%02x, id %u, build nr %u, user build nr %u, size %u", + (int) container_blob_data[container_blob_offset+9], + (int) container_blob_data[container_blob_offset+10], + (int) little_endian_read_16(container_blob_data, container_blob_offset+12), + (int) little_endian_read_16(container_blob_data, container_blob_offset+14), + (int) container_size); + // build command + little_endian_store_16(hci_cmd_buffer, 0, HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_WRITE_PATCH_START)); + hci_cmd_buffer[2] = 5 + bytes_to_upload; + hci_cmd_buffer[3] = 0; // upload to iRAM1 + little_endian_store_32(hci_cmd_buffer, 4, crc); + memcpy(&hci_cmd_buffer[8], &container_blob_data[container_blob_offset], bytes_to_upload); + container_blob_offset += bytes_to_upload; + if (container_blob_offset < container_end){ + upload_state = UPLOAD_ACTIVE; + } + return BTSTACK_CHIPSET_VALID_COMMAND; + case UPLOAD_ACTIVE: + // Upload next segement + bytes_to_upload = btstack_min(58, container_end - container_blob_offset); + crc = btstack_crc32(&container_blob_data[container_blob_offset], bytes_to_upload); + // build command + little_endian_store_16(hci_cmd_buffer, 0, HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_WRITE_PATCH_CONTINUE)); + hci_cmd_buffer[2] = 6 + bytes_to_upload; + little_endian_store_16(hci_cmd_buffer, 3, patch_sequence_number++); + little_endian_store_32(hci_cmd_buffer, 5, crc); + memcpy(&hci_cmd_buffer[9], &container_blob_data[container_blob_offset], bytes_to_upload); + container_blob_offset += bytes_to_upload; + if (container_blob_offset >= container_end){ + log_info("container done maybe another one"); + upload_state = UPLOAD_IDLE; + } + return BTSTACK_CHIPSET_VALID_COMMAND; + } + return BTSTACK_CHIPSET_DONE; } #endif #ifdef HAVE_EM9301_PATCH_CONTAINER /* Number of ROW in patch file [0-63] */ -#define NUMBER_OF_ROWS 64 +#define NUMBER_OF_ROWS 64 /* Number of Bytes Per ROW in patch file [0-63] */ -#define ROW_SIZE 48 +#define ROW_SIZE 48 /* Number of Sectors [0-17] in patch file [0-63] */ -#define NUMBER_OF_SECTORS 2 +#define NUMBER_OF_SECTORS 2 extern const uint8_t EMPatchArray[]; extern const uint32_t EMPatchArray_size; @@ -323,95 +323,95 @@ uint8_t patchLoadingState; void em9301_hardware_error(uint8_t error){ - //TODO: Stack is freezing, wait how to continue - if (patchLoadingState == PATCH_LOAD_STATE_LOADING && error == 0x80) { - return; // everything ok - } - //TODO: something is wrong + //TODO: Stack is freezing, wait how to continue + if (patchLoadingState == PATCH_LOAD_STATE_LOADING && error == 0x80) { + return; // everything ok + } + //TODO: something is wrong } static void chipset_em9301_init(const void * config){ - UNUSED(config); + UNUSED(config); - currentRow = NUMBER_OF_ROWS - 1; - currentSector = NUMBER_OF_SECTORS - 1; + currentRow = NUMBER_OF_ROWS - 1; + currentSector = NUMBER_OF_SECTORS - 1; - patchLoadingState = PATCH_LOAD_STATE_NOTSTARTED; + patchLoadingState = PATCH_LOAD_STATE_NOTSTARTED; - hci_set_hardware_error_callback(&em9301_hardware_error); + hci_set_hardware_error_callback(&em9301_hardware_error); } static btstack_chipset_result_t chipset_em9301_next_command(uint8_t * hci_cmd_buffer){ - log_info("current row %d, current sector %d, blob size %u", currentRow, currentSector, EMPatchArray_size); - - switch (patchLoadingState) - { - case PATCH_LOAD_STATE_NOTSTARTED: - /* we have not yet loading the patch, start the - loading procedure now - try to enter in ISP mode by sending HCI command - HCI_EM_Write_Data with parameters (address=0x1FFE, data=0x0000).*/ - patchLoadingState = PATCH_LOAD_STATE_ENTERINGISPMODE; - - little_endian_store_16(hci_cmd_buffer, 0, HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_WRITE_DATA)); - hci_cmd_buffer[2] = 4; - little_endian_store_16(hci_cmd_buffer, 3, 0x1FFE); - little_endian_store_16(hci_cmd_buffer, 5, 0x0000); - log_debug("PATCH_LOAD_STATE_ENTERINGISPMODE"); - - return BTSTACK_CHIPSET_VALID_COMMAND; - - case PATCH_LOAD_STATE_ENTERINGISPMODE: - patchLoadingState = PATCH_LOAD_STATE_LOADING; - // send EM CPU Reset - little_endian_store_16(hci_cmd_buffer, 0, hci_reset.opcode); - hci_cmd_buffer[2] = 0; - log_debug("PATCH_LOAD_STATE_LOADING"); - - return BTSTACK_CHIPSET_VALID_COMMAND; - - case PATCH_LOAD_STATE_LOADING: - - if (currentSector < 0) { - /* We have now finish to load the patch it is now time to exiting ISP mode - try to exit in ISP mode by sending HCI command HCI_EM_Write_Data with parameters (address=0x1FFE, data=0x55AA).*/ - patchLoadingState = PATCH_LOAD_STATE_EXITINGISPMODE; - - little_endian_store_16(hci_cmd_buffer, 0, HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_WRITE_DATA)); - hci_cmd_buffer[2] = 4; - little_endian_store_16(hci_cmd_buffer, 3, 0x1FFE); - little_endian_store_16(hci_cmd_buffer, 5, 0x55AA); - - return BTSTACK_CHIPSET_VALID_COMMAND; - } - - little_endian_store_16(hci_cmd_buffer, 0, HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_WRITE_PROGRAM)); - hci_cmd_buffer[2] = ROW_SIZE + 2; - hci_cmd_buffer[3] = currentRow; - hci_cmd_buffer[4] = currentSector; - memcpy(&hci_cmd_buffer[5], &EMPatchArray[(ROW_SIZE * currentRow) + (NUMBER_OF_ROWS * ROW_SIZE * currentSector)], ROW_SIZE); - - if (currentRow == 0) { - currentRow = NUMBER_OF_ROWS - 1; - currentSector--; - } else { - currentRow--; - } - - return BTSTACK_CHIPSET_VALID_COMMAND; - - case PATCH_LOAD_STATE_EXITINGISPMODE: - patchLoadingState = PATCH_LOAD_STATE_DONE; - // send EM CPU Reset - little_endian_store_16(hci_cmd_buffer, 0, hci_reset.opcode); - hci_cmd_buffer[2] = 0; - - return BTSTACK_CHIPSET_VALID_COMMAND; - - case PATCH_LOAD_STATE_DONE: - return BTSTACK_CHIPSET_DONE; - } - return BTSTACK_CHIPSET_DONE; + log_info("current row %d, current sector %d, blob size %u", currentRow, currentSector, EMPatchArray_size); + + switch (patchLoadingState) + { + case PATCH_LOAD_STATE_NOTSTARTED: + /* we have not yet loading the patch, start the + loading procedure now + try to enter in ISP mode by sending HCI command + HCI_EM_Write_Data with parameters (address=0x1FFE, data=0x0000).*/ + patchLoadingState = PATCH_LOAD_STATE_ENTERINGISPMODE; + + little_endian_store_16(hci_cmd_buffer, 0, HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_WRITE_DATA)); + hci_cmd_buffer[2] = 4; + little_endian_store_16(hci_cmd_buffer, 3, 0x1FFE); + little_endian_store_16(hci_cmd_buffer, 5, 0x0000); + log_debug("PATCH_LOAD_STATE_ENTERINGISPMODE"); + + return BTSTACK_CHIPSET_VALID_COMMAND; + + case PATCH_LOAD_STATE_ENTERINGISPMODE: + patchLoadingState = PATCH_LOAD_STATE_LOADING; + // send EM CPU Reset + little_endian_store_16(hci_cmd_buffer, 0, hci_reset.opcode); + hci_cmd_buffer[2] = 0; + log_debug("PATCH_LOAD_STATE_LOADING"); + + return BTSTACK_CHIPSET_VALID_COMMAND; + + case PATCH_LOAD_STATE_LOADING: + + if (currentSector < 0) { + /* We have now finish to load the patch it is now time to exiting ISP mode + try to exit in ISP mode by sending HCI command HCI_EM_Write_Data with parameters (address=0x1FFE, data=0x55AA).*/ + patchLoadingState = PATCH_LOAD_STATE_EXITINGISPMODE; + + little_endian_store_16(hci_cmd_buffer, 0, HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_WRITE_DATA)); + hci_cmd_buffer[2] = 4; + little_endian_store_16(hci_cmd_buffer, 3, 0x1FFE); + little_endian_store_16(hci_cmd_buffer, 5, 0x55AA); + + return BTSTACK_CHIPSET_VALID_COMMAND; + } + + little_endian_store_16(hci_cmd_buffer, 0, HCI_CMD_OPCODE(OGF_VENDOR, HCI_OPCODE_EM_WRITE_PROGRAM)); + hci_cmd_buffer[2] = ROW_SIZE + 2; + hci_cmd_buffer[3] = currentRow; + hci_cmd_buffer[4] = currentSector; + memcpy(&hci_cmd_buffer[5], &EMPatchArray[(ROW_SIZE * currentRow) + (NUMBER_OF_ROWS * ROW_SIZE * currentSector)], ROW_SIZE); + + if (currentRow == 0) { + currentRow = NUMBER_OF_ROWS - 1; + currentSector--; + } else { + currentRow--; + } + + return BTSTACK_CHIPSET_VALID_COMMAND; + + case PATCH_LOAD_STATE_EXITINGISPMODE: + patchLoadingState = PATCH_LOAD_STATE_DONE; + // send EM CPU Reset + little_endian_store_16(hci_cmd_buffer, 0, hci_reset.opcode); + hci_cmd_buffer[2] = 0; + + return BTSTACK_CHIPSET_VALID_COMMAND; + + case PATCH_LOAD_STATE_DONE: + return BTSTACK_CHIPSET_DONE; + } + return BTSTACK_CHIPSET_DONE; } #endif From 6653b3e435487c7fae77624c203b27ea65e2db06 Mon Sep 17 00:00:00 2001 From: mr-sven Date: Tue, 18 Feb 2020 11:02:11 +0100 Subject: [PATCH 15/19] variables to static --- chipset/em9301/btstack_chipset_em9301.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/chipset/em9301/btstack_chipset_em9301.c b/chipset/em9301/btstack_chipset_em9301.c index 624efd3819..58c421d6bb 100644 --- a/chipset/em9301/btstack_chipset_em9301.c +++ b/chipset/em9301/btstack_chipset_em9301.c @@ -310,10 +310,10 @@ static btstack_chipset_result_t chipset_em9304_next_command(uint8_t * hci_cmd_bu extern const uint8_t EMPatchArray[]; extern const uint32_t EMPatchArray_size; -signed char currentRow; -signed char currentSector; +static signed char currentRow; +static signed char currentSector; -uint8_t patchLoadingState; +static uint8_t patchLoadingState; #define PATCH_LOAD_STATE_NOTSTARTED 0x00u #define PATCH_LOAD_STATE_ENTERINGISPMODE 0x01u @@ -321,7 +321,6 @@ uint8_t patchLoadingState; #define PATCH_LOAD_STATE_EXITINGISPMODE 0x04u #define PATCH_LOAD_STATE_DONE 0x08u - void em9301_hardware_error(uint8_t error){ //TODO: Stack is freezing, wait how to continue if (patchLoadingState == PATCH_LOAD_STATE_LOADING && error == 0x80) { @@ -357,7 +356,6 @@ static btstack_chipset_result_t chipset_em9301_next_command(uint8_t * hci_cmd_bu hci_cmd_buffer[2] = 4; little_endian_store_16(hci_cmd_buffer, 3, 0x1FFE); little_endian_store_16(hci_cmd_buffer, 5, 0x0000); - log_debug("PATCH_LOAD_STATE_ENTERINGISPMODE"); return BTSTACK_CHIPSET_VALID_COMMAND; @@ -366,7 +364,6 @@ static btstack_chipset_result_t chipset_em9301_next_command(uint8_t * hci_cmd_bu // send EM CPU Reset little_endian_store_16(hci_cmd_buffer, 0, hci_reset.opcode); hci_cmd_buffer[2] = 0; - log_debug("PATCH_LOAD_STATE_LOADING"); return BTSTACK_CHIPSET_VALID_COMMAND; From c2ccf846ff6a44306912eec10354311d83457b84 Mon Sep 17 00:00:00 2001 From: mr-sven Date: Tue, 18 Feb 2020 11:14:23 +0100 Subject: [PATCH 16/19] patch state to enum --- chipset/em9301/btstack_chipset_em9301.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/chipset/em9301/btstack_chipset_em9301.c b/chipset/em9301/btstack_chipset_em9301.c index 58c421d6bb..95ebb5a47b 100644 --- a/chipset/em9301/btstack_chipset_em9301.c +++ b/chipset/em9301/btstack_chipset_em9301.c @@ -313,13 +313,16 @@ extern const uint32_t EMPatchArray_size; static signed char currentRow; static signed char currentSector; -static uint8_t patchLoadingState; +typedef enum { + PATCH_LOAD_STATE_NOTSTARTED = 0, + PATCH_LOAD_STATE_ENTERINGISPMODE, + PATCH_LOAD_STATE_LOADING, + PATCH_LOAD_STATE_EXITINGISPMODE, + PATCH_LOAD_STATE_FINISHED, + PATCH_LOAD_STATE_DONE +} EM9301_PATCH_STATE; -#define PATCH_LOAD_STATE_NOTSTARTED 0x00u -#define PATCH_LOAD_STATE_ENTERINGISPMODE 0x01u -#define PATCH_LOAD_STATE_LOADING 0x02u -#define PATCH_LOAD_STATE_EXITINGISPMODE 0x04u -#define PATCH_LOAD_STATE_DONE 0x08u +static EM9301_PATCH_STATE patchLoadingState; void em9301_hardware_error(uint8_t error){ //TODO: Stack is freezing, wait how to continue @@ -405,6 +408,10 @@ static btstack_chipset_result_t chipset_em9301_next_command(uint8_t * hci_cmd_bu return BTSTACK_CHIPSET_VALID_COMMAND; + case PATCH_LOAD_STATE_FINISHED: + patchLoadingState = PATCH_LOAD_STATE_FINISHED; + return BTSTACK_CHIPSET_VALID_COMMAND; + case PATCH_LOAD_STATE_DONE: return BTSTACK_CHIPSET_DONE; } From 86b0f9250c776e4af7a49e0344238c929e49ae66 Mon Sep 17 00:00:00 2001 From: mr-sven Date: Tue, 18 Feb 2020 11:15:45 +0100 Subject: [PATCH 17/19] added em9301 reset hardware fail on patchload --- src/hci.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/src/hci.c b/src/hci.c index b61d0edbfd..cb1dad1e2d 100644 --- a/src/hci.c +++ b/src/hci.c @@ -1563,6 +1563,16 @@ static void hci_initializing_event_handler(uint8_t * packet, uint16_t size){ } } +#ifdef HAVE_EM9301_PATCH_CONTAINER + // EM9301 is in ISP mode + if ((hci_stack->substate == HCI_INIT_W4_CUSTOM_INIT) + && (hci_event_packet_get_type(packet) == HCI_EVENT_HARDWARE_ERROR) + && (packet[2] == 0x80)){ + // continue processing due normal behavior + command_completed = 1; + } +#endif + #if !defined(HAVE_PLATFORM_IPHONE_OS) && !defined (HAVE_HOST_CONTROLLER_API) // Vendor == CSR From 1c13aaf2afad307ee5eed1d180ae13baeead3f83 Mon Sep 17 00:00:00 2001 From: mr-sven Date: Tue, 18 Feb 2020 11:21:25 +0100 Subject: [PATCH 18/19] future command --- chipset/em9301/btstack_chipset_em9301.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/chipset/em9301/btstack_chipset_em9301.c b/chipset/em9301/btstack_chipset_em9301.c index 95ebb5a47b..7a38a13d23 100644 --- a/chipset/em9301/btstack_chipset_em9301.c +++ b/chipset/em9301/btstack_chipset_em9301.c @@ -408,10 +408,12 @@ static btstack_chipset_result_t chipset_em9301_next_command(uint8_t * hci_cmd_bu return BTSTACK_CHIPSET_VALID_COMMAND; + // TODO: for future use to reset stack + /* case PATCH_LOAD_STATE_FINISHED: - patchLoadingState = PATCH_LOAD_STATE_FINISHED; + patchLoadingState = PATCH_LOAD_STATE_DONE; return BTSTACK_CHIPSET_VALID_COMMAND; - +*/ case PATCH_LOAD_STATE_DONE: return BTSTACK_CHIPSET_DONE; } From 75d2bbbb6936a9122a1667adae415408b65b2126 Mon Sep 17 00:00:00 2001 From: mr-sven Date: Tue, 18 Feb 2020 17:13:59 +0100 Subject: [PATCH 19/19] returning warm reset --- chipset/em9301/btstack_chipset_em9301.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/chipset/em9301/btstack_chipset_em9301.c b/chipset/em9301/btstack_chipset_em9301.c index 7a38a13d23..f3ff5cfe2f 100644 --- a/chipset/em9301/btstack_chipset_em9301.c +++ b/chipset/em9301/btstack_chipset_em9301.c @@ -318,7 +318,6 @@ typedef enum { PATCH_LOAD_STATE_ENTERINGISPMODE, PATCH_LOAD_STATE_LOADING, PATCH_LOAD_STATE_EXITINGISPMODE, - PATCH_LOAD_STATE_FINISHED, PATCH_LOAD_STATE_DONE } EM9301_PATCH_STATE; @@ -405,15 +404,8 @@ static btstack_chipset_result_t chipset_em9301_next_command(uint8_t * hci_cmd_bu // send EM CPU Reset little_endian_store_16(hci_cmd_buffer, 0, hci_reset.opcode); hci_cmd_buffer[2] = 0; + return BTSTACK_CHIPSET_WARMSTART_REQUIRED; - return BTSTACK_CHIPSET_VALID_COMMAND; - - // TODO: for future use to reset stack - /* - case PATCH_LOAD_STATE_FINISHED: - patchLoadingState = PATCH_LOAD_STATE_DONE; - return BTSTACK_CHIPSET_VALID_COMMAND; -*/ case PATCH_LOAD_STATE_DONE: return BTSTACK_CHIPSET_DONE; }