From a31444a83eaa8d2a756e0a6c69e781aaa915ce31 Mon Sep 17 00:00:00 2001 From: drom Date: Sat, 10 Feb 2024 13:23:15 +0000 Subject: [PATCH] =?UTF-8?q?Deploying=20to=20gh-pages=20from=20@=20circt/pe?= =?UTF-8?q?rf@7155120531cd12e76b8df51e09b3d90b512caa0e=20=F0=9F=9A=80?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- ...Medium1Large1Mega1.top.v.lo-2024-02-10.log | 99 +++++++++++++++++++ ...Large1Mega1.top.v.lo-vlint-2024-02-10.json | 49 +++++++++ test1-2024-02-10.log | 26 +++++ test1-vlint-2024-02-10.json | 4 + test2-2024-02-10.log | 20 ++++ test2-vlint-2024-02-10.json | 4 + test3-2024-02-10.log | 29 ++++++ test3-vlint-2024-02-10.json | 4 + 8 files changed, 235 insertions(+) create mode 100644 chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-2024-02-10.log create mode 100644 chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-vlint-2024-02-10.json create mode 100644 test1-2024-02-10.log create mode 100644 test1-vlint-2024-02-10.json create mode 100644 test2-2024-02-10.log create mode 100644 test2-vlint-2024-02-10.json create mode 100644 test3-2024-02-10.log create mode 100644 test3-vlint-2024-02-10.json diff --git a/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-2024-02-10.log b/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-2024-02-10.log new file mode 100644 index 00000000..c543eb46 --- /dev/null +++ b/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-2024-02-10.log @@ -0,0 +1,99 @@ +===-------------------------------------------------------------------------=== + ... Execution time report ... +===-------------------------------------------------------------------------=== + Total Execution Time: 16.3251 seconds + + ----User Time---- ----Wall Time---- ----Name---- + 2.7368 ( 7.6%) 2.7368 ( 16.8%) FIR Parser + 0.0000 ( 0.0%) 0.0000 ( 0.0%) Parse annotations + 0.0000 ( 0.0%) 0.0000 ( 0.0%) Parse OMIR + 2.3485 ( 6.5%) 2.3485 ( 14.4%) Parse modules + 0.3434 ( 1.0%) 0.3434 ( 2.1%) Verify circuit + 15.0633 ( 41.9%) 6.7851 ( 41.6%) 'firrtl.circuit' Pipeline + 0.3374 ( 0.9%) 0.3374 ( 2.1%) LowerFIRRTLAnnotations + 0.0971 ( 0.3%) 0.0971 ( 0.6%) LowerIntrinsics + 0.0970 ( 0.3%) 0.0970 ( 0.6%) (A) circt::firrtl::InstanceGraph + 2.9060 ( 8.1%) 0.7453 ( 4.6%) 'firrtl.module' Pipeline + 1.2191 ( 3.4%) 0.3141 ( 1.9%) DropName + 1.6840 ( 4.7%) 0.4304 ( 2.6%) CSE + 0.0008 ( 0.0%) 0.0003 ( 0.0%) (A) DominanceInfo + 0.0000 ( 0.0%) 0.0000 ( 0.0%) InjectDUTHierarchy + 0.1135 ( 0.3%) 0.0291 ( 0.2%) 'firrtl.module' Pipeline + 0.1111 ( 0.3%) 0.0286 ( 0.2%) LowerCHIRRTLPass + 0.0989 ( 0.3%) 0.0989 ( 0.6%) InferWidths + 0.2033 ( 0.6%) 0.2033 ( 1.2%) MemToRegOfVec + 0.3696 ( 1.0%) 0.3696 ( 2.3%) InferResets + 0.0505 ( 0.1%) 0.0505 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.0673 ( 0.2%) 0.0673 ( 0.4%) WireDFT + 0.5170 ( 1.4%) 0.1327 ( 0.8%) 'firrtl.module' Pipeline + 0.5152 ( 1.4%) 0.1322 ( 0.8%) FlattenMemory + 0.2600 ( 0.7%) 0.2600 ( 1.6%) LowerFIRRTLTypes + 0.6820 ( 1.9%) 0.1759 ( 1.1%) 'firrtl.module' Pipeline + 0.6623 ( 1.8%) 0.1710 ( 1.0%) ExpandWhens + 0.0166 ( 0.0%) 0.0057 ( 0.0%) SFCCompat + 0.3245 ( 0.9%) 0.3245 ( 2.0%) Inliner + 0.5538 ( 1.5%) 0.1430 ( 0.9%) 'firrtl.module' Pipeline + 0.5517 ( 1.5%) 0.1425 ( 0.9%) RandomizeRegisterInit + 0.9474 ( 2.6%) 0.9474 ( 5.8%) CheckCombLoops + 0.0515 ( 0.1%) 0.0515 ( 0.3%) (A) circt::firrtl::InstanceGraph + 3.1799 ( 8.9%) 0.8142 ( 5.0%) 'firrtl.module' Pipeline + 2.8974 ( 8.1%) 0.7531 ( 4.6%) Canonicalizer + 0.2794 ( 0.8%) 0.0751 ( 0.5%) InferReadWrite + 0.1470 ( 0.4%) 0.1470 ( 0.9%) PrefixModules + 0.0592 ( 0.2%) 0.0592 ( 0.4%) (A) circt::firrtl::InstanceGraph + 0.0002 ( 0.0%) 0.0002 ( 0.0%) (A) circt::firrtl::NLATable + 0.6298 ( 1.8%) 0.6298 ( 3.9%) IMConstProp + 0.0567 ( 0.2%) 0.0567 ( 0.3%) AddSeqMemPorts + 0.0565 ( 0.2%) 0.0565 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.1613 ( 0.4%) 0.1613 ( 1.0%) CreateSiFiveMetadata + 0.0398 ( 0.1%) 0.0398 ( 0.2%) ExtractInstances + 0.0001 ( 0.0%) 0.0001 ( 0.0%) (A) circt::firrtl::NLATable + 0.0000 ( 0.0%) 0.0000 ( 0.0%) GrandCentral + 0.0003 ( 0.0%) 0.0003 ( 0.0%) BlackBoxReader + 0.3259 ( 0.9%) 0.0834 ( 0.5%) 'firrtl.module' Pipeline + 0.3240 ( 0.9%) 0.0829 ( 0.5%) DropName + 0.3141 ( 0.9%) 0.3141 ( 1.9%) SymbolDCE + 0.2317 ( 0.6%) 0.2317 ( 1.4%) InnerSymbolDCE + 1.9730 ( 5.5%) 1.1143 ( 6.8%) 'firrtl.circuit' Pipeline + 0.8586 ( 2.4%) 0.2194 ( 1.3%) 'firrtl.module' Pipeline + 0.8530 ( 2.4%) 0.2153 ( 1.3%) Canonicalizer + 0.5177 ( 1.4%) 0.5177 ( 3.2%) IMDeadCodeElim + 0.0578 ( 0.2%) 0.0578 ( 0.4%) (A) circt::firrtl::InstanceGraph + 0.0000 ( 0.0%) 0.0000 ( 0.0%) EmitOMIR + 0.0244 ( 0.1%) 0.0244 ( 0.1%) ResolveTraces + 0.0001 ( 0.0%) 0.0001 ( 0.0%) (A) circt::firrtl::NLATable + 0.2478 ( 0.7%) 0.2478 ( 1.5%) LowerXMR + 0.0466 ( 0.1%) 0.0466 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.6809 ( 1.9%) 0.6809 ( 4.2%) LowerFIRRTLToHW + 0.0560 ( 0.2%) 0.0560 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.0002 ( 0.0%) 0.0002 ( 0.0%) (A) circt::firrtl::NLATable + 5.0579 ( 14.1%) 1.3740 ( 8.4%) 'hw.module' Pipeline + 0.9266 ( 2.6%) 0.2513 ( 1.5%) CSE + 0.0009 ( 0.0%) 0.0003 ( 0.0%) (A) DominanceInfo + 2.9519 ( 8.2%) 0.9580 ( 5.9%) Canonicalizer + 0.6131 ( 1.7%) 0.1767 ( 1.1%) CSE + 0.0007 ( 0.0%) 0.0002 ( 0.0%) (A) DominanceInfo + 0.5609 ( 1.6%) 0.1963 ( 1.2%) LowerSeqFIRRTLToSV + 0.1760 ( 0.5%) 0.1760 ( 1.1%) HWMemSimImpl + 3.3611 ( 9.4%) 0.9415 ( 5.8%) 'hw.module' Pipeline + 0.9307 ( 2.6%) 0.2667 ( 1.6%) CSE + 0.0011 ( 0.0%) 0.0004 ( 0.0%) (A) DominanceInfo + 1.6472 ( 4.6%) 0.5975 ( 3.7%) Canonicalizer + 0.5309 ( 1.5%) 0.1733 ( 1.1%) CSE + 0.0009 ( 0.0%) 0.0003 ( 0.0%) (A) DominanceInfo + 0.2452 ( 0.7%) 0.0744 ( 0.5%) HWCleanup + 0.5634 ( 1.6%) 0.1420 ( 0.9%) 'hw.module' Pipeline + 0.0571 ( 0.2%) 0.0159 ( 0.1%) HWLegalizeModules + 0.5016 ( 1.4%) 0.1269 ( 0.8%) PrettifyVerilog + 0.2151 ( 0.6%) 0.2151 ( 1.3%) StripDebugInfoWithPred + 1.6409 ( 4.6%) 1.6409 ( 10.1%) ExportVerilog + 2.0061 ( 5.6%) 0.5259 ( 3.2%) 'builtin.module' Pipeline + 1.4803 ( 4.1%) 0.3743 ( 2.3%) 'hw.module' Pipeline + 1.4781 ( 4.1%) 0.3737 ( 2.3%) PrepareForEmission + -0.5199 ( -1.4%) -0.5199 ( -3.2%) Rest + 35.9245 (100.0%) 16.3251 (100.0%) Total + +{ + totalTime: 16.379, + maxMemory: 880537600 +} diff --git a/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-vlint-2024-02-10.json b/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-vlint-2024-02-10.json new file mode 100644 index 00000000..72619739 --- /dev/null +++ b/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-vlint-2024-02-10.json @@ -0,0 +1,49 @@ +{ + "errors": { + "'table_1_ext'": 1, + "This may be because there's no search path specified with -I.": 1, + "'table_0_ext'": 1, + "'hi_us_0_ext'": 1, + "'table_ext'": 1, + "'hi_us_ext'": 1, + "'meta_0_0_ext'": 1, + "'data_ext'": 1, + "'ebtb_ext'": 1, + "'btb_0_ext'": 1, + "'meta_0_ext'": 1, + "'rob_debug_inst_mem_1_ext'": 1, + "'meta_2_ext'": 1, + "'tag_array_5_ext'": 1, + "'rob_debug_inst_mem_0_ext'": 1, + "'ghist_0_0_ext'": 1, + "'meta_1_ext'": 1, + "'rob_debug_inst_mem_ext'": 1, + "'ghist_0_ext'": 1, + "'meta_ext'": 1, + "'dataArrayB0Way_0_ext'": 1, + "'tag_array_4_ext'": 1, + "'array_0_0_ext'": 1, + "'tag_array_3_ext'": 1, + "'data_arrays_0_2_ext'": 1, + "'tag_array_2_ext'": 1, + "'data_arrays_0_1_ext'": 1, + "'data_arrays_0_0_ext'": 1, + "'tag_array_0_ext'": 1, + "'tag_array_ext'": 1, + "'data_arrays_0_ext'": 1, + "'plusarg_reader'": 142, + "'l2_tlb_ram_1_ext'": 1, + "'l2_tlb_ram_0_ext'": 1, + "'tag_array_1_ext'": 1, + "'l2_tlb_ram_ext'": 1, + "'cc_banks_0_ext'": 1, + "'cc_dir_ext'": 1, + "'ClockDividerN'": 1, + "'EICG_wrapper'": 1, + "'GenericDigitalOutIOCell'": 9, + "'GenericDigitalInIOCell'": 13 + }, + "warnings": { + "WIDTH": 113 + } +} \ No newline at end of file diff --git a/test1-2024-02-10.log b/test1-2024-02-10.log new file mode 100644 index 00000000..64a4da61 --- /dev/null +++ b/test1-2024-02-10.log @@ -0,0 +1,26 @@ +regress/test1.fir:7247:15: error: use of unknown declaration 'validif' + tmp499 <= validif(head(inp_a.inp_c.inp_j.inp_gc.inp_gkb.inp_flb.inp_fic, 1), SInt<13>("h-b9c")) + ^ +regress/test1.fir:28262:15: error: use of unknown declaration 'validif' + tmp550 <= validif(tail(asUInt(SInt<22>("h-3089")), 21), tmp548) + ^ +regress/test1.fir:51636:15: error: use of unknown declaration 'validif' + tmp541 <= validif(tail(inp_jc.inp_hd.inp_ae.inp_ei.inp_ahb.inp_mlc, 26), inp_a.inp_b.inp_d.inp_f.inp_g.inp_bb.inp_eb.inp_kd.inp_nk.inp_an.inp_gp.inp_mic) + ^ +===-------------------------------------------------------------------------=== + ... Execution time report ... +===-------------------------------------------------------------------------=== + Total Execution Time: 0.0689 seconds + + ----Wall Time---- ----Name---- + 0.0681 ( 98.9%) FIR Parser + 0.0000 ( 0.0%) Parse annotations + 0.0000 ( 0.0%) Parse OMIR + 0.0637 ( 92.5%) Parse modules + 0.0008 ( 1.1%) Rest + 0.0689 (100.0%) Total + +{ + totalTime: 0.077, + maxMemory: 0 +} diff --git a/test1-vlint-2024-02-10.json b/test1-vlint-2024-02-10.json new file mode 100644 index 00000000..86f39b69 --- /dev/null +++ b/test1-vlint-2024-02-10.json @@ -0,0 +1,4 @@ +{ + "errors": {}, + "warnings": {} +} \ No newline at end of file diff --git a/test2-2024-02-10.log b/test2-2024-02-10.log new file mode 100644 index 00000000..416de6c6 --- /dev/null +++ b/test2-2024-02-10.log @@ -0,0 +1,20 @@ +regress/test2.fir:247424:17: error: use of unknown declaration 'validif' + tmp20070 <= validif(head(UInt<3>(6), 1), SInt<24>("b-11111101000010001010101")) + ^ +===-------------------------------------------------------------------------=== + ... Execution time report ... +===-------------------------------------------------------------------------=== + Total Execution Time: 0.9097 seconds + + ----Wall Time---- ----Name---- + 0.9078 ( 99.8%) FIR Parser + 0.0000 ( 0.0%) Parse annotations + 0.0000 ( 0.0%) Parse OMIR + 0.8636 ( 94.9%) Parse modules + 0.0019 ( 0.2%) Rest + 0.9097 (100.0%) Total + +{ + totalTime: 0.925, + maxMemory: 163278848 +} diff --git a/test2-vlint-2024-02-10.json b/test2-vlint-2024-02-10.json new file mode 100644 index 00000000..86f39b69 --- /dev/null +++ b/test2-vlint-2024-02-10.json @@ -0,0 +1,4 @@ +{ + "errors": {}, + "warnings": {} +} \ No newline at end of file diff --git a/test3-2024-02-10.log b/test3-2024-02-10.log new file mode 100644 index 00000000..adefc973 --- /dev/null +++ b/test3-2024-02-10.log @@ -0,0 +1,29 @@ +regress/test3.fir:20273:15: error: use of unknown declaration 'validif' + tmp236 <= validif(head(inp_h.inp_i.inp_k.inp_p.inp_gb.inp_pb.inp_nd[0][3][3].inp_ng.inp_li, 1), UInt<6>(33)) + ^ +regress/test3.fir:170544:16: error: use of unknown declaration 'validif' + tmp2807 <= validif(tail(UInt<29>("b111111100001000110000101110"), 28), SInt<4>("o-1")) + ^ +regress/test3.fir:324162:15: error: use of unknown declaration 'validif' + tmp523 <= validif(head(inp_e.inp_ob.inp_ge.inp_ki[1][2][3].inp_hk.inp_il, 1), inp_a.inp_c.inp_hc.inp_fd.inp_je.inp_dl) + ^ +regress/test3.fir:847311:15: error: use of unknown declaration 'validif' + tmp237 <= validif(tail(asUInt(inp_e.inp_i.inp_j.inp_bb[4][4].inp_oh), 18), tmp227) + ^ +===-------------------------------------------------------------------------=== + ... Execution time report ... +===-------------------------------------------------------------------------=== + Total Execution Time: 0.4463 seconds + + ----Wall Time---- ----Name---- + 0.4434 ( 99.4%) FIR Parser + 0.0000 ( 0.0%) Parse annotations + 0.0000 ( 0.0%) Parse OMIR + 0.4061 ( 91.0%) Parse modules + 0.0028 ( 0.6%) Rest + 0.4463 (100.0%) Total + +{ + totalTime: 0.457, + maxMemory: 125001728 +} diff --git a/test3-vlint-2024-02-10.json b/test3-vlint-2024-02-10.json new file mode 100644 index 00000000..86f39b69 --- /dev/null +++ b/test3-vlint-2024-02-10.json @@ -0,0 +1,4 @@ +{ + "errors": {}, + "warnings": {} +} \ No newline at end of file