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[AMD][Intel] Non-binary DDR5 #511

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cyring opened this issue Oct 10, 2024 Discussed in #510 · 1 comment
Open

[AMD][Intel] Non-binary DDR5 #511

cyring opened this issue Oct 10, 2024 Discussed in #510 · 1 comment

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@cyring
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cyring commented Oct 10, 2024

DDR5 Query

[AMD] Zen 4 or 5

# Compile the tool
cc zencli.c -o zencli
  • Run it as root on the first four channels to dump the memory controller configuration
# channel 0
./zencli smu 0x50100
# channel 1
./zencli smu 0x150100
# channel 2
./zencli smu 0x250100
# channel 3
./zencli smu 0x350100

2024-10-09-185931_871x739_scrot

  • In the DdrType bits-field I expect to find some new DDR5 type values or something in the Reserved part

[Intel]

  • I still have found no IMC register about non-binary DDR5
@cyring
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cyring commented Oct 10, 2024

Micron

Notes: 1. For non-binary densities, a quarter of the row address space is invalid. When the MSB address bit is HIGH, the MSB-1 address must be LOW.

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