An alternative FPGA implementation

[KevinOConnor]

This is not an issue; it is notification that I have written an alternative FPGA implementation for the Haasoscope hardware: https://github.com/KevinOConnor/hsoft

I purchased the Haasoscope as a tool for experimenting with FPGA development. I have published some code that may be of interest to others. In particular it has the following useful features:

1. The code is capable of capturing data in a format that can be imported into sigrok/pulseview. For example, here is a session I took with the Haasoscope attached to a "CAN bus" (using 3 channels on the scope, each at 125Mhz) :
   
   The sigrok/pulseview tool can be useful for analyzing communication protocols. As an example, I can use the tool to get a good estimate of delays between signal lines (eg, 65ns in the picture below):
   
2. The code supports both the on-board full-speed USB adapter as well as the optional hi-speed USB "hat". When the hi-speed adapter is available, it is not necessary to connect the full-speed USB at all (everything can be done over the hi-speed connection). The code can automatically switch between USB interfaces. The FPGA can fully saturate the hi-speed interface (the ft232h chip nominally supports 40MBytes per second).
3. Captures can exceed the internal FPGA memory if the host reads the data sufficiently fast. (That is, one can effectively "stream" measurement data if one reduces the measurement rate and/or the number of channels.) Only active channels consume space in the internal FPGA memory and USB bandwidth. For example, here's a 500ms capture (a "CAN bus" capture, 2 channels, at 10.4Mhz):
   
   One can still "zoom in" to that data in Pulseview to observe useful protocol details:
   
4. The code uses basic Verilog with an emphasis on modular code. I've tried to limit the use of Quartus specific features. (It is still necessary to compile the FPGA code with Quartus, but there are only a couple of Quartus specific files in the repository.) As of today, 75% of the FPGA logic elements are unused - ideally leaving space for those looking to experiment with the FPGA.

There are some notable limitations:

• There is no GUI for this code. The code does not work with the existing Haasoscope software. The command protocol is not compatible. The current capture software is a Linux command-line tool. It has only been tested on Linux.
• There are likely lots of bugs in the code.

Additional details on features and limitations are available at: https://github.com/KevinOConnor/hsoft/blob/master/docs/Features.md

If interested in running this code (or interested in understanding how it works) see the documentation at: https://github.com/KevinOConnor/hsoft

-Kevin

[drandyhaas]

That looks very sophisticated! I hope others will find it useful. I wish I had your firmware skills when i was first programming the haasoscope. It was a learning experience.