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This is quite tricky to achieve as it needs to control the PMIC and voltage regulators behind SPI and I2C respectively.
Since doing this entirely in AML is crazy, all OSes that wish to support CPPC would also need to have I2C and SPI bus drivers, and most importantly bind to the ACPI device + also handle accesses from AML via the standard I2cSerialBus, SpiSerialBus resources.
Not great.
Fortunately, Rockchip have started open sourcing their ATF implementation, giving us the opportunity to abstract all of the power stuff there behind an SMC call. Much better :)
RK3588 has a Cortex-M0 MCU too, but that is likely already running some other power management code.
The text was updated successfully, but these errors were encountered:
This is quite tricky to achieve as it needs to control the PMIC and voltage regulators behind SPI and I2C respectively.
Since doing this entirely in AML is crazy, all OSes that wish to support CPPC would also need to have I2C and SPI bus drivers, and most importantly bind to the ACPI device + also handle accesses from AML via the standard I2cSerialBus, SpiSerialBus resources.
Not great.
Fortunately, Rockchip have started open sourcing their ATF implementation, giving us the opportunity to abstract all of the power stuff there behind an SMC call. Much better :)
RK3588 has a Cortex-M0 MCU too, but that is likely already running some other power management code.
The text was updated successfully, but these errors were encountered: