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comp16.qsf
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comp16.qsf
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# -------------------------------------------------------------------------- #
#
# Copyright (C) 2017 Intel Corporation. All rights reserved.
# Your use of Intel Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Intel Program License
# Subscription Agreement, the Intel Quartus Prime License Agreement,
# the Intel MegaCore Function License Agreement, or other
# applicable license agreement, including, without limitation,
# that your use is for the sole purpose of programming logic
# devices manufactured by Intel and sold by Intel or its
# authorized distributors. Please refer to the applicable
# agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus Prime
# Version 17.0.0 Build 595 04/25/2017 SJ Lite Edition
# Date created = 16:22:33 August 26, 2017
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
# comp16_assignment_defaults.qdf
# If this file doesn't exist, see file:
# assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus Prime software
# and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #
set_global_assignment -name FAMILY "Cyclone V"
set_global_assignment -name DEVICE 5CSEMA4U23C6
set_global_assignment -name TOP_LEVEL_ENTITY comp16
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 17.0.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "16:22:33 AUGUST 26, 2017"
set_global_assignment -name LAST_QUARTUS_VERSION "17.1.0 Lite Edition"
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 256
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_location_assignment PIN_W15 -to LED[0]
set_location_assignment PIN_AA24 -to LED[1]
set_location_assignment PIN_V16 -to LED[2]
set_location_assignment PIN_V15 -to LED[3]
set_location_assignment PIN_AF26 -to LED[4]
set_location_assignment PIN_AE26 -to LED[5]
set_location_assignment PIN_Y16 -to LED[6]
set_location_assignment PIN_AA23 -to LED[7]
set_location_assignment PIN_V11 -to CLOCK_50
set_location_assignment PIN_L10 -to SW[0]
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS ON
set_global_assignment -name SMART_RECOMPILE ON
set_location_assignment PIN_AG19 -to SERIAL_RX
set_location_assignment PIN_AF20 -to SERIAL_TX
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SERIAL_RX
set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to SERIAL_TX
set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to SERIAL_RX
set_location_assignment PIN_L9 -to SW[1]
set_location_assignment PIN_H6 -to SW[2]
set_location_assignment PIN_H5 -to SW[3]
set_instance_assignment -name IO_STANDARD "2.5 V" -to SW[3]
set_instance_assignment -name IO_STANDARD "2.5 V" -to SW[2]
set_global_assignment -name NUM_PARALLEL_PROCESSORS 4
set_location_assignment PIN_AH17 -to KEY[0]
set_location_assignment PIN_AE19 -to VGA_COL_B[1]
set_location_assignment PIN_AG23 -to VGA_COL_B[0]
set_location_assignment PIN_AF22 -to VGA_COL_G[2]
set_location_assignment PIN_AC22 -to VGA_COL_G[1]
set_location_assignment PIN_AE24 -to VGA_COL_G[0]
set_location_assignment PIN_AA18 -to VGA_COL_R[2]
set_location_assignment PIN_AD23 -to VGA_COL_R[1]
set_location_assignment PIN_AG21 -to VGA_COL_R[0]
set_location_assignment PIN_AH27 -to VGA_SYNC_H
set_location_assignment PIN_Y15 -to VGA_SYNC_V
set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to VGA_COL_B[1]
set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to VGA_COL_B[0]
set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to VGA_COL_B
set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to VGA_COL_G[2]
set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to VGA_COL_G[1]
set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to VGA_COL_G[0]
set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to VGA_COL_G
set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to VGA_COL_R[2]
set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to VGA_SYNC_V
set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to VGA_COL_R[1]
set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to VGA_COL_R[0]
set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to VGA_COL_R
set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to KEY[0]
set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to VGA_SYNC_H
set_location_assignment PIN_E11 -to CLOCK_50_2
set_location_assignment PIN_AA19 -to PS2_DATA
set_location_assignment PIN_AC23 -to PS2_CLK
set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to PS2_CLK
set_instance_assignment -name IO_STANDARD "3.0-V LVCMOS" -to PS2_DATA
set_global_assignment -name SOURCE_FILE pll_vga.cmp
set_global_assignment -name VERILOG_FILE IO/vga/vga_controller.v
set_global_assignment -name VERILOG_FILE IO/vga/vgaText.v
set_global_assignment -name SOURCE_FILE pll.cmp
set_global_assignment -name VERILOG_FILE debugOut.v
set_global_assignment -name BDF_FILE comp16.bdf
set_global_assignment -name VERILOG_FILE central.v
set_global_assignment -name VERILOG_FILE step.v
set_global_assignment -name VERILOG_FILE manual.v
set_global_assignment -name SDC_FILE comp16.sdc
set_global_assignment -name VERILOG_FILE ram.v
set_global_assignment -name VERILOG_FILE alu.v
set_global_assignment -name MIF_FILE RAMData.mif
set_global_assignment -name VERILOG_FILE pc.v
set_global_assignment -name VERILOG_FILE mux.v
set_global_assignment -name VERILOG_FILE DualRam.v
set_global_assignment -name VERILOG_FILE mainIO.v
set_global_assignment -name VERILOG_FILE IO/uart/receiver.v
set_global_assignment -name VERILOG_FILE IO/uart/transmitter.v
set_global_assignment -name VERILOG_FILE IO/uart/uart.v
set_global_assignment -name VERILOG_FILE IO/uart/baud_rate_gen.v
set_global_assignment -name VERILOG_FILE IO/uart/uartRecFIFO.v
set_global_assignment -name QIP_FILE pll.qip
set_global_assignment -name SIP_FILE pll.sip
set_global_assignment -name VERILOG_FILE IO/io_port.v
set_global_assignment -name BDF_FILE IO/vga/vga.bdf
set_global_assignment -name BDF_FILE IO/uart/uart_io.bdf
set_global_assignment -name BSF_FILE IO/uart/uart_io.bsf
set_global_assignment -name BDF_FILE IO/vga/vga_io.bdf
set_global_assignment -name QIP_FILE pll_vga.qip
set_global_assignment -name SIP_FILE pll_vga.sip
set_global_assignment -name VERILOG_FILE IO/vga/txt_col.v
set_global_assignment -name BDF_FILE IO/ps2/ps2_io.bdf
set_global_assignment -name VHDL_FILE IO/ps2/debounce.vhd
set_global_assignment -name VHDL_FILE IO/ps2/ps2_keyboard.vhd
set_global_assignment -name VERILOG_FILE IO/ps2/ps2_fifo.v
set_global_assignment -name VERILOG_FILE IO/ps2/ps2_to_ascii.v
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to PS2_DATA
set_global_assignment -name VERILOG_FILE IO/prgm_rom/prgm_rom.v
set_global_assignment -name BDF_FILE IO/prgm_rom/prgm_rom_io.bdf
set_global_assignment -name VERILOG_FILE IO/time/timer.v
set_global_assignment -name BSF_FILE IO/time/time_io.bsf
set_global_assignment -name BDF_FILE IO/time/time_io.bdf
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top