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dcd_int_enable does not check the return value from esp_intr_alloc #2970

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inbarab opened this issue Feb 2, 2025 · 3 comments
Open
1 task done

dcd_int_enable does not check the return value from esp_intr_alloc #2970

inbarab opened this issue Feb 2, 2025 · 3 comments
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@inbarab
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inbarab commented Feb 2, 2025

Operating System

Others

Board

esp32s3 wroom1

Firmware

espressif tinyusb port, tusb_msc_storage.c

What happened ?

In tinyusb\src\portable\espressif\esp32sx\dcd_esp32sx.c, in function dcd_int_enable, the return code is not checked or returned
If the esp-idf fails to allocate an interrupt, the usb device will not work but the usb task has no way of knowing
See below the log output
In the example the system resets, on my full system it does not reset but does not work
Note the lines
E (1168) intr_alloc: No free interrupt inputs for USB interrupt (flags 0xE)
I (1168) TinyUSB: TinyUSB Driver installed
I (1178) example_main: USB MSC initialization DONE

How to reproduce ?

Start with esp-idf example tusb_msc
Change the console to the usb-cdc console
you will need to replace esp_console_dev_uart_config_t with
esp_console_dev_usb_cdc_config_t hw_config = ESP_CONSOLE_DEV_CDC_CONFIG_DEFAULT();
and esp_console_new_repl_uart with esp_console_new_repl_usb_cdc:
ESP_ERROR_CHECK(esp_console_new_repl_usb_cdc(&hw_config, &repl_config, &repl));

Debug Log as txt file (LOG/CFG_TUSB_DEBUG=2)

ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0xc (RTC_SW_CPU_RST),boot:0x29 (SPI_FAST_FLASH_BOOT)
Saved PC:0x403757ec
SPIWP:0xee
mode:DIO, clock div:1
load:0x3fce38e0,len:0x1870
load:0x403c9700,len:0x4
load:0x403c9704,len:0xcac
load:0x403cc700,len:0x2f64
entry 0x403c9918
I (125) cpu_start: Pro cpu start user code
I (125) cpu_start: cpu freq: 160000000 Hz
I (126) cpu_start: Application information:
I (128) cpu_start: Project name: tusb_msc
I (134) cpu_start: App version: 1
I (138) cpu_start: Compile time: Feb 2 2025 15:38:30
I (144) cpu_start: ELF file SHA256: 3b237ef86...
I (149) cpu_start: ESP-IDF: v5.2.3-5-g97bee2dfcf-dirty
I (156) cpu_start: Min chip rev: v0.0
I (161) cpu_start: Max chip rev: v0.99
I (166) cpu_start: Chip rev: v0.2
I (170) heap_init: Initializing. RAM available for dynamic allocation:
I (178) heap_init: At 3FC964E8 len 00053228 (332 KiB): RAM
I (184) heap_init: At 3FCE9710 len 00005724 (21 KiB): RAM
I (190) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
I (196) heap_init: At 600FE010 len 00001FD8 (7 KiB): RTCRAM
I (213) spi_flash: detected chip: gd
I (213) spi_flash: flash io: dio
W (213) spi_flash: Detected size(16384k) larger than the size in the binary image header(4096k). Using the size in the binary image header.
I (224) sleep: Configure to isolate all GPIO pins in sleep state
I (230) sleep: Enable automatic switching of GPIO sleep configuration
I (238) main_task: Started on CPU0
I (248) main_task: Calling app_main()
I (248) example_main: Initializing storage...

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esp32s3> I (778) example_main: Initializing SDCard
I (778) gpio: GPIO[48]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0
I (788) gpio: GPIO[47]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0
I (798) gpio: GPIO[21]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0
I (808) gpio: GPIO[14]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0
I (808) gpio: GPIO[9]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0
I (818) gpio: GPIO[8]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0
I (858) gpio: GPIO[8]| InputEn: 0| OutputEn: 0| OpenDrain: 0| Pullup: 1| Pulldown: 0| Intr:0
Name: SD16G
Type: SDHC/SDXC
Speed: 20.00 MHz (limit: 20.00 MHz)
Size: 14768MB
CSD: ver=2, sector_size=512, capacity=30244864 read_bl_len=9
SSR: bus_width=4
I (868) example_main: Mount storage...
I (878) example_main: Storage mounted to application: Yes
I (878) example_main:
ls command output:

System Volume Information
.
.
.
.
I (998) example_main: USB MSC initialization
I (1008) tusb_desc:
lqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqqk
x USB Device Descriptor Summary x
tqqqqqqqqqqqqqqqqqqqwqqqqqqqqqqqqqu
xbDeviceClass x 239 x
tqqqqqqqqqqqqqqqqqqqnqqqqqqqqqqqqqu
xbDeviceSubClass x 2 x
tqqqqqqqqqqqqqqqqqqqnqqqqqqqqqqqqqu
xbDeviceProtocol x 1 x
tqqqqqqqqqqqqqqqqqqqnqqqqqqqqqqqqqu
xbMaxPacketSize0 x 64 x
tqqqqqqqqqqqqqqqqqqqnqqqqqqqqqqqqqu
xidVendor x 0x303a x
tqqqqqqqqqqqqqqqqqqqnqqqqqqqqqqqqqu
xidProduct x 0x4002 x
tqqqqqqqqqqqqqqqqqqqnqqqqqqqqqqqqqu
xbcdDevice x 0x100 x
tqqqqqqqqqqqqqqqqqqqnqqqqqqqqqqqqqu
xiManufacturer x 0x1 x
tqqqqqqqqqqqqqqqqqqqnqqqqqqqqqqqqqu
xiProduct x 0x2 x
tqqqqqqqqqqqqqqqqqqqnqqqqqqqqqqqqqu
xiSerialNumber x 0x3 x
tqqqqqqqqqqqqqqqqqqqnqqqqqqqqqqqqqu
xbNumConfigurations x 0x1 x
mqqqqqqqqqqqqqqqqqqqvqqqqqqqqqqqqqj
E (1168) intr_alloc: No free interrupt inputs for USB interrupt (flags 0xE)
I (1168) TinyUSB: TinyUSB Driver installed
I (1178) example_main: USB MSC initialization DONE
I (1178) main_task: Returned from app_main()

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I have checked existing issues, dicussion and documentation

  • I confirm I have checked existing issues, dicussion and documentation.
@inbarab
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inbarab commented Feb 2, 2025

Note you must move the console init code to the beginning of the exampe so the console is opened before the msd

@roma-jam
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roma-jam commented Feb 4, 2025

Hi @inbarab ,

that is right, thank you so much for such detailed description.
That is why tusb_msc example is not able to build with such configuration (#error Unsupported console type): because the USB CDC for the serial device output shares the same peripheral as (in this particular case) TinyUSB MSC device.

Anyway, the issue could be reproduced with an adding just one line: call the interrupt enable twice:

void dcd_int_enable(uint8_t rhport) {
  dwc2_dcd_int_enable(rhport);
  dwc2_dcd_int_enable(rhport);
}

after that, we will get the error: No free interrupt inputs for USB interrupt (flags 0xE) but everything will stll be working. Which reflects the problem that the error is just ignored.

I'll try to check the other controllers and prepare a PR with a fix for ESP chips ASAP.

@inbarab
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inbarab commented Feb 4, 2025 via email

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