From 09929a30eeb903965433a95e98ee135896845223 Mon Sep 17 00:00:00 2001 From: "vladimir.vinnitski" Date: Fri, 9 Apr 2021 10:54:32 +0300 Subject: [PATCH] Intel(R) MPI Benchmarks 2021.2 release --- Makefile | 9 +- Makefile_win | 2 +- README.md | 10 +- ReadMe_IMB.txt | 11 +- WINDOWS/IMB-EXT_VS_2013/IMB-EXT.rc | 10 +- WINDOWS/IMB-EXT_VS_2015/IMB-EXT.rc | 10 +- WINDOWS/IMB-EXT_VS_2017/IMB-EXT.rc | 10 +- WINDOWS/IMB-IO_VS_2013/IMB-IO.rc | 10 +- WINDOWS/IMB-IO_VS_2015/IMB-IO.rc | 10 +- WINDOWS/IMB-IO_VS_2017/IMB-IO.rc | 10 +- WINDOWS/IMB-MPI1_VS_2013/IMB-MPI1.rc | 10 +- WINDOWS/IMB-MPI1_VS_2015/IMB-MPI1.rc | 10 +- WINDOWS/IMB-MPI1_VS_2017/IMB-MPI1.rc | 10 +- WINDOWS/IMB-MT_VS_2013/IMB-MT.rc | 10 +- WINDOWS/IMB-MT_VS_2015/IMB-MT.rc | 10 +- WINDOWS/IMB-MT_VS_2017/IMB-MT.rc | 10 +- WINDOWS/IMB-NBC_VS_2013/IMB-NBC.rc | 10 +- WINDOWS/IMB-NBC_VS_2015/IMB-NBC.rc | 10 +- WINDOWS/IMB-NBC_VS_2017/IMB-NBC.rc | 10 +- WINDOWS/IMB-P2P_VS_2013/IMB-P2P.rc | 10 +- WINDOWS/IMB-P2P_VS_2015/IMB-P2P.rc | 10 +- WINDOWS/IMB-P2P_VS_2017/IMB-P2P.rc | 10 +- WINDOWS/IMB-RMA_VS_2013/IMB-RMA.rc | 10 +- WINDOWS/IMB-RMA_VS_2015/IMB-RMA.rc | 10 +- WINDOWS/IMB-RMA_VS_2017/IMB-RMA.rc | 10 +- src_c/IMB_2018.c | 2 +- src_c/IMB_allgather.c | 2 +- src_c/IMB_allgatherv.c | 2 +- src_c/IMB_allreduce.c | 2 +- src_c/IMB_alltoall.c | 2 +- src_c/IMB_alltoallv.c | 2 +- src_c/IMB_appl_errors.h | 2 +- src_c/IMB_bandwidth.c | 8 +- src_c/IMB_barrier.c | 2 +- src_c/IMB_bcast.c | 2 +- src_c/IMB_benchlist.c | 2 +- src_c/IMB_benchmark.h | 2 +- src_c/IMB_bnames_ext.h | 2 +- src_c/IMB_bnames_io.h | 2 +- src_c/IMB_bnames_mpi1.h | 2 +- src_c/IMB_bnames_nbc.h | 2 +- src_c/IMB_bnames_rma.h | 2 +- src_c/IMB_cache.h | 2 +- src_c/IMB_chk_diff.c | 2 +- src_c/IMB_comm_info.h | 17 +- src_c/IMB_comments.h | 2 +- src_c/IMB_cpu_exploit.c | 2 +- src_c/IMB_declare.c | 2 +- src_c/IMB_declare.h | 2 +- src_c/IMB_err_check.h | 2 +- src_c/IMB_err_handler.c | 2 +- src_c/IMB_exchange.c | 2 +- src_c/IMB_g_info.c | 22 ++- src_c/IMB_gather.c | 2 +- src_c/IMB_gatherv.c | 2 +- src_c/IMB_init.c | 4 +- src_c/IMB_init_file.c | 2 +- src_c/IMB_init_transfer.c | 2 +- src_c/IMB_l0.c | 225 ++++++++++++++++++++++++ src_c/IMB_l0.h | 75 ++++++++ src_c/IMB_mem_info.h | 2 +- src_c/IMB_mem_manager.c | 74 +++++++- src_c/IMB_ones_accu.c | 2 +- src_c/IMB_ones_bidir.c | 2 +- src_c/IMB_ones_unidir.c | 2 +- src_c/IMB_open_close.c | 2 +- src_c/IMB_output.c | 2 +- src_c/IMB_parse_name_ext.c | 2 +- src_c/IMB_parse_name_io.c | 2 +- src_c/IMB_parse_name_mpi1.c | 2 +- src_c/IMB_parse_name_nbc.c | 2 +- src_c/IMB_parse_name_rma.c | 2 +- src_c/IMB_pingping.c | 2 +- src_c/IMB_pingpong.c | 2 +- src_c/IMB_prototypes.h | 2 +- src_c/IMB_read.c | 2 +- src_c/IMB_reduce.c | 2 +- src_c/IMB_reduce_local.c | 2 +- src_c/IMB_reduce_scatter.c | 2 +- src_c/IMB_reduce_scatter_block.c | 2 +- src_c/IMB_rma_atomic.c | 2 +- src_c/IMB_rma_get.c | 2 +- src_c/IMB_rma_put.c | 2 +- src_c/IMB_scatter.c | 2 +- src_c/IMB_scatterv.c | 2 +- src_c/IMB_sendrecv.c | 2 +- src_c/IMB_settings.h | 2 +- src_c/IMB_settings_io.h | 2 +- src_c/IMB_strgs.c | 2 +- src_c/IMB_user_set_info.c | 2 +- src_c/IMB_utils.c | 2 +- src_c/IMB_warm_up.c | 2 +- src_c/IMB_window.c | 2 +- src_c/IMB_write.c | 2 +- src_c/Makefile | 2 +- src_c/Makefile_win | 2 +- src_c/P2P/Makefile | 2 +- src_c/P2P/imb_p2p.c | 4 +- src_c/P2P/imb_p2p.h | 2 +- src_c/P2P/imb_p2p_birandom.c | 2 +- src_c/P2P/imb_p2p_corandom.c | 2 +- src_c/P2P/imb_p2p_pingping.c | 2 +- src_c/P2P/imb_p2p_pingpong.c | 2 +- src_c/P2P/imb_p2p_sendrecv_replace.c | 2 +- src_c/P2P/imb_p2p_stencil2d.c | 2 +- src_c/P2P/imb_p2p_stencil3d.c | 2 +- src_c/P2P/imb_p2p_unirandom.c | 2 +- src_cpp/EXT/EXT_benchmark.cpp | 2 +- src_cpp/EXT/EXT_suite.cpp | 13 +- src_cpp/EXT/Makefile.EXT.mk | 2 +- src_cpp/EXT/Makefile_win.EXT.mk | 2 +- src_cpp/HALO/Makefile.HALO.mk | 2 +- src_cpp/HALO/halo_benchmark.cpp | 2 +- src_cpp/HALO/halo_benchmark.h | 2 +- src_cpp/HALO/halo_suite.cpp | 2 +- src_cpp/IO/IO_benchmark.cpp | 2 +- src_cpp/IO/IO_suite.cpp | 13 +- src_cpp/IO/Makefile.IO.mk | 2 +- src_cpp/IO/Makefile_win.IO.mk | 2 +- src_cpp/MPI1/MPI1_benchmark.cpp | 2 +- src_cpp/MPI1/MPI1_suite.cpp | 47 ++++- src_cpp/MPI1/Makefile.MPI1.mk | 27 ++- src_cpp/MPI1/Makefile_win.MPI1.mk | 2 +- src_cpp/MT/MT_benchmark.cpp | 2 +- src_cpp/MT/MT_benchmark.h | 2 +- src_cpp/MT/MT_suite.cpp | 4 +- src_cpp/MT/MT_types.h | 2 +- src_cpp/MT/Makefile.MT.mk | 2 +- src_cpp/MT/Makefile_win.MT.mk | 2 +- src_cpp/Makefile | 6 +- src_cpp/Makefile_win | 2 +- src_cpp/NBC/Makefile.NBC.mk | 2 +- src_cpp/NBC/Makefile_win.NBC.mk | 2 +- src_cpp/NBC/NBC_benchmark.cpp | 2 +- src_cpp/NBC/NBC_suite.cpp | 13 +- src_cpp/RMA/Makefile.RMA.mk | 2 +- src_cpp/RMA/Makefile_win.RMA.mk | 2 +- src_cpp/RMA/RMA_benchmark.cpp | 2 +- src_cpp/RMA/RMA_suite.cpp | 13 +- src_cpp/any.h | 2 +- src_cpp/args_parser.cpp | 2 +- src_cpp/args_parser.h | 2 +- src_cpp/args_parser_utests.cpp | 2 +- src_cpp/benchmark.h | 2 +- src_cpp/benchmark_suite.h | 2 +- src_cpp/benchmark_suite_base.h | 2 +- src_cpp/benchmark_suites_collection.cpp | 2 +- src_cpp/benchmark_suites_collection.h | 2 +- src_cpp/example/Makefile.example.mk | 2 +- src_cpp/example/example_benchmark1.cpp | 2 +- src_cpp/example/example_benchmark2.cpp | 2 +- src_cpp/example/example_benchmark3.cpp | 2 +- src_cpp/example/example_benchmark4.cpp | 2 +- src_cpp/example/example_benchmark5.cpp | 2 +- src_cpp/helpers/Makefile.helpers.mk | 2 +- src_cpp/helpers/Makefile_win.helpers.mk | 2 +- src_cpp/helpers/helper_IMB_functions.h | 2 +- src_cpp/helpers/original_benchmark.h | 5 +- src_cpp/imb.cpp | 7 +- src_cpp/scope.cpp | 2 +- src_cpp/scope.h | 2 +- src_cpp/smart_ptr.h | 2 +- src_cpp/utils.h | 2 +- 163 files changed, 780 insertions(+), 279 deletions(-) create mode 100644 src_c/IMB_l0.c create mode 100644 src_c/IMB_l0.h diff --git a/Makefile b/Makefile index 287c5ccd..017bfd93 100644 --- a/Makefile +++ b/Makefile @@ -1,6 +1,6 @@ #***************************************************************************** # * * -# * Copyright 2016-2020 Intel Corporation. * +# * Copyright 2016-2021 Intel Corporation. * # * * # ***************************************************************************** # @@ -77,6 +77,10 @@ IMB-P2P: make -C src_c/P2P -f Makefile TARGET=P2P @cp src_c/P2P/IMB-P2P . +IMB-MPI1-GPU: + make -C src_cpp -f Makefile TARGET=MPI1 GPU_ENABLE=1 + @cp src_cpp/IMB-MPI1 ./IMB-MPI1-GPU + clean: make -C src_cpp -f Makefile TARGET=MPI1 clean @@ -86,4 +90,5 @@ clean: make -C src_cpp -f Makefile TARGET=IO clean make -C src_cpp -f Makefile TARGET=MT clean make -C src_c/P2P -f Makefile TARGET=P2P clean - rm -f IMB-MPI1 IMB-NBC IMB-RMA IMB-EXT IMB-IO IMB-MT IMB-P2P + make -C src_cpp -f Makefile TARGET=MPI1 clean GPU_ENABLE=1 + rm -f IMB-MPI1 IMB-NBC IMB-RMA IMB-EXT IMB-IO IMB-MT IMB-P2P IMB-MPI1-GPU diff --git a/Makefile_win b/Makefile_win index 53dfe146..3e0ddd5f 100644 --- a/Makefile_win +++ b/Makefile_win @@ -1,6 +1,6 @@ #***************************************************************************** # * * -# * Copyright 2016-2020 Intel Corporation. * +# * Copyright 2016-2021 Intel Corporation. * # * * # ***************************************************************************** # diff --git a/README.md b/README.md index aa76c60b..1157fafa 100644 --- a/README.md +++ b/README.md @@ -1,6 +1,6 @@ # Intel(R) MPI Benchmarks [![Common Public License Version 1.0](https://img.shields.io/badge/license-Common%20Public%20License%20Version%201.0-green.svg)](license/license.txt) -![v2021.1](https://img.shields.io/badge/v.2021.1-Update-orange.svg) +![v2021.2](https://img.shields.io/badge/v.2021.2-Update-orange.svg) -------------------------------------------------- -------- @@ -63,6 +63,14 @@ files and folders appear on your system: ---------- What's New ---------- +New in Intel(R) MPI Benchmarks 2021.2 +---------------------------------------- +- New IMB-MPI1-GPU benchmarks (Technical Preview). + The benchmarks implement the GPU version of the IMB-MPI1 +- Added -msg_pause option. +- Changed default window_size 64 -> 256 +- Bug fixes. + New in Intel(R) MPI Benchmarks 2021.1 ---------------------------------------- - Added -window_size option for IMB-MPI1 diff --git a/ReadMe_IMB.txt b/ReadMe_IMB.txt index 31d8a932..2f58f460 100644 --- a/ReadMe_IMB.txt +++ b/ReadMe_IMB.txt @@ -1,5 +1,5 @@ -------------------------------------- -Intel(R) MPI Benchmarks 2021.1 +Intel(R) MPI Benchmarks 2021.2 README -------------------------------------- @@ -63,6 +63,15 @@ files and folders appear on your system: What's New ---------- +New in Intel(R) MPI Benchmarks 2021.2 +---------------------------------------- +- New IMB-MPI1-GPU benchmarks (Technical Preview). + The benchmarks implement the GPU version of the IMB-MPI1 +- Added -msg_pause option. +- Changed default window_size 64 -> 256 +- Bug fixes. + + New in Intel(R) MPI Benchmarks 2021.1 ---------------------------------------- - Added -window_size option for IMB-MPI1 diff --git a/WINDOWS/IMB-EXT_VS_2013/IMB-EXT.rc b/WINDOWS/IMB-EXT_VS_2013/IMB-EXT.rc index d540c480..5970e6cf 100644 --- a/WINDOWS/IMB-EXT_VS_2013/IMB-EXT.rc +++ b/WINDOWS/IMB-EXT_VS_2013/IMB-EXT.rc @@ -53,8 +53,8 @@ END // VS_VERSION_INFO VERSIONINFO - FILEVERSION 2021,1,0,0 - PRODUCTVERSION 2021,1,0,0 + FILEVERSION 2021,2,0,0 + PRODUCTVERSION 2021,2,0,0 FILEFLAGSMASK 0x17L #ifdef _DEBUG FILEFLAGS 0x1L @@ -71,12 +71,12 @@ BEGIN BEGIN VALUE "CompanyName", "Intel Corporation" VALUE "FileDescription", "Intel(R) MPI Benchmarks" - VALUE "FileVersion", "2021.1" + VALUE "FileVersion", "2021.2" VALUE "InternalName", "IMB-EXT" - VALUE "LegalCopyright", "Copyright 2003-2020 Intel Corporation." + VALUE "LegalCopyright", "Copyright 2003-2021 Intel Corporation." VALUE "OriginalFilename", "IMB-EXT.exe" VALUE "ProductName", "Intel(R) MPI Benchmarks" - VALUE "ProductVersion", "2021.1" + VALUE "ProductVersion", "2021.2" END END BLOCK "VarFileInfo" diff --git a/WINDOWS/IMB-EXT_VS_2015/IMB-EXT.rc b/WINDOWS/IMB-EXT_VS_2015/IMB-EXT.rc index d540c480..5970e6cf 100644 --- a/WINDOWS/IMB-EXT_VS_2015/IMB-EXT.rc +++ b/WINDOWS/IMB-EXT_VS_2015/IMB-EXT.rc @@ -53,8 +53,8 @@ END // VS_VERSION_INFO VERSIONINFO - FILEVERSION 2021,1,0,0 - PRODUCTVERSION 2021,1,0,0 + FILEVERSION 2021,2,0,0 + PRODUCTVERSION 2021,2,0,0 FILEFLAGSMASK 0x17L #ifdef _DEBUG FILEFLAGS 0x1L @@ -71,12 +71,12 @@ BEGIN BEGIN VALUE "CompanyName", "Intel Corporation" VALUE "FileDescription", "Intel(R) MPI Benchmarks" - VALUE "FileVersion", "2021.1" + VALUE "FileVersion", "2021.2" VALUE "InternalName", "IMB-EXT" - VALUE "LegalCopyright", "Copyright 2003-2020 Intel Corporation." + VALUE "LegalCopyright", "Copyright 2003-2021 Intel Corporation." VALUE "OriginalFilename", "IMB-EXT.exe" VALUE "ProductName", "Intel(R) MPI Benchmarks" - VALUE "ProductVersion", "2021.1" + VALUE "ProductVersion", "2021.2" END END BLOCK "VarFileInfo" diff --git a/WINDOWS/IMB-EXT_VS_2017/IMB-EXT.rc b/WINDOWS/IMB-EXT_VS_2017/IMB-EXT.rc index d540c480..5970e6cf 100644 --- a/WINDOWS/IMB-EXT_VS_2017/IMB-EXT.rc +++ b/WINDOWS/IMB-EXT_VS_2017/IMB-EXT.rc @@ -53,8 +53,8 @@ END // VS_VERSION_INFO VERSIONINFO - FILEVERSION 2021,1,0,0 - PRODUCTVERSION 2021,1,0,0 + FILEVERSION 2021,2,0,0 + PRODUCTVERSION 2021,2,0,0 FILEFLAGSMASK 0x17L #ifdef _DEBUG FILEFLAGS 0x1L @@ -71,12 +71,12 @@ BEGIN BEGIN VALUE "CompanyName", "Intel Corporation" VALUE "FileDescription", "Intel(R) MPI Benchmarks" - VALUE "FileVersion", "2021.1" + VALUE "FileVersion", "2021.2" VALUE "InternalName", "IMB-EXT" - VALUE "LegalCopyright", "Copyright 2003-2020 Intel Corporation." + VALUE "LegalCopyright", "Copyright 2003-2021 Intel Corporation." VALUE "OriginalFilename", "IMB-EXT.exe" VALUE "ProductName", "Intel(R) MPI Benchmarks" - VALUE "ProductVersion", "2021.1" + VALUE "ProductVersion", "2021.2" END END BLOCK "VarFileInfo" diff --git a/WINDOWS/IMB-IO_VS_2013/IMB-IO.rc b/WINDOWS/IMB-IO_VS_2013/IMB-IO.rc index 9bf31652..8c6fd283 100644 --- a/WINDOWS/IMB-IO_VS_2013/IMB-IO.rc +++ b/WINDOWS/IMB-IO_VS_2013/IMB-IO.rc @@ -53,8 +53,8 @@ END // VS_VERSION_INFO VERSIONINFO - FILEVERSION 2021,1,0,0 - PRODUCTVERSION 2021,1,0,0 + FILEVERSION 2021,2,0,0 + PRODUCTVERSION 2021,2,0,0 FILEFLAGSMASK 0x17L #ifdef _DEBUG FILEFLAGS 0x1L @@ -71,12 +71,12 @@ BEGIN BEGIN VALUE "CompanyName", "Intel Corporation" VALUE "FileDescription", "Intel(R) MPI Benchmarks" - VALUE "FileVersion", "2021.1" + VALUE "FileVersion", "2021.2" VALUE "InternalName", "IMB-IO" - VALUE "LegalCopyright", "Copyright 2003-2020 Intel Corporation." + VALUE "LegalCopyright", "Copyright 2003-2021 Intel Corporation." VALUE "OriginalFilename", "IMB-IO.exe" VALUE "ProductName", "Intel(R) MPI Benchmarks" - VALUE "ProductVersion", "2021.1" + VALUE "ProductVersion", "2021.2" END END BLOCK "VarFileInfo" diff --git a/WINDOWS/IMB-IO_VS_2015/IMB-IO.rc b/WINDOWS/IMB-IO_VS_2015/IMB-IO.rc index 9bf31652..8c6fd283 100644 --- a/WINDOWS/IMB-IO_VS_2015/IMB-IO.rc +++ b/WINDOWS/IMB-IO_VS_2015/IMB-IO.rc @@ -53,8 +53,8 @@ END // VS_VERSION_INFO VERSIONINFO - FILEVERSION 2021,1,0,0 - PRODUCTVERSION 2021,1,0,0 + FILEVERSION 2021,2,0,0 + PRODUCTVERSION 2021,2,0,0 FILEFLAGSMASK 0x17L #ifdef _DEBUG FILEFLAGS 0x1L @@ -71,12 +71,12 @@ BEGIN BEGIN VALUE "CompanyName", "Intel Corporation" VALUE "FileDescription", "Intel(R) MPI Benchmarks" - VALUE "FileVersion", "2021.1" + VALUE "FileVersion", "2021.2" VALUE "InternalName", "IMB-IO" - VALUE "LegalCopyright", "Copyright 2003-2020 Intel Corporation." + VALUE "LegalCopyright", "Copyright 2003-2021 Intel Corporation." VALUE "OriginalFilename", "IMB-IO.exe" VALUE "ProductName", "Intel(R) MPI Benchmarks" - VALUE "ProductVersion", "2021.1" + VALUE "ProductVersion", "2021.2" END END BLOCK "VarFileInfo" diff --git a/WINDOWS/IMB-IO_VS_2017/IMB-IO.rc b/WINDOWS/IMB-IO_VS_2017/IMB-IO.rc index 9bf31652..8c6fd283 100644 --- a/WINDOWS/IMB-IO_VS_2017/IMB-IO.rc +++ b/WINDOWS/IMB-IO_VS_2017/IMB-IO.rc @@ -53,8 +53,8 @@ END // VS_VERSION_INFO VERSIONINFO - FILEVERSION 2021,1,0,0 - PRODUCTVERSION 2021,1,0,0 + FILEVERSION 2021,2,0,0 + PRODUCTVERSION 2021,2,0,0 FILEFLAGSMASK 0x17L #ifdef _DEBUG FILEFLAGS 0x1L @@ -71,12 +71,12 @@ BEGIN BEGIN VALUE "CompanyName", "Intel Corporation" VALUE "FileDescription", "Intel(R) MPI Benchmarks" - VALUE "FileVersion", "2021.1" + VALUE "FileVersion", "2021.2" VALUE "InternalName", "IMB-IO" - VALUE "LegalCopyright", "Copyright 2003-2020 Intel Corporation." + VALUE "LegalCopyright", "Copyright 2003-2021 Intel Corporation." VALUE "OriginalFilename", "IMB-IO.exe" VALUE "ProductName", "Intel(R) MPI Benchmarks" - VALUE "ProductVersion", "2021.1" + VALUE "ProductVersion", "2021.2" END END BLOCK "VarFileInfo" diff --git a/WINDOWS/IMB-MPI1_VS_2013/IMB-MPI1.rc b/WINDOWS/IMB-MPI1_VS_2013/IMB-MPI1.rc index 83549189..f1cf88de 100644 --- a/WINDOWS/IMB-MPI1_VS_2013/IMB-MPI1.rc +++ b/WINDOWS/IMB-MPI1_VS_2013/IMB-MPI1.rc @@ -53,8 +53,8 @@ END // VS_VERSION_INFO VERSIONINFO - FILEVERSION 2021,1,0,0 - PRODUCTVERSION 2021,1,0,0 + FILEVERSION 2021,2,0,0 + PRODUCTVERSION 2021,2,0,0 FILEFLAGSMASK 0x17L #ifdef _DEBUG FILEFLAGS 0x1L @@ -71,12 +71,12 @@ BEGIN BEGIN VALUE "CompanyName", "Intel Corporation" VALUE "FileDescription", "Intel(R) MPI Benchmarks" - VALUE "FileVersion", "2021.1" + VALUE "FileVersion", "2021.2" VALUE "InternalName", "IMB-MPI1" - VALUE "LegalCopyright", "Copyright 2003-2020 Intel Corporation." + VALUE "LegalCopyright", "Copyright 2003-2021 Intel Corporation." VALUE "OriginalFilename", "IMB-MPI1.exe" VALUE "ProductName", "Intel(R) MPI Benchmarks" - VALUE "ProductVersion", "2021.1" + VALUE "ProductVersion", "2021.2" END END BLOCK "VarFileInfo" diff --git a/WINDOWS/IMB-MPI1_VS_2015/IMB-MPI1.rc b/WINDOWS/IMB-MPI1_VS_2015/IMB-MPI1.rc index 83549189..f1cf88de 100644 --- a/WINDOWS/IMB-MPI1_VS_2015/IMB-MPI1.rc +++ b/WINDOWS/IMB-MPI1_VS_2015/IMB-MPI1.rc @@ -53,8 +53,8 @@ END // VS_VERSION_INFO VERSIONINFO - FILEVERSION 2021,1,0,0 - PRODUCTVERSION 2021,1,0,0 + FILEVERSION 2021,2,0,0 + PRODUCTVERSION 2021,2,0,0 FILEFLAGSMASK 0x17L #ifdef _DEBUG FILEFLAGS 0x1L @@ -71,12 +71,12 @@ BEGIN BEGIN VALUE "CompanyName", "Intel Corporation" VALUE "FileDescription", "Intel(R) MPI Benchmarks" - VALUE "FileVersion", "2021.1" + VALUE "FileVersion", "2021.2" VALUE "InternalName", "IMB-MPI1" - VALUE "LegalCopyright", "Copyright 2003-2020 Intel Corporation." + VALUE "LegalCopyright", "Copyright 2003-2021 Intel Corporation." VALUE "OriginalFilename", "IMB-MPI1.exe" VALUE "ProductName", "Intel(R) MPI Benchmarks" - VALUE "ProductVersion", "2021.1" + VALUE "ProductVersion", "2021.2" END END BLOCK "VarFileInfo" diff --git a/WINDOWS/IMB-MPI1_VS_2017/IMB-MPI1.rc b/WINDOWS/IMB-MPI1_VS_2017/IMB-MPI1.rc index 83549189..f1cf88de 100644 --- a/WINDOWS/IMB-MPI1_VS_2017/IMB-MPI1.rc +++ b/WINDOWS/IMB-MPI1_VS_2017/IMB-MPI1.rc @@ -53,8 +53,8 @@ END // VS_VERSION_INFO VERSIONINFO - FILEVERSION 2021,1,0,0 - PRODUCTVERSION 2021,1,0,0 + FILEVERSION 2021,2,0,0 + PRODUCTVERSION 2021,2,0,0 FILEFLAGSMASK 0x17L #ifdef _DEBUG FILEFLAGS 0x1L @@ -71,12 +71,12 @@ BEGIN BEGIN VALUE "CompanyName", "Intel Corporation" VALUE "FileDescription", "Intel(R) MPI Benchmarks" - VALUE "FileVersion", "2021.1" + VALUE "FileVersion", "2021.2" VALUE "InternalName", "IMB-MPI1" - VALUE "LegalCopyright", "Copyright 2003-2020 Intel Corporation." + VALUE "LegalCopyright", "Copyright 2003-2021 Intel Corporation." VALUE "OriginalFilename", "IMB-MPI1.exe" VALUE "ProductName", "Intel(R) MPI Benchmarks" - VALUE "ProductVersion", "2021.1" + VALUE "ProductVersion", "2021.2" END END BLOCK "VarFileInfo" diff --git a/WINDOWS/IMB-MT_VS_2013/IMB-MT.rc b/WINDOWS/IMB-MT_VS_2013/IMB-MT.rc index 72851278..5b0cf590 100644 --- a/WINDOWS/IMB-MT_VS_2013/IMB-MT.rc +++ b/WINDOWS/IMB-MT_VS_2013/IMB-MT.rc @@ -53,8 +53,8 @@ END // VS_VERSION_INFO VERSIONINFO - FILEVERSION 2021,1,0,0 - PRODUCTVERSION 2021,1,0,0 + FILEVERSION 2021,2,0,0 + PRODUCTVERSION 2021,2,0,0 FILEFLAGSMASK 0x17L #ifdef _DEBUG FILEFLAGS 0x1L @@ -71,12 +71,12 @@ BEGIN BEGIN VALUE "CompanyName", "Intel Corporation" VALUE "FileDescription", "Intel(R) MPI Benchmarks" - VALUE "FileVersion", "2021.1" + VALUE "FileVersion", "2021.2" VALUE "InternalName", "IMB-MT" - VALUE "LegalCopyright", "Copyright 2003-2020 Intel Corporation." + VALUE "LegalCopyright", "Copyright 2003-2021 Intel Corporation." VALUE "OriginalFilename", "IMB-MT.exe" VALUE "ProductName", "Intel(R) MPI Benchmarks" - VALUE "ProductVersion", "2021.1" + VALUE "ProductVersion", "2021.2" END END BLOCK "VarFileInfo" diff --git a/WINDOWS/IMB-MT_VS_2015/IMB-MT.rc b/WINDOWS/IMB-MT_VS_2015/IMB-MT.rc index 72851278..5b0cf590 100644 --- a/WINDOWS/IMB-MT_VS_2015/IMB-MT.rc +++ b/WINDOWS/IMB-MT_VS_2015/IMB-MT.rc @@ -53,8 +53,8 @@ END // VS_VERSION_INFO VERSIONINFO - FILEVERSION 2021,1,0,0 - PRODUCTVERSION 2021,1,0,0 + FILEVERSION 2021,2,0,0 + PRODUCTVERSION 2021,2,0,0 FILEFLAGSMASK 0x17L #ifdef _DEBUG FILEFLAGS 0x1L @@ -71,12 +71,12 @@ BEGIN BEGIN VALUE "CompanyName", "Intel Corporation" VALUE "FileDescription", "Intel(R) MPI Benchmarks" - VALUE "FileVersion", "2021.1" + VALUE "FileVersion", "2021.2" VALUE "InternalName", "IMB-MT" - VALUE "LegalCopyright", "Copyright 2003-2020 Intel Corporation." + VALUE "LegalCopyright", "Copyright 2003-2021 Intel Corporation." VALUE "OriginalFilename", "IMB-MT.exe" VALUE "ProductName", "Intel(R) MPI Benchmarks" - VALUE "ProductVersion", "2021.1" + VALUE "ProductVersion", "2021.2" END END BLOCK "VarFileInfo" diff --git a/WINDOWS/IMB-MT_VS_2017/IMB-MT.rc b/WINDOWS/IMB-MT_VS_2017/IMB-MT.rc index 72851278..5b0cf590 100644 --- a/WINDOWS/IMB-MT_VS_2017/IMB-MT.rc +++ b/WINDOWS/IMB-MT_VS_2017/IMB-MT.rc @@ -53,8 +53,8 @@ END // VS_VERSION_INFO VERSIONINFO - FILEVERSION 2021,1,0,0 - PRODUCTVERSION 2021,1,0,0 + FILEVERSION 2021,2,0,0 + PRODUCTVERSION 2021,2,0,0 FILEFLAGSMASK 0x17L #ifdef _DEBUG FILEFLAGS 0x1L @@ -71,12 +71,12 @@ BEGIN BEGIN VALUE "CompanyName", "Intel Corporation" VALUE "FileDescription", "Intel(R) MPI Benchmarks" - VALUE "FileVersion", "2021.1" + VALUE "FileVersion", "2021.2" VALUE "InternalName", "IMB-MT" - VALUE "LegalCopyright", "Copyright 2003-2020 Intel Corporation." + VALUE "LegalCopyright", "Copyright 2003-2021 Intel Corporation." VALUE "OriginalFilename", "IMB-MT.exe" VALUE "ProductName", "Intel(R) MPI Benchmarks" - VALUE "ProductVersion", "2021.1" + VALUE "ProductVersion", "2021.2" END END BLOCK "VarFileInfo" diff --git a/WINDOWS/IMB-NBC_VS_2013/IMB-NBC.rc b/WINDOWS/IMB-NBC_VS_2013/IMB-NBC.rc index a07f1e8a..a0237ed5 100644 --- a/WINDOWS/IMB-NBC_VS_2013/IMB-NBC.rc +++ b/WINDOWS/IMB-NBC_VS_2013/IMB-NBC.rc @@ -53,8 +53,8 @@ END // VS_VERSION_INFO VERSIONINFO - FILEVERSION 2021,1,0,0 - PRODUCTVERSION 2021,1,0,0 + FILEVERSION 2021,2,0,0 + PRODUCTVERSION 2021,2,0,0 FILEFLAGSMASK 0x17L #ifdef _DEBUG FILEFLAGS 0x1L @@ -71,12 +71,12 @@ BEGIN BEGIN VALUE "CompanyName", "Intel Corporation" VALUE "FileDescription", "Intel(R) MPI Benchmarks" - VALUE "FileVersion", "2021.1" + VALUE "FileVersion", "2021.2" VALUE "InternalName", "IMB-NBC" - VALUE "LegalCopyright", "Copyright 2003-2020 Intel Corporation." + VALUE "LegalCopyright", "Copyright 2003-2021 Intel Corporation." VALUE "OriginalFilename", "IMB-NBC.exe" VALUE "ProductName", "Intel(R) MPI Benchmarks" - VALUE "ProductVersion", "2021.1" + VALUE "ProductVersion", "2021.2" END END BLOCK "VarFileInfo" diff --git a/WINDOWS/IMB-NBC_VS_2015/IMB-NBC.rc b/WINDOWS/IMB-NBC_VS_2015/IMB-NBC.rc index a07f1e8a..a0237ed5 100644 --- a/WINDOWS/IMB-NBC_VS_2015/IMB-NBC.rc +++ b/WINDOWS/IMB-NBC_VS_2015/IMB-NBC.rc @@ -53,8 +53,8 @@ END // VS_VERSION_INFO VERSIONINFO - FILEVERSION 2021,1,0,0 - PRODUCTVERSION 2021,1,0,0 + FILEVERSION 2021,2,0,0 + PRODUCTVERSION 2021,2,0,0 FILEFLAGSMASK 0x17L #ifdef _DEBUG FILEFLAGS 0x1L @@ -71,12 +71,12 @@ BEGIN BEGIN VALUE "CompanyName", "Intel Corporation" VALUE "FileDescription", "Intel(R) MPI Benchmarks" - VALUE "FileVersion", "2021.1" + VALUE "FileVersion", "2021.2" VALUE "InternalName", "IMB-NBC" - VALUE "LegalCopyright", "Copyright 2003-2020 Intel Corporation." + VALUE "LegalCopyright", "Copyright 2003-2021 Intel Corporation." VALUE "OriginalFilename", "IMB-NBC.exe" VALUE "ProductName", "Intel(R) MPI Benchmarks" - VALUE "ProductVersion", "2021.1" + VALUE "ProductVersion", "2021.2" END END BLOCK "VarFileInfo" diff --git a/WINDOWS/IMB-NBC_VS_2017/IMB-NBC.rc b/WINDOWS/IMB-NBC_VS_2017/IMB-NBC.rc index a07f1e8a..a0237ed5 100644 --- a/WINDOWS/IMB-NBC_VS_2017/IMB-NBC.rc +++ b/WINDOWS/IMB-NBC_VS_2017/IMB-NBC.rc @@ -53,8 +53,8 @@ END // VS_VERSION_INFO VERSIONINFO - FILEVERSION 2021,1,0,0 - PRODUCTVERSION 2021,1,0,0 + FILEVERSION 2021,2,0,0 + PRODUCTVERSION 2021,2,0,0 FILEFLAGSMASK 0x17L #ifdef _DEBUG FILEFLAGS 0x1L @@ -71,12 +71,12 @@ BEGIN BEGIN VALUE "CompanyName", "Intel Corporation" VALUE "FileDescription", "Intel(R) MPI Benchmarks" - VALUE "FileVersion", "2021.1" + VALUE "FileVersion", "2021.2" VALUE "InternalName", "IMB-NBC" - VALUE "LegalCopyright", "Copyright 2003-2020 Intel Corporation." + VALUE "LegalCopyright", "Copyright 2003-2021 Intel Corporation." VALUE "OriginalFilename", "IMB-NBC.exe" VALUE "ProductName", "Intel(R) MPI Benchmarks" - VALUE "ProductVersion", "2021.1" + VALUE "ProductVersion", "2021.2" END END BLOCK "VarFileInfo" diff --git a/WINDOWS/IMB-P2P_VS_2013/IMB-P2P.rc b/WINDOWS/IMB-P2P_VS_2013/IMB-P2P.rc index 8f42e270..39f16ab8 100644 --- a/WINDOWS/IMB-P2P_VS_2013/IMB-P2P.rc +++ b/WINDOWS/IMB-P2P_VS_2013/IMB-P2P.rc @@ -53,8 +53,8 @@ END // VS_VERSION_INFO VERSIONINFO - FILEVERSION 2021,1,0,0 - PRODUCTVERSION 2021,1,0,0 + FILEVERSION 2021,2,0,0 + PRODUCTVERSION 2021,2,0,0 FILEFLAGSMASK 0x17L #ifdef _DEBUG FILEFLAGS 0x1L @@ -71,12 +71,12 @@ BEGIN BEGIN VALUE "CompanyName", "Intel Corporation" VALUE "FileDescription", "Intel(R) MPI Benchmarks" - VALUE "FileVersion", "2021.1" + VALUE "FileVersion", "2021.2" VALUE "InternalName", "IMB-P2P" - VALUE "LegalCopyright", "Copyright 2003-2020 Intel Corporation." + VALUE "LegalCopyright", "Copyright 2003-2021 Intel Corporation." VALUE "OriginalFilename", "IMB-P2P.exe" VALUE "ProductName", "Intel(R) MPI Benchmarks" - VALUE "ProductVersion", "2021.1" + VALUE "ProductVersion", "2021.2" END END BLOCK "VarFileInfo" diff --git a/WINDOWS/IMB-P2P_VS_2015/IMB-P2P.rc b/WINDOWS/IMB-P2P_VS_2015/IMB-P2P.rc index 8f42e270..39f16ab8 100644 --- a/WINDOWS/IMB-P2P_VS_2015/IMB-P2P.rc +++ b/WINDOWS/IMB-P2P_VS_2015/IMB-P2P.rc @@ -53,8 +53,8 @@ END // VS_VERSION_INFO VERSIONINFO - FILEVERSION 2021,1,0,0 - PRODUCTVERSION 2021,1,0,0 + FILEVERSION 2021,2,0,0 + PRODUCTVERSION 2021,2,0,0 FILEFLAGSMASK 0x17L #ifdef _DEBUG FILEFLAGS 0x1L @@ -71,12 +71,12 @@ BEGIN BEGIN VALUE "CompanyName", "Intel Corporation" VALUE "FileDescription", "Intel(R) MPI Benchmarks" - VALUE "FileVersion", "2021.1" + VALUE "FileVersion", "2021.2" VALUE "InternalName", "IMB-P2P" - VALUE "LegalCopyright", "Copyright 2003-2020 Intel Corporation." + VALUE "LegalCopyright", "Copyright 2003-2021 Intel Corporation." VALUE "OriginalFilename", "IMB-P2P.exe" VALUE "ProductName", "Intel(R) MPI Benchmarks" - VALUE "ProductVersion", "2021.1" + VALUE "ProductVersion", "2021.2" END END BLOCK "VarFileInfo" diff --git a/WINDOWS/IMB-P2P_VS_2017/IMB-P2P.rc b/WINDOWS/IMB-P2P_VS_2017/IMB-P2P.rc index 5032440b..682122a8 100644 --- a/WINDOWS/IMB-P2P_VS_2017/IMB-P2P.rc +++ b/WINDOWS/IMB-P2P_VS_2017/IMB-P2P.rc @@ -53,8 +53,8 @@ END // VS_VERSION_INFO VERSIONINFO - FILEVERSION 2021,1,0,0 - PRODUCTVERSION 2021,1,0,0 + FILEVERSION 2021,2,0,0 + PRODUCTVERSION 2021,2,0,0 FILEFLAGSMASK 0x17L #ifdef _DEBUG FILEFLAGS 0x1L @@ -71,12 +71,12 @@ BEGIN BEGIN VALUE "CompanyName", "Intel Corporation" VALUE "FileDescription", "Intel(R) MPI Benchmarks" - VALUE "FileVersion", "2021.1" + VALUE "FileVersion", "2021.2" VALUE "InternalName", "IMB-P2P" - VALUE "LegalCopyright", "Copyright 2003-2020 Intel Corporation." + VALUE "LegalCopyright", "Copyright 2003-2021 Intel Corporation." VALUE "OriginalFilename", "IMB-P2P.exe" VALUE "ProductName", "Intel(R) MPI Benchmarks" - VALUE "ProductVersion", "2021.1" + VALUE "ProductVersion", "2021.2" END END BLOCK "VarFileInfo" diff --git a/WINDOWS/IMB-RMA_VS_2013/IMB-RMA.rc b/WINDOWS/IMB-RMA_VS_2013/IMB-RMA.rc index 0ba49d7e..cecd8968 100644 --- a/WINDOWS/IMB-RMA_VS_2013/IMB-RMA.rc +++ b/WINDOWS/IMB-RMA_VS_2013/IMB-RMA.rc @@ -53,8 +53,8 @@ END // VS_VERSION_INFO VERSIONINFO - FILEVERSION 2021,1,0,0 - PRODUCTVERSION 2021,1,0,0 + FILEVERSION 2021,2,0,0 + PRODUCTVERSION 2021,2,0,0 FILEFLAGSMASK 0x17L #ifdef _DEBUG FILEFLAGS 0x1L @@ -71,12 +71,12 @@ BEGIN BEGIN VALUE "CompanyName", "Intel Corporation" VALUE "FileDescription", "Intel(R) MPI Benchmarks" - VALUE "FileVersion", "2021.1" + VALUE "FileVersion", "2021.2" VALUE "InternalName", "IMB-RMA" - VALUE "LegalCopyright", "Copyright 2003-2020 Intel Corporation." + VALUE "LegalCopyright", "Copyright 2003-2021 Intel Corporation." VALUE "OriginalFilename", "IMB-RMA.exe" VALUE "ProductName", "Intel(R) MPI Benchmarks" - VALUE "ProductVersion", "2021.1" + VALUE "ProductVersion", "2021.2" END END BLOCK "VarFileInfo" diff --git a/WINDOWS/IMB-RMA_VS_2015/IMB-RMA.rc b/WINDOWS/IMB-RMA_VS_2015/IMB-RMA.rc index 0ba49d7e..cecd8968 100644 --- a/WINDOWS/IMB-RMA_VS_2015/IMB-RMA.rc +++ b/WINDOWS/IMB-RMA_VS_2015/IMB-RMA.rc @@ -53,8 +53,8 @@ END // VS_VERSION_INFO VERSIONINFO - FILEVERSION 2021,1,0,0 - PRODUCTVERSION 2021,1,0,0 + FILEVERSION 2021,2,0,0 + PRODUCTVERSION 2021,2,0,0 FILEFLAGSMASK 0x17L #ifdef _DEBUG FILEFLAGS 0x1L @@ -71,12 +71,12 @@ BEGIN BEGIN VALUE "CompanyName", "Intel Corporation" VALUE "FileDescription", "Intel(R) MPI Benchmarks" - VALUE "FileVersion", "2021.1" + VALUE "FileVersion", "2021.2" VALUE "InternalName", "IMB-RMA" - VALUE "LegalCopyright", "Copyright 2003-2020 Intel Corporation." + VALUE "LegalCopyright", "Copyright 2003-2021 Intel Corporation." VALUE "OriginalFilename", "IMB-RMA.exe" VALUE "ProductName", "Intel(R) MPI Benchmarks" - VALUE "ProductVersion", "2021.1" + VALUE "ProductVersion", "2021.2" END END BLOCK "VarFileInfo" diff --git a/WINDOWS/IMB-RMA_VS_2017/IMB-RMA.rc b/WINDOWS/IMB-RMA_VS_2017/IMB-RMA.rc index 0ba49d7e..cecd8968 100644 --- a/WINDOWS/IMB-RMA_VS_2017/IMB-RMA.rc +++ b/WINDOWS/IMB-RMA_VS_2017/IMB-RMA.rc @@ -53,8 +53,8 @@ END // VS_VERSION_INFO VERSIONINFO - FILEVERSION 2021,1,0,0 - PRODUCTVERSION 2021,1,0,0 + FILEVERSION 2021,2,0,0 + PRODUCTVERSION 2021,2,0,0 FILEFLAGSMASK 0x17L #ifdef _DEBUG FILEFLAGS 0x1L @@ -71,12 +71,12 @@ BEGIN BEGIN VALUE "CompanyName", "Intel Corporation" VALUE "FileDescription", "Intel(R) MPI Benchmarks" - VALUE "FileVersion", "2021.1" + VALUE "FileVersion", "2021.2" VALUE "InternalName", "IMB-RMA" - VALUE "LegalCopyright", "Copyright 2003-2020 Intel Corporation." + VALUE "LegalCopyright", "Copyright 2003-2021 Intel Corporation." VALUE "OriginalFilename", "IMB-RMA.exe" VALUE "ProductName", "Intel(R) MPI Benchmarks" - VALUE "ProductVersion", "2021.1" + VALUE "ProductVersion", "2021.2" END END BLOCK "VarFileInfo" diff --git a/src_c/IMB_2018.c b/src_c/IMB_2018.c index 66bb86b6..13bf5a22 100644 --- a/src_c/IMB_2018.c +++ b/src_c/IMB_2018.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_allgather.c b/src_c/IMB_allgather.c index 5503c3e9..1587d440 100644 --- a/src_c/IMB_allgather.c +++ b/src_c/IMB_allgather.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_allgatherv.c b/src_c/IMB_allgatherv.c index 13eaae16..53011a68 100644 --- a/src_c/IMB_allgatherv.c +++ b/src_c/IMB_allgatherv.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_allreduce.c b/src_c/IMB_allreduce.c index 672029d6..a0093f5e 100644 --- a/src_c/IMB_allreduce.c +++ b/src_c/IMB_allreduce.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_alltoall.c b/src_c/IMB_alltoall.c index 564c5ea3..57a54fa5 100644 --- a/src_c/IMB_alltoall.c +++ b/src_c/IMB_alltoall.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_alltoallv.c b/src_c/IMB_alltoallv.c index 22386278..659ff25b 100644 --- a/src_c/IMB_alltoallv.c +++ b/src_c/IMB_alltoallv.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_appl_errors.h b/src_c/IMB_appl_errors.h index d27988d6..7487c860 100644 --- a/src_c/IMB_appl_errors.h +++ b/src_c/IMB_appl_errors.h @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_bandwidth.c b/src_c/IMB_bandwidth.c index b8ee61de..d45eac03 100644 --- a/src_c/IMB_bandwidth.c +++ b/src_c/IMB_bandwidth.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** @@ -111,7 +111,7 @@ Output variables: int s_tag, r_tag; int dest, source; MPI_Status stat; - MPI_Request *requests = (MPI_Request*)malloc(c_info->max_win_size * sizeof(MPI_Request)); + MPI_Request *requests = NULL; int ws, peers; char ack; @@ -135,6 +135,7 @@ Output variables: return; } + requests = (MPI_Request*)malloc(c_info->max_win_size * sizeof(MPI_Request)); for (i = 0; i < N_BARR; i++) MPI_Barrier(c_info->communicator); @@ -221,7 +222,7 @@ Output variables: int dest, source; MPI_Status stat; const int max_win_size2 = 2 * c_info->max_win_size; - MPI_Request *requests = (MPI_Request*)malloc(2 * c_info->max_win_size * sizeof(MPI_Request)); + MPI_Request *requests = NULL; int ws, peers; char ack; @@ -245,6 +246,7 @@ Output variables: return; } + requests = (MPI_Request*)malloc(2 * c_info->max_win_size * sizeof(MPI_Request)); for (i = 0; i < N_BARR; i++) MPI_Barrier(c_info->communicator); diff --git a/src_c/IMB_barrier.c b/src_c/IMB_barrier.c index 383ad1fa..1d5cbc32 100644 --- a/src_c/IMB_barrier.c +++ b/src_c/IMB_barrier.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_bcast.c b/src_c/IMB_bcast.c index f879809f..55b7abf6 100644 --- a/src_c/IMB_bcast.c +++ b/src_c/IMB_bcast.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_benchlist.c b/src_c/IMB_benchlist.c index 6b211101..0b26cc13 100644 --- a/src_c/IMB_benchlist.c +++ b/src_c/IMB_benchlist.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_benchmark.h b/src_c/IMB_benchmark.h index 836ef726..630e25d7 100644 --- a/src_c/IMB_benchmark.h +++ b/src_c/IMB_benchmark.h @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_bnames_ext.h b/src_c/IMB_bnames_ext.h index 9ca3e3e0..3e6fbb19 100644 --- a/src_c/IMB_bnames_ext.h +++ b/src_c/IMB_bnames_ext.h @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_bnames_io.h b/src_c/IMB_bnames_io.h index 3b31d731..67ea10a6 100644 --- a/src_c/IMB_bnames_io.h +++ b/src_c/IMB_bnames_io.h @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_bnames_mpi1.h b/src_c/IMB_bnames_mpi1.h index 47fc5421..a849d871 100644 --- a/src_c/IMB_bnames_mpi1.h +++ b/src_c/IMB_bnames_mpi1.h @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_bnames_nbc.h b/src_c/IMB_bnames_nbc.h index 7558688b..3a193eab 100644 --- a/src_c/IMB_bnames_nbc.h +++ b/src_c/IMB_bnames_nbc.h @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_bnames_rma.h b/src_c/IMB_bnames_rma.h index 0634e95f..0e1d5dc7 100644 --- a/src_c/IMB_bnames_rma.h +++ b/src_c/IMB_bnames_rma.h @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_cache.h b/src_c/IMB_cache.h index 58d4c6e1..86495076 100644 --- a/src_c/IMB_cache.h +++ b/src_c/IMB_cache.h @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_chk_diff.c b/src_c/IMB_chk_diff.c index ec713461..2f24addc 100644 --- a/src_c/IMB_chk_diff.c +++ b/src_c/IMB_chk_diff.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_comm_info.h b/src_c/IMB_comm_info.h index b709ef9d..ced824fa 100644 --- a/src_c/IMB_comm_info.h +++ b/src_c/IMB_comm_info.h @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** @@ -87,6 +87,15 @@ typedef enum { typedef struct { int Locsize; MPI_Offset Offset; int Totalsize;} SPLITTING; #endif +#ifdef GPU_ENABLE +typedef enum { + MAT_CPU = 0, + MAT_DEVICE = 1, + MAT_HOST = 2, + MAT_SHARED = 3 +} MEM_ALLOC_TYPE; +#endif //GPU_ENABLE + struct comm_info { /* Communication information as for MPI-1/2 parts */ @@ -151,6 +160,8 @@ struct comm_info { int warm_up; + int msg_pause; + int max_win_size; #ifdef MPIIO @@ -188,6 +199,10 @@ struct comm_info { AGGREGATE_MODE aggregate_mode; /*turn on different types of aggregate modes*/ #endif +#ifdef GPU_ENABLE + MEM_ALLOC_TYPE mem_alloc_type; +#endif //GPU_ENABLE + }; #endif diff --git a/src_c/IMB_comments.h b/src_c/IMB_comments.h index eadb879f..5fb86ff1 100644 --- a/src_c/IMB_comments.h +++ b/src_c/IMB_comments.h @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_cpu_exploit.c b/src_c/IMB_cpu_exploit.c index 29c52296..a98ad006 100644 --- a/src_c/IMB_cpu_exploit.c +++ b/src_c/IMB_cpu_exploit.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_declare.c b/src_c/IMB_declare.c index d12750bb..056b2659 100644 --- a/src_c/IMB_declare.c +++ b/src_c/IMB_declare.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_declare.h b/src_c/IMB_declare.h index d67ff19c..33a78848 100644 --- a/src_c/IMB_declare.h +++ b/src_c/IMB_declare.h @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_err_check.h b/src_c/IMB_err_check.h index 49bf349c..c62514d6 100644 --- a/src_c/IMB_err_check.h +++ b/src_c/IMB_err_check.h @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_err_handler.c b/src_c/IMB_err_handler.c index 81283997..1d4fe8da 100644 --- a/src_c/IMB_err_handler.c +++ b/src_c/IMB_err_handler.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_exchange.c b/src_c/IMB_exchange.c index a41f6c81..2300de58 100644 --- a/src_c/IMB_exchange.c +++ b/src_c/IMB_exchange.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_g_info.c b/src_c/IMB_g_info.c index a9b1ff5d..981c6424 100644 --- a/src_c/IMB_g_info.c +++ b/src_c/IMB_g_info.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** @@ -72,7 +72,7 @@ For more documentation than found here, see #ifdef IMB2018 char* VERSION="2018"; #else -char* VERSION="2021.1"; +char* VERSION="2021.2"; #endif #include @@ -100,22 +100,26 @@ void IMB_general_info() { struct tm *local_time; time(&T); - fprintf(unit, "#------------------------------------------------------------\n"); + fprintf(unit, "#----------------------------------------------------------------\n"); #ifdef MPI1 - fprintf(unit, "# Intel(R) MPI Benchmarks %s, MPI-1 part \n", VERSION); +#ifdef GPU_ENABLE + fprintf(unit, "# Intel(R) MPI Benchmarks %s Technical Preview, MPI-1 part (GPU)\n", VERSION); +#else + fprintf(unit, "# Intel(R) MPI Benchmarks %s, MPI-1 part\n", VERSION); +#endif //GPU_ENABLE #elif defined EXT - fprintf(unit, "# Intel(R) MPI Benchmarks %s, MPI-2 part \n", VERSION); + fprintf(unit, "# Intel(R) MPI Benchmarks %s, MPI-2 part\n", VERSION); #elif defined MPIIO - fprintf(unit, "# Intel(R) MPI Benchmarks %s, MPI-IO part \n", VERSION); + fprintf(unit, "# Intel(R) MPI Benchmarks %s, MPI-IO partn", VERSION); #elif defined NBC - fprintf(unit, "# Intel(R) MPI Benchmarks %s, MPI-NBC part \n", VERSION); + fprintf(unit, "# Intel(R) MPI Benchmarks %s, MPI-NBC part\n", VERSION); #elif defined RMA - fprintf(unit, "# Intel(R) MPI Benchmarks %s, MPI-RMA part \n", VERSION); + fprintf(unit, "# Intel(R) MPI Benchmarks %s, MPI-RMA part\n", VERSION); #endif - fprintf(unit, "#------------------------------------------------------------\n"); + fprintf(unit, "#----------------------------------------------------------------\n"); local_time = localtime(&T); if (local_time == NULL) exit(1); fprintf(unit, "# Date : %s", asctime(local_time)); diff --git a/src_c/IMB_gather.c b/src_c/IMB_gather.c index ba1a7ed7..f0124760 100644 --- a/src_c/IMB_gather.c +++ b/src_c/IMB_gather.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_gatherv.c b/src_c/IMB_gatherv.c index 6c7519c0..cb5887c3 100644 --- a/src_c/IMB_gatherv.c +++ b/src_c/IMB_gatherv.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_init.c b/src_c/IMB_init.c index 807ac937..2e699020 100644 --- a/src_c/IMB_init.c +++ b/src_c/IMB_init.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** @@ -1400,6 +1400,8 @@ void IMB_set_default(struct comm_info* c_info) { c_info->warm_up = 1; + c_info->msg_pause = 0; + #ifdef MPIIO /* FILE INFORMATION */ diff --git a/src_c/IMB_init_file.c b/src_c/IMB_init_file.c index a18726d2..e344b624 100644 --- a/src_c/IMB_init_file.c +++ b/src_c/IMB_init_file.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_init_transfer.c b/src_c/IMB_init_transfer.c index 0a92618c..f3b043c8 100644 --- a/src_c/IMB_init_transfer.c +++ b/src_c/IMB_init_transfer.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_l0.c b/src_c/IMB_l0.c new file mode 100644 index 00000000..6c1903a3 --- /dev/null +++ b/src_c/IMB_l0.c @@ -0,0 +1,225 @@ +/***************************************************************************** + * * + * Copyright 2020 Intel Corporation. * + * * + ***************************************************************************** + +This code is covered by the Community Source License (CPL), version +1.0 as published by IBM and reproduced in the file "license.txt" in the +"license" subdirectory. Redistribution in source and binary form, with +or without modification, is permitted ONLY within the regulations +contained in above mentioned license. + +Use of the name and trademark "Intel(R) MPI Benchmarks" is allowed ONLY +within the regulations of the "License for Use of "Intel(R) MPI +Benchmarks" Name and Trademark" as reproduced in the file +"use-of-trademark-license.txt" in the "license" subdirectory. + +THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR +CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT +LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, +MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is +solely responsible for determining the appropriateness of using and +distributing the Program and assumes all risks associated with its +exercise of rights under this Agreement, including but not limited to +the risks and costs of program errors, compliance with applicable +laws, damage to or loss of data, programs or equipment, and +unavailability or interruption of operations. + +EXCEPT AS EXPRESSLY SET FORTH IN THIS AGREEMENT, NEITHER RECIPIENT NOR +ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY DIRECT, INDIRECT, +INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING +WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND ON ANY THEORY OF +LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OR +DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED +HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + +EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF +YOUR JURISDICTION. It is licensee's responsibility to comply with any +export regulations applicable in licensee's jurisdiction. Under +CURRENT U.S. export regulations this software is eligible for export +from the U.S. and can be downloaded by or otherwise exported or +reexported worldwide EXCEPT to U.S. embargoed destinations which +include Cuba, Iraq, Libya, North Korea, Iran, Syria, Sudan, +Afghanistan and any other country to which the U.S. has embargoed +goods and services. + + *************************************************************************** + +For more documentation than found here, see + +[1] doc/ReadMe_IMB.txt + +[2] Intel(R) MPI Benchmarks + Users Guide and Methodology Description + In + doc/IMB_Users_Guide.pdf + + ***************************************************************************/ +#ifdef GPU_ENABLE +#include +#include + +#include "IMB_declare.h" +#include "IMB_benchmark.h" +#include "IMB_prototypes.h" + +#include "IMB_l0.h" + +#define ZE_NULL_HANDLE NULL /* just for verbosity */ + +#define ZE_CHKERR_EXPL_FINALLY(f, fin, a) { ze_result_t _ze_chkerr_err; \ + if ((_ze_chkerr_err=(f), (fin), _ze_chkerr_err) != ZE_RESULT_SUCCESS) { \ + fprintf(stderr, "ERROR: 0x%x returned from %s\n", _ze_chkerr_err, #f); \ + a; \ + } \ +} +#define ZE_CHKERR_EXPL(f, a) ZE_CHKERR_EXPL_FINALLY(f, 0, a) +#define ZE_CHKERR_FINALLY(f, fin) ZE_CHKERR_EXPL_FINALLY(f, fin, goto f_err) +#define ZE_CHKERR(f) ZE_CHKERR_EXPL(f, goto f_err) +#define ZE_CHKERR_DO_NOT_FAIL(f) ZE_CHKERR_EXPL_FINALLY(f, 0, (void)0) + +#define C_CHKERR_EXPL(f, a) if ((f) != 0) { \ + fprintf(stderr, "ERROR: %s failed\n", #f); \ + a; \ +} +#define C_CHKERR(f) C_CHKERR_EXPL(f, goto f_err) + +static ze_context_handle_t l0_context = ZE_NULL_HANDLE; +static ze_driver_handle_t l0_driver = ZE_NULL_HANDLE; +static ze_device_handle_t l0_device = ZE_NULL_HANDLE; +static ze_command_queue_handle_t l0_cq = ZE_NULL_HANDLE; +static ze_command_list_handle_t l0_cl = ZE_NULL_HANDLE; + +static int l0_initialize(void) +{ + ZE_CHKERR(zeInit(0)); + + uint32_t ze_driver_count = 1, ze_device_count = 1; + ZE_CHKERR(zeDriverGet(&ze_driver_count, &l0_driver)); + ZE_CHKERR(zeDeviceGet(l0_driver, &ze_device_count, &l0_device)); + + ze_context_desc_t ctxtDesc = { ZE_STRUCTURE_TYPE_CONTEXT_DESC, NULL, 0 }; + ZE_CHKERR(zeContextCreate(l0_driver, &ctxtDesc, &l0_context)); + + ze_command_queue_desc_t l0_cq_desc = { + .flags = 0, + .mode = ZE_COMMAND_QUEUE_MODE_DEFAULT, + .priority = ZE_COMMAND_QUEUE_PRIORITY_NORMAL, + .ordinal = 0 /* this must be less than device_properties.numAsyncComputeEngines */ + }; + ZE_CHKERR(zeCommandQueueCreate(l0_context, l0_device, &l0_cq_desc, &l0_cq)); + + ze_command_list_desc_t l0_cl_desc = { .flags = 0 }; + ZE_CHKERR(zeCommandListCreate(l0_context, l0_device, &l0_cl_desc, &l0_cl)); + return 0; +f_err: + return 1; +} + +static int l0_memcpy(void *dst, const void *src, size_t sz) +{ + ZE_CHKERR(zeCommandListAppendMemoryCopy(l0_cl, dst, src, sz, ZE_NULL_HANDLE, 0, ZE_NULL_HANDLE)); + ZE_CHKERR(zeCommandListClose(l0_cl)); + ZE_CHKERR(zeCommandQueueExecuteCommandLists(l0_cq, 1, &l0_cl, ZE_NULL_HANDLE)); + ZE_CHKERR(zeCommandQueueSynchronize(l0_cq, UINT32_MAX)); + ZE_CHKERR(zeCommandListReset(l0_cl)); + return 0; +f_err: + return 1; +} + +void *IMB_l0_alloc(size_t size, char *where, MEM_ALLOC_TYPE mem_alloc_type) +{ + if (!l0_driver) { + C_CHKERR(l0_initialize()); + } + void *buf; + switch (mem_alloc_type) { + case MAT_DEVICE: + { + ze_device_mem_alloc_desc_t l0_device_mem_desc = { + .flags = 0, + .ordinal = 0 /* this must be less than count of zeDeviceGetMemoryProperties */ + }; + ZE_CHKERR(zeMemAllocDevice(l0_context, &l0_device_mem_desc, size, IMB_L0_MEM_ALIGNMENT, l0_device, &buf)); + break; + } + case MAT_HOST: + { + ze_host_mem_alloc_desc_t l0_host_mem_desc = { + .flags = 0, + }; + ZE_CHKERR(zeMemAllocHost(l0_context, &l0_host_mem_desc, size, IMB_L0_MEM_ALIGNMENT, &buf)); + break; + } + case MAT_SHARED: + { + ze_device_mem_alloc_desc_t l0_device_mem_desc = { + .flags = 0, + .ordinal = 0 /* this must be less than count of zeDeviceGetMemoryProperties */ + }; + ze_host_mem_alloc_desc_t l0_host_mem_desc = { + .flags = 0, + }; + ZE_CHKERR(zeMemAllocShared(l0_context, &l0_device_mem_desc, &l0_host_mem_desc, size, IMB_L0_MEM_ALIGNMENT, l0_device, &buf)); + break; + } + default: + { + printf("Error: Unknown buf type\n"); + exit(1); + } + } + + return buf; +f_err: + return NULL; +} + + +void IMB_l0_ass_buf(void *buf, int rank, size_t pos1, size_t pos2, int value) +{ +/* + + Assigns values to a buffer + +Input variables: + +-rank (type int) + Rank of calling process + +-pos1 (type int) +-pos2 (type int) + Assignment between byte positions pos1, pos2 + +-value (type int) + 1/0 for non-zero (defined in IMB_settings.h)/ zero value + +In/out variables: + +-buf (type void*) + Values assigned within given positions +*/ + if (pos2 <= pos1) + return; + + static const int asize = (int) sizeof(assign_type); + + char *tmp_buf = malloc(pos2 + 1 - pos1); + l0_memcpy(tmp_buf, buf + pos1, pos2 - pos1); + IMB_ass_buf(tmp_buf, rank, pos1, pos2, value); + l0_memcpy(buf + pos1, tmp_buf, pos2 - pos1); + free(tmp_buf); +} + +void IMB_l0_free(void **B) +{ + if (B && *B) { + ZE_CHKERR_DO_NOT_FAIL(zeMemFree(l0_context, *B)); + *B = NULL; + } +} + +#endif //GPU_ENABLE \ No newline at end of file diff --git a/src_c/IMB_l0.h b/src_c/IMB_l0.h new file mode 100644 index 00000000..51a607b4 --- /dev/null +++ b/src_c/IMB_l0.h @@ -0,0 +1,75 @@ +/***************************************************************************** + * * + * Copyright 2020 Intel Corporation. * + * * + ***************************************************************************** + +This code is covered by the Community Source License (CPL), version +1.0 as published by IBM and reproduced in the file "license.txt" in the +"license" subdirectory. Redistribution in source and binary form, with +or without modification, is permitted ONLY within the regulations +contained in above mentioned license. + +Use of the name and trademark "Intel(R) MPI Benchmarks" is allowed ONLY +within the regulations of the "License for Use of "Intel(R) MPI +Benchmarks" Name and Trademark" as reproduced in the file +"use-of-trademark-license.txt" in the "license" subdirectory. + +THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR +CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT +LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, +MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is +solely responsible for determining the appropriateness of using and +distributing the Program and assumes all risks associated with its +exercise of rights under this Agreement, including but not limited to +the risks and costs of program errors, compliance with applicable +laws, damage to or loss of data, programs or equipment, and +unavailability or interruption of operations. + +EXCEPT AS EXPRESSLY SET FORTH IN THIS AGREEMENT, NEITHER RECIPIENT NOR +ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY DIRECT, INDIRECT, +INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING +WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND ON ANY THEORY OF +LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING +NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OR +DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED +HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. + +EXPORT LAWS: THIS LICENSE ADDS NO RESTRICTIONS TO THE EXPORT LAWS OF +YOUR JURISDICTION. It is licensee's responsibility to comply with any +export regulations applicable in licensee's jurisdiction. Under +CURRENT U.S. export regulations this software is eligible for export +from the U.S. and can be downloaded by or otherwise exported or +reexported worldwide EXCEPT to U.S. embargoed destinations which +include Cuba, Iraq, Libya, North Korea, Iran, Syria, Sudan, +Afghanistan and any other country to which the U.S. has embargoed +goods and services. + + *************************************************************************** + +For more documentation than found here, see + +[1] doc/ReadMe_IMB.txt + +[2] Intel(R) MPI Benchmarks + Users Guide and Methodology Description + In + doc/IMB_Users_Guide.pdf + + ***************************************************************************/ + + + +#ifndef __l0_h__ +#define __l0_h__ + + +#include + +#define IMB_L0_MEM_ALIGNMENT 64 + +void *IMB_l0_alloc(size_t size, char *where, MEM_ALLOC_TYPE mem_alloc_type); +void IMB_l0_free(void **B); +void IMB_l0_ass_buf(void *buf, int rank, size_t pos1, size_t pos2, int value); + +#endif diff --git a/src_c/IMB_mem_info.h b/src_c/IMB_mem_info.h index 33ca36a8..15afc798 100644 --- a/src_c/IMB_mem_info.h +++ b/src_c/IMB_mem_info.h @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_mem_manager.c b/src_c/IMB_mem_manager.c index 18932451..79a0a032 100644 --- a/src_c/IMB_mem_manager.c +++ b/src_c/IMB_mem_manager.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** @@ -88,6 +88,58 @@ For more documentation than found here, see #include /* for INT_MAX declaration*/ #include + +#if defined(GPU_ENABLE) && defined(MPI1) +#include "IMB_l0.h" + +#define IMB_ALLOC(buff, size, where) \ + do { \ + if (c_info->mem_alloc_type != MAT_CPU) { \ + buff = IMB_l0_alloc(size, where, c_info->mem_alloc_type); \ + } \ + else { \ + buff = IMB_v_alloc(size, where); \ + } \ + } while (0); + +#define IMB_FREE(buff) \ + do { \ + if (c_info->mem_alloc_type != MAT_CPU) { \ + IMB_l0_free(buff); \ + } \ + else { \ + IMB_v_free(buff); \ + } \ + } while (0); + +#define IMB_ASSIGN(buf, rank, pos1, pos2, value) \ + do { \ + if (c_info->mem_alloc_type != MAT_CPU) { \ + IMB_l0_ass_buf(buf, rank, pos1, pos2, value); \ + } \ + else { \ + IMB_ass_buf(buf, rank, pos1, pos2, value); \ + } \ + } while (0); + +#else // !GPU_ENABLE or !MPI1 +#define IMB_ALLOC(buff, size, where) \ + do { \ + buff = IMB_v_alloc(size, where); \ + } while (0); + +#define IMB_FREE(buff) \ + do { \ + IMB_v_free(buff); \ + } while (0); + +#define IMB_ASSIGN(buf, rank, pos1, pos2, value) \ + do { \ + IMB_ass_buf(buf, rank, pos1, pos2, value); \ + } while (0); + +#endif // defined(GPU_ENABLE) && defined(MPI1) + static int asize = (int) sizeof(assign_type); void* IMB_v_alloc(size_t size, char* where) { @@ -163,18 +215,18 @@ In/out variables: if (c_info->s_alloc < s_len) { size_t size; - IMB_v_free((void**)&c_info->s_buffer); + IMB_FREE((void**)&c_info->s_buffer); size = s_len * ((size_t)c_info->size_scale); - c_info->s_buffer = IMB_v_alloc(size, where); + IMB_ALLOC(c_info->s_buffer, size, where); c_info->s_alloc = size / ((size_t)c_info->size_scale); c_info->s_data = (assign_type*)c_info->s_buffer; } if (c_info->r_alloc < r_len) { size_t size; - IMB_v_free((void**)&c_info->r_buffer); + IMB_FREE((void**)&c_info->r_buffer); size = r_len * ((size_t)c_info->size_scale); - c_info->r_buffer = IMB_v_alloc(size, where); + IMB_ALLOC(c_info->r_buffer, size, where); c_info->r_alloc = size / ((size_t)c_info->size_scale); c_info->r_data = (assign_type*)c_info->r_buffer; } @@ -336,10 +388,10 @@ Checks right allocation. IMB_alloc_buf(c_info, "set_buf 1", s_len, r_len); if (s_pos2 >= s_pos1) - IMB_ass_buf(c_info->s_buffer, selected_rank, s_pos1, s_pos2, 1); + IMB_ASSIGN(c_info->s_buffer, selected_rank, s_pos1, s_pos2, 1); if (r_pos2 >= r_pos1) - IMB_ass_buf(c_info->r_buffer, selected_rank, r_pos1, r_pos2, 0); + IMB_ASSIGN(c_info->r_buffer, selected_rank, r_pos1, r_pos2, 0); } @@ -411,6 +463,10 @@ In/Out : c_info | struct comm_info* | see comm_info.h all_defect = NULL; #endif +#ifdef GPU_ENABLE + c_info->mem_alloc_type = MAT_CPU; +#endif //GPU_ENABLE + IMB_init_errhand(c_info); } @@ -902,7 +958,7 @@ In/out variables: */ if (c_info->s_alloc > 0) { - IMB_v_free((void**)&c_info->s_buffer); + IMB_FREE((void**)&c_info->s_buffer); c_info->s_alloc = 0; c_info->s_buffer = NULL; @@ -922,7 +978,7 @@ In/out variables: */ if (c_info->r_alloc > 0) { - IMB_v_free((void**)&c_info->r_buffer); + IMB_FREE((void**)&c_info->r_buffer); c_info->r_alloc = 0; c_info->r_buffer = NULL; diff --git a/src_c/IMB_ones_accu.c b/src_c/IMB_ones_accu.c index 39b86b50..87c45069 100644 --- a/src_c/IMB_ones_accu.c +++ b/src_c/IMB_ones_accu.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_ones_bidir.c b/src_c/IMB_ones_bidir.c index dbac8078..c54b949f 100644 --- a/src_c/IMB_ones_bidir.c +++ b/src_c/IMB_ones_bidir.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_ones_unidir.c b/src_c/IMB_ones_unidir.c index d17a393e..4d76d146 100644 --- a/src_c/IMB_ones_unidir.c +++ b/src_c/IMB_ones_unidir.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_open_close.c b/src_c/IMB_open_close.c index 32c3ebf5..1c8589b8 100644 --- a/src_c/IMB_open_close.c +++ b/src_c/IMB_open_close.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_output.c b/src_c/IMB_output.c index 677c0021..76ac2d14 100644 --- a/src_c/IMB_output.c +++ b/src_c/IMB_output.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_parse_name_ext.c b/src_c/IMB_parse_name_ext.c index 1693d433..a1462aab 100644 --- a/src_c/IMB_parse_name_ext.c +++ b/src_c/IMB_parse_name_ext.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_parse_name_io.c b/src_c/IMB_parse_name_io.c index 2d68a885..17c8485b 100644 --- a/src_c/IMB_parse_name_io.c +++ b/src_c/IMB_parse_name_io.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_parse_name_mpi1.c b/src_c/IMB_parse_name_mpi1.c index 6ae4c00a..c95489a3 100644 --- a/src_c/IMB_parse_name_mpi1.c +++ b/src_c/IMB_parse_name_mpi1.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_parse_name_nbc.c b/src_c/IMB_parse_name_nbc.c index a05f69da..cb9d8aeb 100644 --- a/src_c/IMB_parse_name_nbc.c +++ b/src_c/IMB_parse_name_nbc.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_parse_name_rma.c b/src_c/IMB_parse_name_rma.c index fa5da786..b814ecb2 100644 --- a/src_c/IMB_parse_name_rma.c +++ b/src_c/IMB_parse_name_rma.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_pingping.c b/src_c/IMB_pingping.c index aeea80d7..d1baf783 100644 --- a/src_c/IMB_pingping.c +++ b/src_c/IMB_pingping.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_pingpong.c b/src_c/IMB_pingpong.c index 0b0b18a8..024f023a 100644 --- a/src_c/IMB_pingpong.c +++ b/src_c/IMB_pingpong.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_prototypes.h b/src_c/IMB_prototypes.h index 999ed028..e94a0bd0 100644 --- a/src_c/IMB_prototypes.h +++ b/src_c/IMB_prototypes.h @@ -3,7 +3,7 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_read.c b/src_c/IMB_read.c index ef1ba720..011d2af7 100644 --- a/src_c/IMB_read.c +++ b/src_c/IMB_read.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_reduce.c b/src_c/IMB_reduce.c index 0907f76f..0db3e3ff 100644 --- a/src_c/IMB_reduce.c +++ b/src_c/IMB_reduce.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_reduce_local.c b/src_c/IMB_reduce_local.c index b11cbaf8..c2f0eea1 100644 --- a/src_c/IMB_reduce_local.c +++ b/src_c/IMB_reduce_local.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_reduce_scatter.c b/src_c/IMB_reduce_scatter.c index 2ae5f92f..4b7a9e26 100644 --- a/src_c/IMB_reduce_scatter.c +++ b/src_c/IMB_reduce_scatter.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_reduce_scatter_block.c b/src_c/IMB_reduce_scatter_block.c index 74a338f9..1d2f17cf 100644 --- a/src_c/IMB_reduce_scatter_block.c +++ b/src_c/IMB_reduce_scatter_block.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_rma_atomic.c b/src_c/IMB_rma_atomic.c index c3052a9d..3f54a827 100644 --- a/src_c/IMB_rma_atomic.c +++ b/src_c/IMB_rma_atomic.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_rma_get.c b/src_c/IMB_rma_get.c index 6a19ff11..56756bf8 100644 --- a/src_c/IMB_rma_get.c +++ b/src_c/IMB_rma_get.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_rma_put.c b/src_c/IMB_rma_put.c index 402026c3..cb25e7fb 100644 --- a/src_c/IMB_rma_put.c +++ b/src_c/IMB_rma_put.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_scatter.c b/src_c/IMB_scatter.c index 6efecc8f..5a1c0b5d 100644 --- a/src_c/IMB_scatter.c +++ b/src_c/IMB_scatter.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_scatterv.c b/src_c/IMB_scatterv.c index 1e63d5ef..54615d1f 100644 --- a/src_c/IMB_scatterv.c +++ b/src_c/IMB_scatterv.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_sendrecv.c b/src_c/IMB_sendrecv.c index 6c092057..187ac830 100644 --- a/src_c/IMB_sendrecv.c +++ b/src_c/IMB_sendrecv.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_settings.h b/src_c/IMB_settings.h index a06b395b..9be7f037 100644 --- a/src_c/IMB_settings.h +++ b/src_c/IMB_settings.h @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_settings_io.h b/src_c/IMB_settings_io.h index 0e0cfbf2..f9e56398 100644 --- a/src_c/IMB_settings_io.h +++ b/src_c/IMB_settings_io.h @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_strgs.c b/src_c/IMB_strgs.c index 49c9902f..705754ad 100644 --- a/src_c/IMB_strgs.c +++ b/src_c/IMB_strgs.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_user_set_info.c b/src_c/IMB_user_set_info.c index fc692d2e..af5d5d0d 100644 --- a/src_c/IMB_user_set_info.c +++ b/src_c/IMB_user_set_info.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_utils.c b/src_c/IMB_utils.c index 2ddb62e8..7c5d8b1d 100644 --- a/src_c/IMB_utils.c +++ b/src_c/IMB_utils.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_warm_up.c b/src_c/IMB_warm_up.c index e1f48b86..7763945a 100644 --- a/src_c/IMB_warm_up.c +++ b/src_c/IMB_warm_up.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_window.c b/src_c/IMB_window.c index 8f5424f1..7c62a634 100644 --- a/src_c/IMB_window.c +++ b/src_c/IMB_window.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/IMB_write.c b/src_c/IMB_write.c index adc143f6..3bbee001 100644 --- a/src_c/IMB_write.c +++ b/src_c/IMB_write.c @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2003-2020 Intel Corporation. * + * Copyright 2003-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/Makefile b/src_c/Makefile index 7184e87f..cb74c0ee 100644 --- a/src_c/Makefile +++ b/src_c/Makefile @@ -1,6 +1,6 @@ #***************************************************************************** # * * -# * Copyright 2016-2020 Intel Corporation. * +# * Copyright 2016-2021 Intel Corporation. * # * * # ***************************************************************************** # diff --git a/src_c/Makefile_win b/src_c/Makefile_win index 4f0e2596..d412810c 100644 --- a/src_c/Makefile_win +++ b/src_c/Makefile_win @@ -1,6 +1,6 @@ #***************************************************************************** # * * -# * Copyright 2016-2020 Intel Corporation. * +# * Copyright 2016-2021 Intel Corporation. * # * * # ***************************************************************************** # diff --git a/src_c/P2P/Makefile b/src_c/P2P/Makefile index 0c47a14d..3be9fa94 100644 --- a/src_c/P2P/Makefile +++ b/src_c/P2P/Makefile @@ -1,6 +1,6 @@ # ***************************************************************************** # * * -# * Copyright 2016-2020 Intel Corporation. * +# * Copyright 2016-2021 Intel Corporation. * # * * # ***************************************************************************** # diff --git a/src_c/P2P/imb_p2p.c b/src_c/P2P/imb_p2p.c index 3680a09a..adaa6103 100644 --- a/src_c/P2P/imb_p2p.c +++ b/src_c/P2P/imb_p2p.c @@ -1,7 +1,7 @@ /* ***************************************************************************** * * -* Copyright 2016-2020 Intel Corporation. * +* Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** @@ -56,7 +56,7 @@ goods and services. #define INFO_BUFFER_SIZE 32767 #endif -static const char * VERSION = "2021.1"; +static const char * VERSION = "2021.2"; FILE* unit = NULL; imb_p2p_configuration_t imb_p2p_config = { 0 }; diff --git a/src_c/P2P/imb_p2p.h b/src_c/P2P/imb_p2p.h index f5eb18fe..de53ba8b 100644 --- a/src_c/P2P/imb_p2p.h +++ b/src_c/P2P/imb_p2p.h @@ -1,7 +1,7 @@ /* ***************************************************************************** * * -* Copyright 2016-2020 Intel Corporation. * +* Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/P2P/imb_p2p_birandom.c b/src_c/P2P/imb_p2p_birandom.c index 3f3bfb07..e34eab74 100644 --- a/src_c/P2P/imb_p2p_birandom.c +++ b/src_c/P2P/imb_p2p_birandom.c @@ -1,7 +1,7 @@ /* ***************************************************************************** * * -* Copyright 2016-2020 Intel Corporation. * +* Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/P2P/imb_p2p_corandom.c b/src_c/P2P/imb_p2p_corandom.c index eab1b790..71d2a0db 100644 --- a/src_c/P2P/imb_p2p_corandom.c +++ b/src_c/P2P/imb_p2p_corandom.c @@ -1,7 +1,7 @@ /* ***************************************************************************** * * -* Copyright 2016-2020 Intel Corporation. * +* Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/P2P/imb_p2p_pingping.c b/src_c/P2P/imb_p2p_pingping.c index c9ed2d80..e38c7dc0 100644 --- a/src_c/P2P/imb_p2p_pingping.c +++ b/src_c/P2P/imb_p2p_pingping.c @@ -1,7 +1,7 @@ /* ***************************************************************************** * * -* Copyright 2016-2020 Intel Corporation. * +* Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/P2P/imb_p2p_pingpong.c b/src_c/P2P/imb_p2p_pingpong.c index 4f490371..dc53d8e2 100644 --- a/src_c/P2P/imb_p2p_pingpong.c +++ b/src_c/P2P/imb_p2p_pingpong.c @@ -1,7 +1,7 @@ /* ***************************************************************************** * * -* Copyright 2016-2020 Intel Corporation. * +* Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/P2P/imb_p2p_sendrecv_replace.c b/src_c/P2P/imb_p2p_sendrecv_replace.c index c44918f9..0c121ead 100644 --- a/src_c/P2P/imb_p2p_sendrecv_replace.c +++ b/src_c/P2P/imb_p2p_sendrecv_replace.c @@ -1,7 +1,7 @@ /* ***************************************************************************** * * -* Copyright 2016-2020 Intel Corporation. * +* Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/P2P/imb_p2p_stencil2d.c b/src_c/P2P/imb_p2p_stencil2d.c index 69f626dc..0d97f976 100644 --- a/src_c/P2P/imb_p2p_stencil2d.c +++ b/src_c/P2P/imb_p2p_stencil2d.c @@ -1,7 +1,7 @@ /* ***************************************************************************** * * -* Copyright 2016-2020 Intel Corporation. * +* Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/P2P/imb_p2p_stencil3d.c b/src_c/P2P/imb_p2p_stencil3d.c index b1900b49..78b60c02 100644 --- a/src_c/P2P/imb_p2p_stencil3d.c +++ b/src_c/P2P/imb_p2p_stencil3d.c @@ -1,7 +1,7 @@ /* ***************************************************************************** * * -* Copyright 2016-2020 Intel Corporation. * +* Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_c/P2P/imb_p2p_unirandom.c b/src_c/P2P/imb_p2p_unirandom.c index 2959b716..b19cbe7e 100644 --- a/src_c/P2P/imb_p2p_unirandom.c +++ b/src_c/P2P/imb_p2p_unirandom.c @@ -1,7 +1,7 @@ /* ***************************************************************************** * * -* Copyright 2016-2020 Intel Corporation. * +* Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_cpp/EXT/EXT_benchmark.cpp b/src_cpp/EXT/EXT_benchmark.cpp index 778643be..0098704f 100644 --- a/src_cpp/EXT/EXT_benchmark.cpp +++ b/src_cpp/EXT/EXT_benchmark.cpp @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_cpp/EXT/EXT_suite.cpp b/src_cpp/EXT/EXT_suite.cpp index f99292de..5be7af2c 100644 --- a/src_cpp/EXT/EXT_suite.cpp +++ b/src_cpp/EXT/EXT_suite.cpp @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** @@ -326,6 +326,12 @@ template <> bool BenchmarkSuite::declare_args(args_parser &parser, std:: "\n" "Default:\n" "on\n"); + parser.add("msg_pause", false).set_caption("on or off"). + set_description( + "Use additional pause between different benchmarks or messages" + "\n" + "Default:\n" + "off\n"); parser.set_default_current_group(); return true; } @@ -493,6 +499,11 @@ template <> bool BenchmarkSuite::prepare(const args_parser &parser, cons c_info.warm_up = 0; } + // msg_pause + if (parser.get("msg_pause") == true) { + c_info.msg_pause = 1; + } + #endif #if BASIC_INPUT_EXPERIMENT == 0 diff --git a/src_cpp/EXT/Makefile.EXT.mk b/src_cpp/EXT/Makefile.EXT.mk index a137ab97..bb37c3da 100644 --- a/src_cpp/EXT/Makefile.EXT.mk +++ b/src_cpp/EXT/Makefile.EXT.mk @@ -1,6 +1,6 @@ #***************************************************************************** # * * -# * Copyright 2016-2020 Intel Corporation. * +# * Copyright 2016-2021 Intel Corporation. * # * * # ***************************************************************************** # diff --git a/src_cpp/EXT/Makefile_win.EXT.mk b/src_cpp/EXT/Makefile_win.EXT.mk index c866033f..a0d06e24 100644 --- a/src_cpp/EXT/Makefile_win.EXT.mk +++ b/src_cpp/EXT/Makefile_win.EXT.mk @@ -1,6 +1,6 @@ #***************************************************************************** # * * -# * Copyright 2016-2020 Intel Corporation. * +# * Copyright 2016-2021 Intel Corporation. * # * * # ***************************************************************************** # diff --git a/src_cpp/HALO/Makefile.HALO.mk b/src_cpp/HALO/Makefile.HALO.mk index 372d1c4a..1245b20f 100644 --- a/src_cpp/HALO/Makefile.HALO.mk +++ b/src_cpp/HALO/Makefile.HALO.mk @@ -1,6 +1,6 @@ #***************************************************************************** # * * -# * Copyright 2016-2020 Intel Corporation. * +# * Copyright 2016-2021 Intel Corporation. * # * * # ***************************************************************************** # diff --git a/src_cpp/HALO/halo_benchmark.cpp b/src_cpp/HALO/halo_benchmark.cpp index 076697cc..dc5a46da 100644 --- a/src_cpp/HALO/halo_benchmark.cpp +++ b/src_cpp/HALO/halo_benchmark.cpp @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_cpp/HALO/halo_benchmark.h b/src_cpp/HALO/halo_benchmark.h index f88b0c1d..7b19312e 100644 --- a/src_cpp/HALO/halo_benchmark.h +++ b/src_cpp/HALO/halo_benchmark.h @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_cpp/HALO/halo_suite.cpp b/src_cpp/HALO/halo_suite.cpp index a84674b1..e624e209 100644 --- a/src_cpp/HALO/halo_suite.cpp +++ b/src_cpp/HALO/halo_suite.cpp @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_cpp/IO/IO_benchmark.cpp b/src_cpp/IO/IO_benchmark.cpp index f8bb6105..0c6af105 100644 --- a/src_cpp/IO/IO_benchmark.cpp +++ b/src_cpp/IO/IO_benchmark.cpp @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_cpp/IO/IO_suite.cpp b/src_cpp/IO/IO_suite.cpp index 89023ca4..e7a7bc57 100644 --- a/src_cpp/IO/IO_suite.cpp +++ b/src_cpp/IO/IO_suite.cpp @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** @@ -328,6 +328,12 @@ template <> bool BenchmarkSuite::declare_args(args_parser &parser, std::o "\n" "Default:\n" "on\n"); + parser.add("msg_pause", false).set_caption("on or off"). + set_description( + "Use additional pause between different benchmarks or messages" + "\n" + "Default:\n" + "off\n"); parser.set_default_current_group(); return true; } @@ -496,6 +502,11 @@ template <> bool BenchmarkSuite::prepare(const args_parser &parser, const } // IMB_cpu_exploit(TARGET_CPU_SECS, 1); + // msg_pause + if (parser.get("msg_pause") == true) { + c_info.msg_pause = 1; + } + #endif #if BASIC_INPUT_EXPERIMENT == 0 diff --git a/src_cpp/IO/Makefile.IO.mk b/src_cpp/IO/Makefile.IO.mk index efdd1ee3..da4c6d09 100644 --- a/src_cpp/IO/Makefile.IO.mk +++ b/src_cpp/IO/Makefile.IO.mk @@ -1,6 +1,6 @@ #***************************************************************************** # * * -# * Copyright 2016-2020 Intel Corporation. * +# * Copyright 2016-2021 Intel Corporation. * # * * # ***************************************************************************** # diff --git a/src_cpp/IO/Makefile_win.IO.mk b/src_cpp/IO/Makefile_win.IO.mk index 35c54e12..e7d75248 100644 --- a/src_cpp/IO/Makefile_win.IO.mk +++ b/src_cpp/IO/Makefile_win.IO.mk @@ -1,6 +1,6 @@ #***************************************************************************** # * * -# * Copyright 2016-2020 Intel Corporation. * +# * Copyright 2016-2021 Intel Corporation. * # * * # ***************************************************************************** # diff --git a/src_cpp/MPI1/MPI1_benchmark.cpp b/src_cpp/MPI1/MPI1_benchmark.cpp index 3d61d661..75765a6c 100644 --- a/src_cpp/MPI1/MPI1_benchmark.cpp +++ b/src_cpp/MPI1/MPI1_benchmark.cpp @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_cpp/MPI1/MPI1_suite.cpp b/src_cpp/MPI1/MPI1_suite.cpp index fd8dc3ae..dd908f8e 100644 --- a/src_cpp/MPI1/MPI1_suite.cpp +++ b/src_cpp/MPI1/MPI1_suite.cpp @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** @@ -181,11 +181,11 @@ template <> bool BenchmarkSuite::declare_args(args_parser &parser, std: "\n" "Default:\n" "multi off\n"); - parser.add("window_size", 64).set_caption("WindowSize"). + parser.add("window_size", 256).set_caption("WindowSize"). set_description( "Set uniband/biband send/recv window size\n" "\n" - "Default: 64"); + "Default: 256"); parser.add_vector("off_cache", "-1.0,0.0", ',', 1, 2). set_caption("cache_size[,cache_line_size]"). set_mode(args_parser::option::APPLY_DEFAULTS_ONLY_WHEN_MISSING). @@ -379,6 +379,26 @@ template <> bool BenchmarkSuite::declare_args(args_parser &parser, std: "\n" "Default:\n" "on\n"); + parser.add("msg_pause", false).set_caption("on or off"). + set_description( + "Use additional pause between different benchmarks or messages" + "\n" + "Default:\n" + "off\n"); +#ifdef GPU_ENABLE + parser.add("mem_alloc_type", "cpu").set_caption("buffer type"). + set_description( + "The argument after -mem_alloc_type is a one from possible strings,\n" + "Specifying that type will be used:\n" + "device, host, shared, cpu\n" + "\n" + "Example:\n" + "-mem_alloc_type device\n" + "\n" + "Default:\n" + "cpu\n"); +#endif //GPU_ENABLE + parser.set_default_current_group(); return true; } @@ -685,6 +705,27 @@ template <> bool BenchmarkSuite::prepare(const args_parser &parser, con ITERATIONS.numiters = (int *)malloc(c_info.n_lens * sizeof(int)); } + // msg_pause + if (parser.get("msg_pause") == true) { + c_info.msg_pause = 1; + } + +#ifdef GPU_ENABLE + // mem_alloc_type + string mem_alloc_type = parser.get("mem_alloc_type"); + if (mem_alloc_type == "cpu") { + c_info.mem_alloc_type = MAT_CPU; + } + else if (mem_alloc_type == "device") { + c_info.mem_alloc_type = MAT_DEVICE; + } + else if (mem_alloc_type == "host") { + c_info.mem_alloc_type = MAT_HOST; + } + else if (mem_alloc_type == "shared") { + c_info.mem_alloc_type = MAT_SHARED; + } +#endif //GPU_ENABLE #endif #if BASIC_INPUT_EXPERIMENT == 0 diff --git a/src_cpp/MPI1/Makefile.MPI1.mk b/src_cpp/MPI1/Makefile.MPI1.mk index 96bcdb15..f9ac2232 100644 --- a/src_cpp/MPI1/Makefile.MPI1.mk +++ b/src_cpp/MPI1/Makefile.MPI1.mk @@ -1,6 +1,6 @@ #***************************************************************************** # * * -# * Copyright 2016-2020 Intel Corporation. * +# * Copyright 2016-2021 Intel Corporation. * # * * # ***************************************************************************** # @@ -52,7 +52,7 @@ include helpers/Makefile.*.mk override CPPFLAGS += -DMPI1 -BECHMARK_SUITE_SRC += MPI1/MPI1_suite.cpp MPI1/MPI1_benchmark.cpp +BECHMARK_SUITE_LOCAL_SRC += MPI1/MPI1_suite.cpp MPI1/MPI1_benchmark.cpp C_SRC = $(C_SRC_DIR)/IMB_allgather.c \ $(C_SRC_DIR)/IMB_allgatherv.c \ $(C_SRC_DIR)/IMB_allreduce.c \ @@ -86,9 +86,26 @@ $(C_SRC_DIR)/IMB_scatterv.c \ $(C_SRC_DIR)/IMB_sendrecv.c \ $(C_SRC_DIR)/IMB_strgs.c \ $(C_SRC_DIR)/IMB_utils.c \ -$(C_SRC_DIR)/IMB_warm_up.c -C_OBJ=$(subst $(C_SRC_DIR),MPI1,$(C_SRC:.c=.o)) +$(C_SRC_DIR)/IMB_warm_up.c +ifdef GPU_ENABLE +override C_SRC += $(C_SRC_DIR)/IMB_l0.c +override LDFLAGS += -lze_loader +override CPPFLAGS += -DGPU_ENABLE +SUBDIR:=GPU +else +SUBDIR:=CPU +endif + +C_OBJ=$(subst $(C_SRC_DIR),MPI1/$(SUBDIR),$(C_SRC:.c=.o)) ADDITIONAL_OBJ += $(C_OBJ) +BECHMARK_SUITE_LOCAL_OBJ=$(subst MPI1/,MPI1/$(SUBDIR)/,$(BECHMARK_SUITE_LOCAL_SRC:.cpp=.o)) +ADDITIONAL_OBJ += $(BECHMARK_SUITE_LOCAL_OBJ) -MPI1/%.o: $(C_SRC_DIR)/%.c +MPI1/$(SUBDIR)/%.o: $(C_SRC_DIR)/%.c $(SUBDIR) $(CC) $(CFLAGS) $(CPPFLAGS) -DMPI1 -c -o $@ $< + +MPI1/$(SUBDIR)/%.o: MPI1/%.cpp $(SUBDIR) + $(CXX) $(CPPFLAGS) $(CXXFLAGS) -DMPI1 -c -o $@ $< + +${SUBDIR}: + mkdir -p MPI1/${SUBDIR} \ No newline at end of file diff --git a/src_cpp/MPI1/Makefile_win.MPI1.mk b/src_cpp/MPI1/Makefile_win.MPI1.mk index 4dc3376f..487058a3 100644 --- a/src_cpp/MPI1/Makefile_win.MPI1.mk +++ b/src_cpp/MPI1/Makefile_win.MPI1.mk @@ -1,6 +1,6 @@ #***************************************************************************** # * * -# * Copyright 2016-2020 Intel Corporation. * +# * Copyright 2016-2021 Intel Corporation. * # * * # ***************************************************************************** # diff --git a/src_cpp/MT/MT_benchmark.cpp b/src_cpp/MT/MT_benchmark.cpp index 2ce5706e..97cb481e 100644 --- a/src_cpp/MT/MT_benchmark.cpp +++ b/src_cpp/MT/MT_benchmark.cpp @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_cpp/MT/MT_benchmark.h b/src_cpp/MT/MT_benchmark.h index 5a369ef8..97ffc230 100644 --- a/src_cpp/MT/MT_benchmark.h +++ b/src_cpp/MT/MT_benchmark.h @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_cpp/MT/MT_suite.cpp b/src_cpp/MT/MT_suite.cpp index 7bdb9436..15457e90 100644 --- a/src_cpp/MT/MT_suite.cpp +++ b/src_cpp/MT/MT_suite.cpp @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** @@ -196,7 +196,7 @@ template <> bool BenchmarkSuite::prepare(const args_parser &parser, MPI_Comm_rank(MPI_COMM_WORLD, &rank); if (rank == 0 && !noheader) { output << "#------------------------------------------------------------------" << std::endl; - output << "# Intel(R) MPI Benchmarks " << "2021.1" << ", MT part " << std::endl; + output << "# Intel(R) MPI Benchmarks " << "2021.2" << ", MT part " << std::endl; output << "#------------------------------------------------------------------" << std::endl; output << "#" << std::endl; } diff --git a/src_cpp/MT/MT_types.h b/src_cpp/MT/MT_types.h index 69617d51..fae8ea3b 100644 --- a/src_cpp/MT/MT_types.h +++ b/src_cpp/MT/MT_types.h @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_cpp/MT/Makefile.MT.mk b/src_cpp/MT/Makefile.MT.mk index 35028a36..031c63bc 100644 --- a/src_cpp/MT/Makefile.MT.mk +++ b/src_cpp/MT/Makefile.MT.mk @@ -1,6 +1,6 @@ #***************************************************************************** # * * -# * Copyright 2016-2020 Intel Corporation. * +# * Copyright 2016-2021 Intel Corporation. * # * * # ***************************************************************************** # diff --git a/src_cpp/MT/Makefile_win.MT.mk b/src_cpp/MT/Makefile_win.MT.mk index 7d954e16..81863e19 100644 --- a/src_cpp/MT/Makefile_win.MT.mk +++ b/src_cpp/MT/Makefile_win.MT.mk @@ -1,6 +1,6 @@ #***************************************************************************** # * * -# * Copyright 2016-2020 Intel Corporation. * +# * Copyright 2016-2021 Intel Corporation. * # * * # ***************************************************************************** # diff --git a/src_cpp/Makefile b/src_cpp/Makefile index beed550d..4a3fce1c 100644 --- a/src_cpp/Makefile +++ b/src_cpp/Makefile @@ -1,6 +1,6 @@ #***************************************************************************** # * * -# * Copyright 2016-2020 Intel Corporation. * +# * Copyright 2016-2021 Intel Corporation. * # * * # ***************************************************************************** # @@ -77,8 +77,8 @@ ifeq ($(origin CXX),default) CXX=mpiicpc endif override CPPFLAGS += -I. -override CFLAGS += -O0 -Wall -Wno-long-long -override CXXFLAGS += -O0 -Wall -Wextra -pedantic -Wno-long-long +override CFLAGS += -g -O0 -Wall -Wno-long-long +override CXXFLAGS += -g -O0 -Wall -Wextra -pedantic -Wno-long-long ifdef WITH_OPENMP override CFLAGS += -fopenmp override CXXFLAGS += -fopenmp diff --git a/src_cpp/Makefile_win b/src_cpp/Makefile_win index e2f18977..08e724f3 100644 --- a/src_cpp/Makefile_win +++ b/src_cpp/Makefile_win @@ -1,6 +1,6 @@ #***************************************************************************** # * * -# * Copyright 2016-2020 Intel Corporation. * +# * Copyright 2016-2021 Intel Corporation. * # * * # ***************************************************************************** # diff --git a/src_cpp/NBC/Makefile.NBC.mk b/src_cpp/NBC/Makefile.NBC.mk index c08ad9dc..f092d699 100644 --- a/src_cpp/NBC/Makefile.NBC.mk +++ b/src_cpp/NBC/Makefile.NBC.mk @@ -1,6 +1,6 @@ #***************************************************************************** # * * -# * Copyright 2016-2020 Intel Corporation. * +# * Copyright 2016-2021 Intel Corporation. * # * * # ***************************************************************************** # diff --git a/src_cpp/NBC/Makefile_win.NBC.mk b/src_cpp/NBC/Makefile_win.NBC.mk index d5581a21..ae304f65 100644 --- a/src_cpp/NBC/Makefile_win.NBC.mk +++ b/src_cpp/NBC/Makefile_win.NBC.mk @@ -1,6 +1,6 @@ #***************************************************************************** # * * -# * Copyright 2016-2020 Intel Corporation. * +# * Copyright 2016-2021 Intel Corporation. * # * * # ***************************************************************************** # diff --git a/src_cpp/NBC/NBC_benchmark.cpp b/src_cpp/NBC/NBC_benchmark.cpp index bf01e89a..cf68cbe8 100644 --- a/src_cpp/NBC/NBC_benchmark.cpp +++ b/src_cpp/NBC/NBC_benchmark.cpp @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_cpp/NBC/NBC_suite.cpp b/src_cpp/NBC/NBC_suite.cpp index 5e27bc1b..b3e13b1c 100644 --- a/src_cpp/NBC/NBC_suite.cpp +++ b/src_cpp/NBC/NBC_suite.cpp @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** @@ -336,6 +336,12 @@ template <> bool BenchmarkSuite::declare_args(args_parser &parser, std:: "\n" "Default:\n" "on\n"); + parser.add("msg_pause", false).set_caption("on or off"). + set_description( + "Use additional pause between different benchmarks or messages" + "\n" + "Default:\n" + "off\n"); parser.set_default_current_group(); return true; } @@ -507,6 +513,11 @@ template <> bool BenchmarkSuite::prepare(const args_parser &parser, cons ITERATIONS.numiters = (int *)malloc(c_info.n_lens * sizeof(int)); } + // msg_pause + if (parser.get("msg_pause") == true) { + c_info.msg_pause = 1; + } + #endif #if BASIC_INPUT_EXPERIMENT == 0 diff --git a/src_cpp/RMA/Makefile.RMA.mk b/src_cpp/RMA/Makefile.RMA.mk index a32951fe..af9d850a 100644 --- a/src_cpp/RMA/Makefile.RMA.mk +++ b/src_cpp/RMA/Makefile.RMA.mk @@ -1,6 +1,6 @@ #***************************************************************************** # * * -# * Copyright 2016-2020 Intel Corporation. * +# * Copyright 2016-2021 Intel Corporation. * # * * # ***************************************************************************** # diff --git a/src_cpp/RMA/Makefile_win.RMA.mk b/src_cpp/RMA/Makefile_win.RMA.mk index c878d698..f23a46f2 100644 --- a/src_cpp/RMA/Makefile_win.RMA.mk +++ b/src_cpp/RMA/Makefile_win.RMA.mk @@ -1,6 +1,6 @@ #***************************************************************************** # * * -# * Copyright 2016-2020 Intel Corporation. * +# * Copyright 2016-2021 Intel Corporation. * # * * # ***************************************************************************** # diff --git a/src_cpp/RMA/RMA_benchmark.cpp b/src_cpp/RMA/RMA_benchmark.cpp index 1f96f1c9..abfe26d5 100644 --- a/src_cpp/RMA/RMA_benchmark.cpp +++ b/src_cpp/RMA/RMA_benchmark.cpp @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_cpp/RMA/RMA_suite.cpp b/src_cpp/RMA/RMA_suite.cpp index 4de96b08..0b743164 100644 --- a/src_cpp/RMA/RMA_suite.cpp +++ b/src_cpp/RMA/RMA_suite.cpp @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** @@ -337,6 +337,12 @@ template <> bool BenchmarkSuite::declare_args(args_parser &parser, std:: "\n" "Default:\n" "on\n"); + parser.add("msg_pause", false).set_caption("on or off"). + set_description( + "Use additional pause between different benchmarks or messages" + "\n" + "Default:\n" + "off\n"); parser.set_default_current_group(); return true; } @@ -510,6 +516,11 @@ template <> bool BenchmarkSuite::prepare(const args_parser &parser, cons ITERATIONS.numiters = (int *)malloc(c_info.n_lens * sizeof(int)); } + // msg_pause + if (parser.get("msg_pause") == true) { + c_info.msg_pause = 1; + } + #endif #if BASIC_INPUT_EXPERIMENT == 0 diff --git a/src_cpp/any.h b/src_cpp/any.h index d4d6f2fb..7a2806ae 100644 --- a/src_cpp/any.h +++ b/src_cpp/any.h @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_cpp/args_parser.cpp b/src_cpp/args_parser.cpp index d6575c37..2e5c1d12 100644 --- a/src_cpp/args_parser.cpp +++ b/src_cpp/args_parser.cpp @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_cpp/args_parser.h b/src_cpp/args_parser.h index e4249676..ef3c0375 100644 --- a/src_cpp/args_parser.h +++ b/src_cpp/args_parser.h @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_cpp/args_parser_utests.cpp b/src_cpp/args_parser_utests.cpp index 6b25e7c6..cc16c091 100644 --- a/src_cpp/args_parser_utests.cpp +++ b/src_cpp/args_parser_utests.cpp @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_cpp/benchmark.h b/src_cpp/benchmark.h index fd2bbcc6..fd4ceb1c 100644 --- a/src_cpp/benchmark.h +++ b/src_cpp/benchmark.h @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_cpp/benchmark_suite.h b/src_cpp/benchmark_suite.h index eaa9b194..1d8d2541 100644 --- a/src_cpp/benchmark_suite.h +++ b/src_cpp/benchmark_suite.h @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_cpp/benchmark_suite_base.h b/src_cpp/benchmark_suite_base.h index a7363e3b..046a6798 100644 --- a/src_cpp/benchmark_suite_base.h +++ b/src_cpp/benchmark_suite_base.h @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_cpp/benchmark_suites_collection.cpp b/src_cpp/benchmark_suites_collection.cpp index 1830e6b3..cdd6a975 100644 --- a/src_cpp/benchmark_suites_collection.cpp +++ b/src_cpp/benchmark_suites_collection.cpp @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_cpp/benchmark_suites_collection.h b/src_cpp/benchmark_suites_collection.h index 3d1cd478..baa12a35 100644 --- a/src_cpp/benchmark_suites_collection.h +++ b/src_cpp/benchmark_suites_collection.h @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_cpp/example/Makefile.example.mk b/src_cpp/example/Makefile.example.mk index 4a06cbea..9838473e 100644 --- a/src_cpp/example/Makefile.example.mk +++ b/src_cpp/example/Makefile.example.mk @@ -1,6 +1,6 @@ #***************************************************************************** # * * -# * Copyright 2016-2020 Intel Corporation. * +# * Copyright 2016-2021 Intel Corporation. * # * * # ***************************************************************************** # diff --git a/src_cpp/example/example_benchmark1.cpp b/src_cpp/example/example_benchmark1.cpp index 8b0d3904..563f4ed1 100644 --- a/src_cpp/example/example_benchmark1.cpp +++ b/src_cpp/example/example_benchmark1.cpp @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_cpp/example/example_benchmark2.cpp b/src_cpp/example/example_benchmark2.cpp index 39cd5b30..5fec3e9c 100644 --- a/src_cpp/example/example_benchmark2.cpp +++ b/src_cpp/example/example_benchmark2.cpp @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_cpp/example/example_benchmark3.cpp b/src_cpp/example/example_benchmark3.cpp index 2ea6bed8..01534d26 100644 --- a/src_cpp/example/example_benchmark3.cpp +++ b/src_cpp/example/example_benchmark3.cpp @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_cpp/example/example_benchmark4.cpp b/src_cpp/example/example_benchmark4.cpp index 6f30185f..26a7b235 100644 --- a/src_cpp/example/example_benchmark4.cpp +++ b/src_cpp/example/example_benchmark4.cpp @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_cpp/example/example_benchmark5.cpp b/src_cpp/example/example_benchmark5.cpp index da9cd16a..4ee6180a 100644 --- a/src_cpp/example/example_benchmark5.cpp +++ b/src_cpp/example/example_benchmark5.cpp @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_cpp/helpers/Makefile.helpers.mk b/src_cpp/helpers/Makefile.helpers.mk index 5a03ddd4..b1ff3b57 100644 --- a/src_cpp/helpers/Makefile.helpers.mk +++ b/src_cpp/helpers/Makefile.helpers.mk @@ -1,6 +1,6 @@ #***************************************************************************** # * * -# * Copyright 2016-2020 Intel Corporation. * +# * Copyright 2016-2021 Intel Corporation. * # * * # ***************************************************************************** # diff --git a/src_cpp/helpers/Makefile_win.helpers.mk b/src_cpp/helpers/Makefile_win.helpers.mk index 8c0736cb..9367960e 100644 --- a/src_cpp/helpers/Makefile_win.helpers.mk +++ b/src_cpp/helpers/Makefile_win.helpers.mk @@ -1,6 +1,6 @@ #***************************************************************************** # * * -# * Copyright 2016-2020 Intel Corporation. * +# * Copyright 2016-2021 Intel Corporation. * # * * # ***************************************************************************** # diff --git a/src_cpp/helpers/helper_IMB_functions.h b/src_cpp/helpers/helper_IMB_functions.h index 456638aa..f33506d1 100644 --- a/src_cpp/helpers/helper_IMB_functions.h +++ b/src_cpp/helpers/helper_IMB_functions.h @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_cpp/helpers/original_benchmark.h b/src_cpp/helpers/original_benchmark.h index c45d0023..2a4fab06 100644 --- a/src_cpp/helpers/original_benchmark.h +++ b/src_cpp/helpers/original_benchmark.h @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** @@ -215,7 +215,8 @@ class OriginalBenchmark : public Benchmark { fn_ptr(&c_info, size, &ITERATIONS, BMODE, time); t = MPI_Wtime() - t; MPI_Barrier(MPI_COMM_WORLD); - SLEEP(t); + if (c_info.msg_pause == 1) + SLEEP(t); } IMB_output(&c_info, BMark, BMODE, glob.header, size, &ITERATIONS, time); IMB_close_transfer(&c_info, BMark, size); diff --git a/src_cpp/imb.cpp b/src_cpp/imb.cpp index 6f058a5f..1d01955b 100644 --- a/src_cpp/imb.cpp +++ b/src_cpp/imb.cpp @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** @@ -70,7 +70,7 @@ int main(int argc, char * *argv) bool no_mpi_init_flag = true; int return_value = 0; int rank = 0, size = 0; - const char *program_name = "Intel(R) MPI Benchmarks 2021.1"; + const char *program_name = "Intel(R) MPI Benchmarks 2021.2"; std::ostringstream output; // Some unit tests for args parser @@ -329,9 +329,6 @@ int main(int argc, char * *argv) it != benchmarks_to_run.end(); ++it) { string bn = *it; - if ((bn == "Uniband" || bn == "Biband") && rank == 0) { - std::cout << "Warning: " << bn << " window size will be changed in future. To set it use -window_size . Default is 64" << std::endl; - } smart_ptr b = BenchmarkSuitesCollection::create(*it); if (b.get() == NULL) { diff --git a/src_cpp/scope.cpp b/src_cpp/scope.cpp index e9bc72fe..014a2643 100644 --- a/src_cpp/scope.cpp +++ b/src_cpp/scope.cpp @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_cpp/scope.h b/src_cpp/scope.h index c3cf79ca..2de12737 100644 --- a/src_cpp/scope.h +++ b/src_cpp/scope.h @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_cpp/smart_ptr.h b/src_cpp/smart_ptr.h index 5355d1a9..1c150f53 100644 --- a/src_cpp/smart_ptr.h +++ b/src_cpp/smart_ptr.h @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * ***************************************************************************** diff --git a/src_cpp/utils.h b/src_cpp/utils.h index cb880a7a..a639280a 100644 --- a/src_cpp/utils.h +++ b/src_cpp/utils.h @@ -1,6 +1,6 @@ /***************************************************************************** * * - * Copyright 2016-2020 Intel Corporation. * + * Copyright 2016-2021 Intel Corporation. * * * *****************************************************************************