[Verifier] Duplicated Predecessors of BasicBlock can pass verifier

[x14ngch3n]

IR below is generated with LLVM-3.6, this BB (block_1645788) has three duplicated predecessors (block_1645730) and its PHINode has three duplicated incoming values ( [ %tmp41218, %block_1645730 ] ). This BB is actually a switch case, and the duplicated predecessors are where the SwitchInst is located, the duplicated predecessors is because different cases fall through the same block.

block_1645788:                                    ; preds = %bb31747, %block_164577c, %block_1645730, %block_1645730, %block_1645730
  %tmp41324 = phi i64 [ %tmp31748, %bb31747 ], [ %tmp41323, %block_164577c ], [ %tmp41218, %block_1645730 ], [ %tmp41218, %block_1645730 ], [ %tmp41218, %block_1645730 ], !asm !165
  %tmp41325 = phi i64 [ %tmp41318, %bb31747 ], [ %tmp41318, %block_164577c ], [ %tmp31712, %block_1645730 ], [ %tmp31712, %block_1645730 ], [ %tmp31712, %block_1645730 ], !asm !165
  %tmp41326 = phi i64 [ %tmp41319, %bb31747 ], [ %tmp41319, %block_164577c ], [ %tmp41105, %block_1645730 ], [ %tmp41105, %block_1645730 ], [ %tmp41105, %block_1645730 ], !asm !165
  br label %block_164578c, !asm !166

To compare, in the latest LLVM/Clang, the compiler will not generate BB with duplicated predecessors: https://godbolt.org/z/Pxond9x47

*I don't understand why this IR can pass the verifier? Why not just keep one predecessors? * In other words, when can we assume that PHI Node can only have incoming values from distinct incoming blocks (predecessors)?

[efriedma-quic]

The IR rule for PHI nodes is one entry per edge. If a switch has multiple cases that branch to the same block, that counts as multiple edges. So this is working as designed.

There's maybe some argument that it should be one entry per predecessor. Or that switch cases should use a different representation that doesn't require so many duplicate edges. But that's a discussion for Discourse.

[x14ngch3n]

Thanks for you answer, I will move the discussion to discourse.