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AArch64 target unconditionally generates SVE instructions for Armv9-A despite them being optional in the architecture #114987
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AFAIK this was a conscious choice in both LLVM and GCC for -march=armv9-a. The reasoning was that SVE2 is optional in Armv9-A as much as fpsimd are optional in the base Armv8-A ; technically optional but present in practice in all userspace uses and outliers that ship systems without it would have to explicitly account for it in their software stack e.g. through -march=armv9-a+nosve or similar. |
Related discussion in #95478 |
@llvm/issue-subscribers-backend-aarch64 Author: None (willdeacon)
Hi,
As of this commit, specifying an Armv9-A architecture will cause Clang to generate SVE instructions unconditionally. However, these instructions are > // ARM DDI 0487K.a, A2-105 This is particularly problematic when running in a KVM guest environment, as SVE is disabled by default regardless of the underlying hardware capabilities and must be explicitly enabled by the VMM as an opt-in vCPU feature. Consequently, host binaries compiled with In addition to the above, there is a misleading "note" in the Arm ARM about SVE2 (which implies SVE) specifically: > // ARM DDI 0487K.a, A1-59 It's all very fluffy (who knows what a "rich application environment" really means), but the final sentence gives the wrong impression that the PCS requires support for SVE2. Although the PCS does require hardware support for fpsimd (see this footnote), SVE is still correctly referred to as an [optional extension](https://github.com/ARM-software/abi-aa/blob/a82eef0433556b30539c0d4463768d9feb8cfd0b/aapcs64/aapcs64.rst#12appendix-support-for-scalable-vectors). Looking back at an older version of the Arm ARM: > // ARM DDI 0487E.a, A1-51 It seems plausible that the SVE2 text was shoe-horned in a little clumsily and the implication on the PCS was accidental. Anyway, the tl;dr is that I don't think specifying an Armv9-A target architecture should assume the presence of SVE as this is not guaranteed by the CPU architecture and doesn't match the default behaviour of KVM. Instead, I think SVE should be specified explicitly as e.g. |
Hi,
As of this commit, specifying an Armv9-A architecture will cause Clang to generate SVE instructions unconditionally. However, these instructions are
OPTIONAL
from version v8.2 of the architecture, as called out in the Arm ARM:This is particularly problematic when running in a KVM guest environment, as SVE is disabled by default regardless of the underlying hardware capabilities and must be explicitly enabled by the VMM as an opt-in vCPU feature. Consequently, host binaries compiled with
-march=armv9-a
cannot execute in guest context on a v9 CPU unless the VMM enables SVE. Of course, these binaries would also fail to execute on a v9 CPU that chose not to implement SVE at all, but the KVM case is what we have run into in Android.In addition to the above, there is a misleading "note" in the Arm ARM about SVE2 (which implies SVE) specifically:
It's all very fluffy (who knows what a "rich application environment" really means), but the final sentence gives the wrong impression that the PCS requires support for SVE2. Although the PCS does require hardware support for fpsimd (see this footnote), SVE is still correctly referred to as an optional extension.
Looking back at an older version of the Arm ARM:
It seems plausible that the SVE2 text was shoe-horned in a little clumsily and the implication on the PCS was accidental.
Anyway, the tl;dr is that I don't think specifying an Armv9-A target architecture should assume the presence of SVE as this is not guaranteed by the CPU architecture and doesn't match the default behaviour of KVM. Instead, I think SVE should be specified explicitly as e.g.
armv9-a+sve
on the assumption that the user knows that they are generating non-portable binaries.The text was updated successfully, but these errors were encountered: