From 7f6dfe0ceb033426e2e0251ceb258fceb4c07b2a Mon Sep 17 00:00:00 2001 From: Harry Callahan Date: Fri, 12 Jan 2024 13:42:24 +0000 Subject: [PATCH] Override spike from upstream package, change output to spike-ibex-cosim --- pkgs/default.nix | 3 +-- pkgs/ibex-cosim.nix | 31 ------------------------------- pkgs/spike.nix | 19 +++++++++++++++++++ 3 files changed, 20 insertions(+), 33 deletions(-) delete mode 100644 pkgs/ibex-cosim.nix create mode 100644 pkgs/spike.nix diff --git a/pkgs/default.nix b/pkgs/default.nix index 0a83d7c..21d053c 100644 --- a/pkgs/default.nix +++ b/pkgs/default.nix @@ -12,8 +12,7 @@ verilator_ot = import ./verilator {inherit pkgs;}; python_ot = pkgs.callPackage ./python_ot {inherit inputs;}; bazel_ot = pkgs.callPackage ./bazel_ot {}; - ibex-cosim = pkgs.callPackage ./ibex-cosim.nix {}; - + spike-ibex-cosim = pkgs.callPackage ./spike.nix {}; llvm_cheriot = pkgs.callPackage ./llvm_cheriot.nix {}; xmake = import ./xmake.nix {inherit pkgs;}; cheriot-sim = pkgs.callPackage ./cheriot-sim.nix {}; diff --git a/pkgs/ibex-cosim.nix b/pkgs/ibex-cosim.nix deleted file mode 100644 index f13c2fc..0000000 --- a/pkgs/ibex-cosim.nix +++ /dev/null @@ -1,31 +0,0 @@ -# Copyright lowRISC contributors. -# -# SPDX-License-Identifier: MIT -{ - fetchFromGitHub, - stdenv, - dtc, -}: -stdenv.mkDerivation rec { - pname = "ibex-cosim"; - version = "15fbd56"; - - src = fetchFromGitHub { - owner = "lowRISC"; - repo = "riscv-isa-sim"; - # branch ibex_cosim - rev = "15fbd5680e44da699f828c67db15345822a47ef6"; - hash = "sha256-LK/IXmRHrGxaMRudcUYmeZV5eXU8eH7ruIw7kliumdY="; - }; - - nativeBuildInputs = [ - dtc - ]; - - configureFlags = [ - "--enable-commitlog" - "--enable-misaligned" - ]; - - enableParallelBuilding = true; -} diff --git a/pkgs/spike.nix b/pkgs/spike.nix new file mode 100644 index 0000000..a038975 --- /dev/null +++ b/pkgs/spike.nix @@ -0,0 +1,19 @@ +# Copyright lowRISC contributors. +# +# SPDX-License-Identifier: MIT +{ + fetchFromGitHub, + spike, +}: +# The lowRISC Ibex processor (https://github.com/lowRISC/ibex) uses a fork of +# spike as an Instruction Set Simulator (ISS) for a cosimulation testbench in +# its Design Verification (DV) environment. +spike.overrideAttrs (_: prev: { + src = fetchFromGitHub { + owner = "lowRISC"; + repo = "riscv-isa-sim"; + rev = "ibex-cosim-v0.5"; + sha256 = "sha256-LK/IXmRHrGxaMRudcUYmeZV5eXU8eH7ruIw7kliumdY="; + }; + configureFlags = (prev.configureFlags or []) ++ ["--enable-commitlog" "--enable-misaligned"]; +})