From bc1c4c7b0d10cbf3da6b0922c2dd3ee0347ca819 Mon Sep 17 00:00:00 2001 From: Robert Schilling Date: Sun, 26 Jan 2025 10:21:45 +0100 Subject: [PATCH] [hw,gpio,rtl] Add support for RACL Signed-off-by: Robert Schilling --- hw/ip/gpio/data/gpio.hjson | 32 +++- hw/ip/gpio/doc/interfaces.md | 13 +- hw/ip/gpio/rtl/gpio.sv | 26 ++- hw/ip/gpio/rtl/gpio_reg_top.sv | 181 ++++++++++++------ .../data/autogen/top_darjeeling.gen.hjson | 80 ++++++++ .../rtl/autogen/top_darjeeling.sv | 3 + .../data/autogen/top_earlgrey.gen.hjson | 80 ++++++++ hw/top_earlgrey/rtl/autogen/top_earlgrey.sv | 3 + .../autogen/top_englishbreakfast.gen.hjson | 80 ++++++++ .../rtl/autogen/top_englishbreakfast.sv | 3 + 10 files changed, 432 insertions(+), 69 deletions(-) diff --git a/hw/ip/gpio/data/gpio.hjson b/hw/ip/gpio/data/gpio.hjson index 37f426cb2f72b..2a3f8df7a9ded 100644 --- a/hw/ip/gpio/data/gpio.hjson +++ b/hw/ip/gpio/data/gpio.hjson @@ -37,7 +37,7 @@ ] clocking: [{clock: "clk_i", reset: "rst_ni"}], bus_interfaces: [ - { protocol: "tlul", direction: "device" } + { protocol: "tlul", direction: "device", racl_support: true } ], available_inout_list: [ { name: "gpio", @@ -124,6 +124,36 @@ ''', default: "'0" }, + { struct: "racl_policy_vec", + type: "uni", + name: "racl_policies", + act: "rcv", + package: "top_racl_pkg", + desc: ''' + Incoming RACL policy vector from a racl_ctrl instance. + The policy selection vector (parameter) selects the policy for each register. + ''' + } + { struct: "logic", + type: "uni", + name: "racl_error", + act: "req", + width : "1", + desc: ''' + RACL error indication signal. + If 1, the error log contains valid information. + ''' + } + { struct: "racl_error_log", + type: "uni", + name: "racl_error_log", + act: "req", + width: "1" + package: "top_racl_pkg", + desc: ''' + RACL error log information of this module. + ''' + } ] diff --git a/hw/ip/gpio/doc/interfaces.md b/hw/ip/gpio/doc/interfaces.md index 48630be3e28f9..53df0bcf4d5cc 100644 --- a/hw/ip/gpio/doc/interfaces.md +++ b/hw/ip/gpio/doc/interfaces.md @@ -15,11 +15,14 @@ Referring to the [Comportable guideline for peripheral device functionality](htt ## [Inter-Module Signals](https://opentitan.org/book/doc/contributing/hw/comportability/index.html#inter-signal-handling) -| Port Name | Package::Struct | Type | Act | Width | Description | -|:---------------|:----------------------|:--------|:------|--------:|:----------------------------------------------------------------------------------------------| -| strap_en | logic | uni | rcv | 1 | This signal is pulsed high by the power manager after reset in order to sample the HW straps. | -| sampled_straps | gpio_pkg::gpio_straps | uni | req | 1 | This vector contains the sampled strap values. | -| tl | tlul_pkg::tl | req_rsp | rsp | 1 | | +| Port Name | Package::Struct | Type | Act | Width | Description | +|:---------------|:------------------------------|:--------|:------|--------:|:-------------------------------------------------------------------------------------------------------------------------------------| +| strap_en | logic | uni | rcv | 1 | This signal is pulsed high by the power manager after reset in order to sample the HW straps. | +| sampled_straps | gpio_pkg::gpio_straps | uni | req | 1 | This vector contains the sampled strap values. | +| racl_policies | top_racl_pkg::racl_policy_vec | uni | rcv | 1 | Incoming RACL policy vector from a racl_ctrl instance. The policy selection vector (parameter) selects the policy for each register. | +| racl_error | logic | uni | req | 1 | RACL error indication signal. If 1, the error log contains valid information. | +| racl_error_log | top_racl_pkg::racl_error_log | uni | req | 1 | RACL error log information of this module. | +| tl | tlul_pkg::tl | req_rsp | rsp | 1 | | ## Interrupts diff --git a/hw/ip/gpio/rtl/gpio.sv b/hw/ip/gpio/rtl/gpio.sv index d47f5fb4f4c1f..75318964bafd3 100644 --- a/hw/ip/gpio/rtl/gpio.sv +++ b/hw/ip/gpio/rtl/gpio.sv @@ -10,10 +10,13 @@ module gpio import gpio_pkg::*; import gpio_reg_pkg::*; #( - parameter logic [NumAlerts-1:0] AlertAsyncOn = {NumAlerts{1'b1}}, - parameter bit GpioAsHwStrapsEn = 1, + parameter logic [NumAlerts-1:0] AlertAsyncOn = {NumAlerts{1'b1}}, + parameter bit GpioAsHwStrapsEn = 1, // This parameter instantiates 2-stage synchronizers on all GPIO inputs. - parameter bit GpioAsyncOn = 1 + parameter bit GpioAsyncOn = 1, + parameter bit EnableRacl = 1'b0, + parameter bit RaclErrorRsp = 1'b1, + parameter int unsigned RaclPolicySelVec[18] = '{18{0}} ) ( input clk_i, input rst_ni, @@ -33,6 +36,11 @@ module gpio input prim_alert_pkg::alert_rx_t [NumAlerts-1:0] alert_rx_i, output prim_alert_pkg::alert_tx_t [NumAlerts-1:0] alert_tx_o, + // RACL interface + input top_racl_pkg::racl_policy_vec_t racl_policies_i, + output logic racl_error_o, + output top_racl_pkg::racl_error_log_t racl_error_log_o, + // GPIOs input [31:0] cio_gpio_i, output logic [31:0] cio_gpio_o, @@ -210,7 +218,11 @@ module gpio end // Register module - gpio_reg_top u_reg ( + gpio_reg_top #( + .EnableRacl(EnableRacl), + .RaclErrorRsp(RaclErrorRsp), + .RaclPolicySelVec(RaclPolicySelVec) + ) u_reg ( .clk_i, .rst_ni, @@ -220,6 +232,10 @@ module gpio .reg2hw, .hw2reg, + .racl_policies_i, + .racl_error_o, + .racl_error_log_o, + // SEC_CM: BUS.INTEGRITY .intg_err_o (alerts[0]) ); @@ -229,6 +245,8 @@ module gpio `ASSERT_KNOWN(CioGpioEnOKnown, cio_gpio_en_o) `ASSERT_KNOWN(CioGpioOKnown, cio_gpio_o) `ASSERT_KNOWN(AlertsKnown_A, alert_tx_o) + `ASSERT_KNOWN(RaclErrorKnown_A, racl_error_o) + `ASSERT_KNOWN(RaclErrorLogKnown_A, racl_error_log_o) // Alert assertions for reg_we onehot check `ASSERT_PRIM_REG_WE_ONEHOT_ERROR_TRIGGER_ALERT(RegWeOnehotCheck_A, u_reg, alert_tx_o[0]) diff --git a/hw/ip/gpio/rtl/gpio_reg_top.sv b/hw/ip/gpio/rtl/gpio_reg_top.sv index e7e6a7ad8ee94..15b3ca0741ac8 100644 --- a/hw/ip/gpio/rtl/gpio_reg_top.sv +++ b/hw/ip/gpio/rtl/gpio_reg_top.sv @@ -6,7 +6,12 @@ `include "prim_assert.sv" -module gpio_reg_top ( +module gpio_reg_top + # ( + parameter bit EnableRacl = 1'b0, + parameter bit RaclErrorRsp = 1'b1, + parameter int unsigned RaclPolicySelVec[18] = '{18{0}} + ) ( input clk_i, input rst_ni, input tlul_pkg::tl_h2d_t tl_i, @@ -15,6 +20,11 @@ module gpio_reg_top ( output gpio_reg_pkg::gpio_reg2hw_t reg2hw, // Write input gpio_reg_pkg::gpio_hw2reg_t hw2reg, // Read + // RACL interface + input top_racl_pkg::racl_policy_vec_t racl_policies_i, + output logic racl_error_o, + output top_racl_pkg::racl_error_log_t racl_error_log_o, + // Integrity check errors output logic intg_err_o ); @@ -110,7 +120,8 @@ module gpio_reg_top ( .be_o (reg_be), .busy_i (reg_busy), .rdata_i (reg_rdata), - .error_i (reg_error) + // Translate RACL error to TLUL error if enabled + .error_i (reg_error | (RaclErrorRsp & racl_error_o)) ); // cdc oversampling signals @@ -691,8 +702,32 @@ module gpio_reg_top ( logic [17:0] addr_hit; + top_racl_pkg::racl_role_vec_t racl_role_vec; + top_racl_pkg::racl_role_t racl_role; + + logic [17:0] racl_addr_hit_read; + logic [17:0] racl_addr_hit_write; + + if (EnableRacl) begin : gen_racl_role_logic + // Retrieve RACL role from user bits and one-hot encode that for the comparison bitmap + assign racl_role = top_racl_pkg::tlul_extract_racl_role_bits(tl_i.a_user.rsvd); + + prim_onehot_enc #( + .OneHotWidth( $bits(top_racl_pkg::racl_role_vec_t) ) + ) u_racl_role_encode ( + .in_i ( racl_role ), + .en_i ( 1'b1 ), + .out_o( racl_role_vec ) + ); + end else begin : gen_no_racl_role_logic + assign racl_role = '0; + assign racl_role_vec = '0; + end + always_comb begin addr_hit = '0; + racl_addr_hit_read = '0; + racl_addr_hit_write = '0; addr_hit[ 0] = (reg_addr == GPIO_INTR_STATE_OFFSET); addr_hit[ 1] = (reg_addr == GPIO_INTR_ENABLE_OFFSET); addr_hit[ 2] = (reg_addr == GPIO_INTR_TEST_OFFSET); @@ -711,91 +746,117 @@ module gpio_reg_top ( addr_hit[15] = (reg_addr == GPIO_CTRL_EN_INPUT_FILTER_OFFSET); addr_hit[16] = (reg_addr == GPIO_HW_STRAPS_DATA_IN_VALID_OFFSET); addr_hit[17] = (reg_addr == GPIO_HW_STRAPS_DATA_IN_OFFSET); + + if (EnableRacl) begin : gen_racl_hit + for (int unsigned slice_idx = 0; slice_idx < 18; slice_idx++) begin + racl_addr_hit_read[slice_idx] = + addr_hit[slice_idx] & (|(racl_policies_i[RaclPolicySelVec[slice_idx]].read_perm + & racl_role_vec)); + racl_addr_hit_write[slice_idx] = + addr_hit[slice_idx] & (|(racl_policies_i[RaclPolicySelVec[slice_idx]].write_perm + & racl_role_vec)); + end + end else begin : gen_no_racl + racl_addr_hit_read = addr_hit; + racl_addr_hit_write = addr_hit; + end end assign addrmiss = (reg_re || reg_we) ? ~|addr_hit : 1'b0 ; + // A valid address hit, access, but failed the RACL check + assign racl_error_o = |addr_hit & ((reg_re & ~|racl_addr_hit_read) | + (reg_we & ~|racl_addr_hit_write)); + assign racl_error_log_o.racl_role = racl_role; + + if (EnableRacl) begin : gen_racl_log + assign racl_error_log_o.ctn_uid = top_racl_pkg::tlul_extract_ctn_uid_bits(tl_i.a_user.rsvd); + assign racl_error_log_o.read_access = tl_i.a_opcode == tlul_pkg::Get; + end else begin : gen_no_racl_log + assign racl_error_log_o.ctn_uid = '0; + assign racl_error_log_o.read_access = 1'b0; + end // Check sub-word write is permitted always_comb begin wr_err = (reg_we & - ((addr_hit[ 0] & (|(GPIO_PERMIT[ 0] & ~reg_be))) | - (addr_hit[ 1] & (|(GPIO_PERMIT[ 1] & ~reg_be))) | - (addr_hit[ 2] & (|(GPIO_PERMIT[ 2] & ~reg_be))) | - (addr_hit[ 3] & (|(GPIO_PERMIT[ 3] & ~reg_be))) | - (addr_hit[ 4] & (|(GPIO_PERMIT[ 4] & ~reg_be))) | - (addr_hit[ 5] & (|(GPIO_PERMIT[ 5] & ~reg_be))) | - (addr_hit[ 6] & (|(GPIO_PERMIT[ 6] & ~reg_be))) | - (addr_hit[ 7] & (|(GPIO_PERMIT[ 7] & ~reg_be))) | - (addr_hit[ 8] & (|(GPIO_PERMIT[ 8] & ~reg_be))) | - (addr_hit[ 9] & (|(GPIO_PERMIT[ 9] & ~reg_be))) | - (addr_hit[10] & (|(GPIO_PERMIT[10] & ~reg_be))) | - (addr_hit[11] & (|(GPIO_PERMIT[11] & ~reg_be))) | - (addr_hit[12] & (|(GPIO_PERMIT[12] & ~reg_be))) | - (addr_hit[13] & (|(GPIO_PERMIT[13] & ~reg_be))) | - (addr_hit[14] & (|(GPIO_PERMIT[14] & ~reg_be))) | - (addr_hit[15] & (|(GPIO_PERMIT[15] & ~reg_be))) | - (addr_hit[16] & (|(GPIO_PERMIT[16] & ~reg_be))) | - (addr_hit[17] & (|(GPIO_PERMIT[17] & ~reg_be))))); + ((racl_addr_hit_write[ 0] & (|(GPIO_PERMIT[ 0] & ~reg_be))) | + (racl_addr_hit_write[ 1] & (|(GPIO_PERMIT[ 1] & ~reg_be))) | + (racl_addr_hit_write[ 2] & (|(GPIO_PERMIT[ 2] & ~reg_be))) | + (racl_addr_hit_write[ 3] & (|(GPIO_PERMIT[ 3] & ~reg_be))) | + (racl_addr_hit_write[ 4] & (|(GPIO_PERMIT[ 4] & ~reg_be))) | + (racl_addr_hit_write[ 5] & (|(GPIO_PERMIT[ 5] & ~reg_be))) | + (racl_addr_hit_write[ 6] & (|(GPIO_PERMIT[ 6] & ~reg_be))) | + (racl_addr_hit_write[ 7] & (|(GPIO_PERMIT[ 7] & ~reg_be))) | + (racl_addr_hit_write[ 8] & (|(GPIO_PERMIT[ 8] & ~reg_be))) | + (racl_addr_hit_write[ 9] & (|(GPIO_PERMIT[ 9] & ~reg_be))) | + (racl_addr_hit_write[10] & (|(GPIO_PERMIT[10] & ~reg_be))) | + (racl_addr_hit_write[11] & (|(GPIO_PERMIT[11] & ~reg_be))) | + (racl_addr_hit_write[12] & (|(GPIO_PERMIT[12] & ~reg_be))) | + (racl_addr_hit_write[13] & (|(GPIO_PERMIT[13] & ~reg_be))) | + (racl_addr_hit_write[14] & (|(GPIO_PERMIT[14] & ~reg_be))) | + (racl_addr_hit_write[15] & (|(GPIO_PERMIT[15] & ~reg_be))) | + (racl_addr_hit_write[16] & (|(GPIO_PERMIT[16] & ~reg_be))) | + (racl_addr_hit_write[17] & (|(GPIO_PERMIT[17] & ~reg_be))))); end // Generate write-enables - assign intr_state_we = addr_hit[0] & reg_we & !reg_error; + assign intr_state_we = racl_addr_hit_write[0] & reg_we & !reg_error; assign intr_state_wd = reg_wdata[31:0]; - assign intr_enable_we = addr_hit[1] & reg_we & !reg_error; + assign intr_enable_we = racl_addr_hit_write[1] & reg_we & !reg_error; assign intr_enable_wd = reg_wdata[31:0]; - assign intr_test_we = addr_hit[2] & reg_we & !reg_error; + assign intr_test_we = racl_addr_hit_write[2] & reg_we & !reg_error; assign intr_test_wd = reg_wdata[31:0]; - assign alert_test_we = addr_hit[3] & reg_we & !reg_error; + assign alert_test_we = racl_addr_hit_write[3] & reg_we & !reg_error; assign alert_test_wd = reg_wdata[0]; - assign direct_out_re = addr_hit[5] & reg_re & !reg_error; - assign direct_out_we = addr_hit[5] & reg_we & !reg_error; + assign direct_out_re = racl_addr_hit_write[5] & reg_re & !reg_error; + assign direct_out_we = racl_addr_hit_write[5] & reg_we & !reg_error; assign direct_out_wd = reg_wdata[31:0]; - assign masked_out_lower_re = addr_hit[6] & reg_re & !reg_error; - assign masked_out_lower_we = addr_hit[6] & reg_we & !reg_error; + assign masked_out_lower_re = racl_addr_hit_write[6] & reg_re & !reg_error; + assign masked_out_lower_we = racl_addr_hit_write[6] & reg_we & !reg_error; assign masked_out_lower_data_wd = reg_wdata[15:0]; assign masked_out_lower_mask_wd = reg_wdata[31:16]; - assign masked_out_upper_re = addr_hit[7] & reg_re & !reg_error; - assign masked_out_upper_we = addr_hit[7] & reg_we & !reg_error; + assign masked_out_upper_re = racl_addr_hit_write[7] & reg_re & !reg_error; + assign masked_out_upper_we = racl_addr_hit_write[7] & reg_we & !reg_error; assign masked_out_upper_data_wd = reg_wdata[15:0]; assign masked_out_upper_mask_wd = reg_wdata[31:16]; - assign direct_oe_re = addr_hit[8] & reg_re & !reg_error; - assign direct_oe_we = addr_hit[8] & reg_we & !reg_error; + assign direct_oe_re = racl_addr_hit_write[8] & reg_re & !reg_error; + assign direct_oe_we = racl_addr_hit_write[8] & reg_we & !reg_error; assign direct_oe_wd = reg_wdata[31:0]; - assign masked_oe_lower_re = addr_hit[9] & reg_re & !reg_error; - assign masked_oe_lower_we = addr_hit[9] & reg_we & !reg_error; + assign masked_oe_lower_re = racl_addr_hit_write[9] & reg_re & !reg_error; + assign masked_oe_lower_we = racl_addr_hit_write[9] & reg_we & !reg_error; assign masked_oe_lower_data_wd = reg_wdata[15:0]; assign masked_oe_lower_mask_wd = reg_wdata[31:16]; - assign masked_oe_upper_re = addr_hit[10] & reg_re & !reg_error; - assign masked_oe_upper_we = addr_hit[10] & reg_we & !reg_error; + assign masked_oe_upper_re = racl_addr_hit_write[10] & reg_re & !reg_error; + assign masked_oe_upper_we = racl_addr_hit_write[10] & reg_we & !reg_error; assign masked_oe_upper_data_wd = reg_wdata[15:0]; assign masked_oe_upper_mask_wd = reg_wdata[31:16]; - assign intr_ctrl_en_rising_we = addr_hit[11] & reg_we & !reg_error; + assign intr_ctrl_en_rising_we = racl_addr_hit_write[11] & reg_we & !reg_error; assign intr_ctrl_en_rising_wd = reg_wdata[31:0]; - assign intr_ctrl_en_falling_we = addr_hit[12] & reg_we & !reg_error; + assign intr_ctrl_en_falling_we = racl_addr_hit_write[12] & reg_we & !reg_error; assign intr_ctrl_en_falling_wd = reg_wdata[31:0]; - assign intr_ctrl_en_lvlhigh_we = addr_hit[13] & reg_we & !reg_error; + assign intr_ctrl_en_lvlhigh_we = racl_addr_hit_write[13] & reg_we & !reg_error; assign intr_ctrl_en_lvlhigh_wd = reg_wdata[31:0]; - assign intr_ctrl_en_lvllow_we = addr_hit[14] & reg_we & !reg_error; + assign intr_ctrl_en_lvllow_we = racl_addr_hit_write[14] & reg_we & !reg_error; assign intr_ctrl_en_lvllow_wd = reg_wdata[31:0]; - assign ctrl_en_input_filter_we = addr_hit[15] & reg_we & !reg_error; + assign ctrl_en_input_filter_we = racl_addr_hit_write[15] & reg_we & !reg_error; assign ctrl_en_input_filter_wd = reg_wdata[31:0]; @@ -826,79 +887,79 @@ module gpio_reg_top ( always_comb begin reg_rdata_next = '0; unique case (1'b1) - addr_hit[0]: begin + racl_addr_hit_read[0]: begin reg_rdata_next[31:0] = intr_state_qs; end - addr_hit[1]: begin + racl_addr_hit_read[1]: begin reg_rdata_next[31:0] = intr_enable_qs; end - addr_hit[2]: begin + racl_addr_hit_read[2]: begin reg_rdata_next[31:0] = '0; end - addr_hit[3]: begin + racl_addr_hit_read[3]: begin reg_rdata_next[0] = '0; end - addr_hit[4]: begin + racl_addr_hit_read[4]: begin reg_rdata_next[31:0] = data_in_qs; end - addr_hit[5]: begin + racl_addr_hit_read[5]: begin reg_rdata_next[31:0] = direct_out_qs; end - addr_hit[6]: begin + racl_addr_hit_read[6]: begin reg_rdata_next[15:0] = masked_out_lower_data_qs; reg_rdata_next[31:16] = '0; end - addr_hit[7]: begin + racl_addr_hit_read[7]: begin reg_rdata_next[15:0] = masked_out_upper_data_qs; reg_rdata_next[31:16] = '0; end - addr_hit[8]: begin + racl_addr_hit_read[8]: begin reg_rdata_next[31:0] = direct_oe_qs; end - addr_hit[9]: begin + racl_addr_hit_read[9]: begin reg_rdata_next[15:0] = masked_oe_lower_data_qs; reg_rdata_next[31:16] = masked_oe_lower_mask_qs; end - addr_hit[10]: begin + racl_addr_hit_read[10]: begin reg_rdata_next[15:0] = masked_oe_upper_data_qs; reg_rdata_next[31:16] = masked_oe_upper_mask_qs; end - addr_hit[11]: begin + racl_addr_hit_read[11]: begin reg_rdata_next[31:0] = intr_ctrl_en_rising_qs; end - addr_hit[12]: begin + racl_addr_hit_read[12]: begin reg_rdata_next[31:0] = intr_ctrl_en_falling_qs; end - addr_hit[13]: begin + racl_addr_hit_read[13]: begin reg_rdata_next[31:0] = intr_ctrl_en_lvlhigh_qs; end - addr_hit[14]: begin + racl_addr_hit_read[14]: begin reg_rdata_next[31:0] = intr_ctrl_en_lvllow_qs; end - addr_hit[15]: begin + racl_addr_hit_read[15]: begin reg_rdata_next[31:0] = ctrl_en_input_filter_qs; end - addr_hit[16]: begin + racl_addr_hit_read[16]: begin reg_rdata_next[0] = hw_straps_data_in_valid_qs; end - addr_hit[17]: begin + racl_addr_hit_read[17]: begin reg_rdata_next[31:0] = hw_straps_data_in_qs; end @@ -923,6 +984,8 @@ module gpio_reg_top ( logic unused_be; assign unused_wdata = ^reg_wdata; assign unused_be = ^reg_be; + logic unused_policy_sel; + assign unused_policy_sel = ^racl_policies_i; // Assertions for Register Interface `ASSERT_PULSE(wePulse, reg_we, clk_i, !rst_ni) diff --git a/hw/top_darjeeling/data/autogen/top_darjeeling.gen.hjson b/hw/top_darjeeling/data/autogen/top_darjeeling.gen.hjson index eaa62803cc355..71ffd44d5cb2c 100644 --- a/hw/top_darjeeling/data/autogen/top_darjeeling.gen.hjson +++ b/hw/top_darjeeling/data/autogen/top_darjeeling.gen.hjson @@ -709,6 +709,46 @@ inst_name: gpio index: -1 } + { + name: racl_policies + desc: + ''' + Incoming RACL policy vector from a racl_ctrl instance. + The policy selection vector (parameter) selects the policy for each register. + ''' + struct: racl_policy_vec + package: top_racl_pkg + type: uni + act: rcv + width: 1 + inst_name: gpio + index: -1 + } + { + name: racl_error + desc: + ''' + RACL error indication signal. + If 1, the error log contains valid information. + ''' + struct: logic + type: uni + act: req + width: 1 + inst_name: gpio + index: -1 + } + { + name: racl_error_log + desc: RACL error log information of this module. + struct: racl_error_log + package: top_racl_pkg + type: uni + act: req + width: 1 + inst_name: gpio + index: -1 + } { name: tl struct: tl @@ -19049,6 +19089,46 @@ inst_name: gpio index: -1 } + { + name: racl_policies + desc: + ''' + Incoming RACL policy vector from a racl_ctrl instance. + The policy selection vector (parameter) selects the policy for each register. + ''' + struct: racl_policy_vec + package: top_racl_pkg + type: uni + act: rcv + width: 1 + inst_name: gpio + index: -1 + } + { + name: racl_error + desc: + ''' + RACL error indication signal. + If 1, the error log contains valid information. + ''' + struct: logic + type: uni + act: req + width: 1 + inst_name: gpio + index: -1 + } + { + name: racl_error_log + desc: RACL error log information of this module. + struct: racl_error_log + package: top_racl_pkg + type: uni + act: req + width: 1 + inst_name: gpio + index: -1 + } { name: tl struct: tl diff --git a/hw/top_darjeeling/rtl/autogen/top_darjeeling.sv b/hw/top_darjeeling/rtl/autogen/top_darjeeling.sv index df4d60fc91feb..32ef0f20e5c87 100644 --- a/hw/top_darjeeling/rtl/autogen/top_darjeeling.sv +++ b/hw/top_darjeeling/rtl/autogen/top_darjeeling.sv @@ -1023,6 +1023,9 @@ module top_darjeeling #( // Inter-module signals .strap_en_i(pwrmgr_aon_strap), .sampled_straps_o(), + .racl_policies_i(top_racl_pkg::RACL_POLICY_VEC_DEFAULT), + .racl_error_o(), + .racl_error_log_o(), .tl_i(gpio_tl_req), .tl_o(gpio_tl_rsp), diff --git a/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson b/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson index 8af0f1a9ecf3c..3e7757078226e 100644 --- a/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson +++ b/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson @@ -1083,6 +1083,46 @@ inst_name: gpio index: -1 } + { + name: racl_policies + desc: + ''' + Incoming RACL policy vector from a racl_ctrl instance. + The policy selection vector (parameter) selects the policy for each register. + ''' + struct: racl_policy_vec + package: top_racl_pkg + type: uni + act: rcv + width: 1 + inst_name: gpio + index: -1 + } + { + name: racl_error + desc: + ''' + RACL error indication signal. + If 1, the error log contains valid information. + ''' + struct: logic + type: uni + act: req + width: 1 + inst_name: gpio + index: -1 + } + { + name: racl_error_log + desc: RACL error log information of this module. + struct: racl_error_log + package: top_racl_pkg + type: uni + act: req + width: 1 + inst_name: gpio + index: -1 + } { name: tl struct: tl @@ -18228,6 +18268,46 @@ inst_name: gpio index: -1 } + { + name: racl_policies + desc: + ''' + Incoming RACL policy vector from a racl_ctrl instance. + The policy selection vector (parameter) selects the policy for each register. + ''' + struct: racl_policy_vec + package: top_racl_pkg + type: uni + act: rcv + width: 1 + inst_name: gpio + index: -1 + } + { + name: racl_error + desc: + ''' + RACL error indication signal. + If 1, the error log contains valid information. + ''' + struct: logic + type: uni + act: req + width: 1 + inst_name: gpio + index: -1 + } + { + name: racl_error_log + desc: RACL error log information of this module. + struct: racl_error_log + package: top_racl_pkg + type: uni + act: req + width: 1 + inst_name: gpio + index: -1 + } { name: tl struct: tl diff --git a/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv b/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv index 9083af78d76ec..043adc319b2d5 100644 --- a/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv +++ b/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv @@ -1230,6 +1230,9 @@ module top_earlgrey #( // Inter-module signals .strap_en_i(1'b0), .sampled_straps_o(), + .racl_policies_i(top_racl_pkg::RACL_POLICY_VEC_DEFAULT), + .racl_error_o(), + .racl_error_log_o(), .tl_i(gpio_tl_req), .tl_o(gpio_tl_rsp), diff --git a/hw/top_englishbreakfast/data/autogen/top_englishbreakfast.gen.hjson b/hw/top_englishbreakfast/data/autogen/top_englishbreakfast.gen.hjson index 4f046955e3737..ba5483659b8f0 100644 --- a/hw/top_englishbreakfast/data/autogen/top_englishbreakfast.gen.hjson +++ b/hw/top_englishbreakfast/data/autogen/top_englishbreakfast.gen.hjson @@ -738,6 +738,46 @@ inst_name: gpio index: -1 } + { + name: racl_policies + desc: + ''' + Incoming RACL policy vector from a racl_ctrl instance. + The policy selection vector (parameter) selects the policy for each register. + ''' + struct: racl_policy_vec + package: top_racl_pkg + type: uni + act: rcv + width: 1 + inst_name: gpio + index: -1 + } + { + name: racl_error + desc: + ''' + RACL error indication signal. + If 1, the error log contains valid information. + ''' + struct: logic + type: uni + act: req + width: 1 + inst_name: gpio + index: -1 + } + { + name: racl_error_log + desc: RACL error log information of this module. + struct: racl_error_log + package: top_racl_pkg + type: uni + act: req + width: 1 + inst_name: gpio + index: -1 + } { name: tl struct: tl @@ -9047,6 +9087,46 @@ inst_name: gpio index: -1 } + { + name: racl_policies + desc: + ''' + Incoming RACL policy vector from a racl_ctrl instance. + The policy selection vector (parameter) selects the policy for each register. + ''' + struct: racl_policy_vec + package: top_racl_pkg + type: uni + act: rcv + width: 1 + inst_name: gpio + index: -1 + } + { + name: racl_error + desc: + ''' + RACL error indication signal. + If 1, the error log contains valid information. + ''' + struct: logic + type: uni + act: req + width: 1 + inst_name: gpio + index: -1 + } + { + name: racl_error_log + desc: RACL error log information of this module. + struct: racl_error_log + package: top_racl_pkg + type: uni + act: req + width: 1 + inst_name: gpio + index: -1 + } { name: tl struct: tl diff --git a/hw/top_englishbreakfast/rtl/autogen/top_englishbreakfast.sv b/hw/top_englishbreakfast/rtl/autogen/top_englishbreakfast.sv index 3d80741566480..4f12ad75a5484 100644 --- a/hw/top_englishbreakfast/rtl/autogen/top_englishbreakfast.sv +++ b/hw/top_englishbreakfast/rtl/autogen/top_englishbreakfast.sv @@ -641,6 +641,9 @@ module top_englishbreakfast #( // Inter-module signals .strap_en_i(1'b0), .sampled_straps_o(), + .racl_policies_i(top_racl_pkg::RACL_POLICY_VEC_DEFAULT), + .racl_error_o(), + .racl_error_log_o(), .tl_i(gpio_tl_req), .tl_o(gpio_tl_rsp),