From ff8dbc90c8e3a273548bc408416427d8465ad5f0 Mon Sep 17 00:00:00 2001 From: Robert Schilling Date: Sat, 1 Feb 2025 13:48:55 +0100 Subject: [PATCH] [darjeeling,racl] Add RACL to AC Range check Signed-off-by: Robert Schilling --- .../data/autogen/top_darjeeling.gen.hjson | 217 +++++++++++++++++- hw/top_darjeeling/data/top_darjeeling.hjson | 1 + ...p_darjeeling_ac_range_check.ipconfig.hjson | 2 + .../ip_autogen/racl_ctrl/data/racl_ctrl.hjson | 2 +- .../top_darjeeling_racl_ctrl.ipconfig.hjson | 2 +- .../rtl/autogen/top_darjeeling.sv | 11 +- hw/top_darjeeling/rtl/autogen/top_racl_pkg.sv | 175 ++++++++++++++ util/topgen.py | 21 +- 8 files changed, 408 insertions(+), 23 deletions(-) diff --git a/hw/top_darjeeling/data/autogen/top_darjeeling.gen.hjson b/hw/top_darjeeling/data/autogen/top_darjeeling.gen.hjson index e36c93516ff2f7..df195cd95f3fa9 100644 --- a/hw/top_darjeeling/data/autogen/top_darjeeling.gen.hjson +++ b/hw/top_darjeeling/data/autogen/top_darjeeling.gen.hjson @@ -9820,7 +9820,7 @@ name: NumSubscribingIps desc: Number of subscribing RACL IPs type: int - default: 8 + default: 9 local: "true" expose: "true" name_top: RaclCtrlNumSubscribingIps @@ -9871,7 +9871,7 @@ desc: Number of subscribing RACL IPs param_type: int unpacked_dimensions: null - default: 8 + default: 9 local: true expose: true name_top: RaclCtrlNumSubscribingIps @@ -9897,7 +9897,7 @@ desc: Number of subscribing RACL IPs param_type: int unpacked_dimensions: null - default: 8 + default: 9 local: true expose: true name_top: RaclCtrlNumSubscribingIps @@ -10105,6 +10105,8 @@ act: rcv width: 1 inst_name: ac_range_check + default: "" + top_signame: racl_ctrl_racl_policies index: -1 } { @@ -10119,7 +10121,10 @@ act: req width: 1 inst_name: ac_range_check - index: -1 + default: "" + package: "" + top_signame: racl_ctrl_racl_error + index: 8 } { name: racl_error_log @@ -10130,7 +10135,9 @@ act: req width: 1 inst_name: ac_range_check - index: -1 + default: "" + top_signame: racl_ctrl_racl_error_log + index: 8 } { name: tl @@ -10154,6 +10161,184 @@ } } generate_dif: true + racl_mappings: + { + null: + { + racl_group: Null + register_mapping: + { + INTR_STATE: 2 + INTR_ENABLE: 2 + INTR_TEST: 2 + ALERT_TEST: 2 + LOG_CONFIG: 2 + LOG_STATUS: 2 + LOG_ADDRESS: 2 + RANGE_REGWEN_0: 2 + RANGE_REGWEN_1: 2 + RANGE_REGWEN_2: 2 + RANGE_REGWEN_3: 2 + RANGE_REGWEN_4: 2 + RANGE_REGWEN_5: 2 + RANGE_REGWEN_6: 2 + RANGE_REGWEN_7: 2 + RANGE_REGWEN_8: 2 + RANGE_REGWEN_9: 2 + RANGE_REGWEN_10: 2 + RANGE_REGWEN_11: 2 + RANGE_REGWEN_12: 2 + RANGE_REGWEN_13: 2 + RANGE_REGWEN_14: 2 + RANGE_REGWEN_15: 2 + RANGE_REGWEN_16: 2 + RANGE_REGWEN_17: 2 + RANGE_REGWEN_18: 2 + RANGE_REGWEN_19: 2 + RANGE_REGWEN_20: 2 + RANGE_REGWEN_21: 2 + RANGE_REGWEN_22: 2 + RANGE_REGWEN_23: 2 + RANGE_REGWEN_24: 2 + RANGE_REGWEN_25: 2 + RANGE_REGWEN_26: 2 + RANGE_REGWEN_27: 2 + RANGE_REGWEN_28: 2 + RANGE_REGWEN_29: 2 + RANGE_REGWEN_30: 2 + RANGE_REGWEN_31: 2 + RANGE_BASE_0: 2 + RANGE_BASE_1: 2 + RANGE_BASE_2: 2 + RANGE_BASE_3: 2 + RANGE_BASE_4: 2 + RANGE_BASE_5: 2 + RANGE_BASE_6: 2 + RANGE_BASE_7: 2 + RANGE_BASE_8: 2 + RANGE_BASE_9: 2 + RANGE_BASE_10: 2 + RANGE_BASE_11: 2 + RANGE_BASE_12: 2 + RANGE_BASE_13: 2 + RANGE_BASE_14: 2 + RANGE_BASE_15: 2 + RANGE_BASE_16: 2 + RANGE_BASE_17: 2 + RANGE_BASE_18: 2 + RANGE_BASE_19: 2 + RANGE_BASE_20: 2 + RANGE_BASE_21: 2 + RANGE_BASE_22: 2 + RANGE_BASE_23: 2 + RANGE_BASE_24: 2 + RANGE_BASE_25: 2 + RANGE_BASE_26: 2 + RANGE_BASE_27: 2 + RANGE_BASE_28: 2 + RANGE_BASE_29: 2 + RANGE_BASE_30: 2 + RANGE_BASE_31: 2 + RANGE_LIMIT_0: 2 + RANGE_LIMIT_1: 2 + RANGE_LIMIT_2: 2 + RANGE_LIMIT_3: 2 + RANGE_LIMIT_4: 2 + RANGE_LIMIT_5: 2 + RANGE_LIMIT_6: 2 + RANGE_LIMIT_7: 2 + RANGE_LIMIT_8: 2 + RANGE_LIMIT_9: 2 + RANGE_LIMIT_10: 2 + RANGE_LIMIT_11: 2 + RANGE_LIMIT_12: 2 + RANGE_LIMIT_13: 2 + RANGE_LIMIT_14: 2 + RANGE_LIMIT_15: 2 + RANGE_LIMIT_16: 2 + RANGE_LIMIT_17: 2 + RANGE_LIMIT_18: 2 + RANGE_LIMIT_19: 2 + RANGE_LIMIT_20: 2 + RANGE_LIMIT_21: 2 + RANGE_LIMIT_22: 2 + RANGE_LIMIT_23: 2 + RANGE_LIMIT_24: 2 + RANGE_LIMIT_25: 2 + RANGE_LIMIT_26: 2 + RANGE_LIMIT_27: 2 + RANGE_LIMIT_28: 2 + RANGE_LIMIT_29: 2 + RANGE_LIMIT_30: 2 + RANGE_LIMIT_31: 2 + RANGE_PERM_0: 2 + RANGE_PERM_1: 2 + RANGE_PERM_2: 2 + RANGE_PERM_3: 2 + RANGE_PERM_4: 2 + RANGE_PERM_5: 2 + RANGE_PERM_6: 2 + RANGE_PERM_7: 2 + RANGE_PERM_8: 2 + RANGE_PERM_9: 2 + RANGE_PERM_10: 2 + RANGE_PERM_11: 2 + RANGE_PERM_12: 2 + RANGE_PERM_13: 2 + RANGE_PERM_14: 2 + RANGE_PERM_15: 2 + RANGE_PERM_16: 2 + RANGE_PERM_17: 2 + RANGE_PERM_18: 2 + RANGE_PERM_19: 2 + RANGE_PERM_20: 2 + RANGE_PERM_21: 2 + RANGE_PERM_22: 2 + RANGE_PERM_23: 2 + RANGE_PERM_24: 2 + RANGE_PERM_25: 2 + RANGE_PERM_26: 2 + RANGE_PERM_27: 2 + RANGE_PERM_28: 2 + RANGE_PERM_29: 2 + RANGE_PERM_30: 2 + RANGE_PERM_31: 2 + RANGE_RACL_POLICY_SHADOWED_0: 2 + RANGE_RACL_POLICY_SHADOWED_1: 2 + RANGE_RACL_POLICY_SHADOWED_2: 2 + RANGE_RACL_POLICY_SHADOWED_3: 2 + RANGE_RACL_POLICY_SHADOWED_4: 2 + RANGE_RACL_POLICY_SHADOWED_5: 2 + RANGE_RACL_POLICY_SHADOWED_6: 2 + RANGE_RACL_POLICY_SHADOWED_7: 2 + RANGE_RACL_POLICY_SHADOWED_8: 2 + RANGE_RACL_POLICY_SHADOWED_9: 2 + RANGE_RACL_POLICY_SHADOWED_10: 2 + RANGE_RACL_POLICY_SHADOWED_11: 2 + RANGE_RACL_POLICY_SHADOWED_12: 2 + RANGE_RACL_POLICY_SHADOWED_13: 2 + RANGE_RACL_POLICY_SHADOWED_14: 2 + RANGE_RACL_POLICY_SHADOWED_15: 2 + RANGE_RACL_POLICY_SHADOWED_16: 2 + RANGE_RACL_POLICY_SHADOWED_17: 2 + RANGE_RACL_POLICY_SHADOWED_18: 2 + RANGE_RACL_POLICY_SHADOWED_19: 2 + RANGE_RACL_POLICY_SHADOWED_20: 2 + RANGE_RACL_POLICY_SHADOWED_21: 2 + RANGE_RACL_POLICY_SHADOWED_22: 2 + RANGE_RACL_POLICY_SHADOWED_23: 2 + RANGE_RACL_POLICY_SHADOWED_24: 2 + RANGE_RACL_POLICY_SHADOWED_25: 2 + RANGE_RACL_POLICY_SHADOWED_26: 2 + RANGE_RACL_POLICY_SHADOWED_27: 2 + RANGE_RACL_POLICY_SHADOWED_28: 2 + RANGE_RACL_POLICY_SHADOWED_29: 2 + RANGE_RACL_POLICY_SHADOWED_30: 2 + RANGE_RACL_POLICY_SHADOWED_31: 2 + } + window_mapping: {} + } + } } { name: rv_core_ibex @@ -11600,6 +11785,7 @@ mbx_jtag.racl_policies mbx_pcie0.racl_policies mbx_pcie1.racl_policies + ac_range_check.racl_policies ] racl_ctrl.racl_error: [ @@ -11611,6 +11797,7 @@ mbx_jtag.racl_error mbx_pcie0.racl_error mbx_pcie1.racl_error + ac_range_check.racl_error ] racl_ctrl.racl_error_log: [ @@ -11622,6 +11809,7 @@ mbx_jtag.racl_error_log mbx_pcie0.racl_error_log mbx_pcie1.racl_error_log + ac_range_check.racl_error_log ] } top: @@ -25647,7 +25835,7 @@ desc: Number of subscribing RACL IPs param_type: int unpacked_dimensions: null - default: 8 + default: 9 local: true expose: true name_top: RaclCtrlNumSubscribingIps @@ -25673,7 +25861,7 @@ desc: Number of subscribing RACL IPs param_type: int unpacked_dimensions: null - default: 8 + default: 9 local: true expose: true name_top: RaclCtrlNumSubscribingIps @@ -25837,6 +26025,8 @@ act: rcv width: 1 inst_name: ac_range_check + default: "" + top_signame: racl_ctrl_racl_policies index: -1 } { @@ -25851,7 +26041,10 @@ act: req width: 1 inst_name: ac_range_check - index: -1 + default: "" + package: "" + top_signame: racl_ctrl_racl_error + index: 8 } { name: racl_error_log @@ -25862,7 +26055,9 @@ act: req width: 1 inst_name: ac_range_check - index: -1 + default: "" + top_signame: racl_ctrl_racl_error_log + index: 8 } { name: tl @@ -31512,7 +31707,7 @@ desc: Number of subscribing RACL IPs param_type: int unpacked_dimensions: null - default: 8 + default: 9 local: true expose: true name_top: RaclCtrlNumSubscribingIps @@ -31533,7 +31728,7 @@ desc: Number of subscribing RACL IPs param_type: int unpacked_dimensions: null - default: 8 + default: 9 local: true expose: true name_top: RaclCtrlNumSubscribingIps diff --git a/hw/top_darjeeling/data/top_darjeeling.hjson b/hw/top_darjeeling/data/top_darjeeling.hjson index 1c10c4a20615b7..7bde53cc0d0877 100644 --- a/hw/top_darjeeling/data/top_darjeeling.hjson +++ b/hw/top_darjeeling/data/top_darjeeling.hjson @@ -1027,6 +1027,7 @@ num_ranges: 32 } attr: "ipgen", + racl_mapping: 'top_darjeeling/data/racl/soc_rot_mapping.hjson' }, { name: "rv_core_ibex", type: "rv_core_ibex", diff --git a/hw/top_darjeeling/ip_autogen/ac_range_check/data/top_darjeeling_ac_range_check.ipconfig.hjson b/hw/top_darjeeling/ip_autogen/ac_range_check/data/top_darjeeling_ac_range_check.ipconfig.hjson index 32ae0d9690cb1e..5062f6a190b7ae 100644 --- a/hw/top_darjeeling/ip_autogen/ac_range_check/data/top_darjeeling_ac_range_check.ipconfig.hjson +++ b/hw/top_darjeeling/ip_autogen/ac_range_check/data/top_darjeeling_ac_range_check.ipconfig.hjson @@ -7,6 +7,8 @@ { num_ranges: 32 module_instance_name: ac_range_check + nr_role_bits: 4 + nr_ctn_uid_bits: 5 topname: darjeeling } } diff --git a/hw/top_darjeeling/ip_autogen/racl_ctrl/data/racl_ctrl.hjson b/hw/top_darjeeling/ip_autogen/racl_ctrl/data/racl_ctrl.hjson index 8450a51ffe86a0..e98a5ff29c17f9 100644 --- a/hw/top_darjeeling/ip_autogen/racl_ctrl/data/racl_ctrl.hjson +++ b/hw/top_darjeeling/ip_autogen/racl_ctrl/data/racl_ctrl.hjson @@ -59,7 +59,7 @@ { name: "NumSubscribingIps", desc: "Number of subscribing RACL IPs", type: "int", - default: "8", + default: "9", expose: "true" local: "true" }, diff --git a/hw/top_darjeeling/ip_autogen/racl_ctrl/data/top_darjeeling_racl_ctrl.ipconfig.hjson b/hw/top_darjeeling/ip_autogen/racl_ctrl/data/top_darjeeling_racl_ctrl.ipconfig.hjson index 9df3d812c72009..e9bd48557c4fb3 100644 --- a/hw/top_darjeeling/ip_autogen/racl_ctrl/data/top_darjeeling_racl_ctrl.ipconfig.hjson +++ b/hw/top_darjeeling/ip_autogen/racl_ctrl/data/top_darjeeling_racl_ctrl.ipconfig.hjson @@ -9,7 +9,7 @@ nr_role_bits: 4 nr_ctn_uid_bits: 5 nr_policies: 3 - nr_subscribing_ips: 8 + nr_subscribing_ips: 9 policies: [ { diff --git a/hw/top_darjeeling/rtl/autogen/top_darjeeling.sv b/hw/top_darjeeling/rtl/autogen/top_darjeeling.sv index b81dfcb57d2551..0966d22374040c 100644 --- a/hw/top_darjeeling/rtl/autogen/top_darjeeling.sv +++ b/hw/top_darjeeling/rtl/autogen/top_darjeeling.sv @@ -318,7 +318,7 @@ module top_darjeeling #( // local parameters for spi_host0 localparam int SpiHost0NumCS = 1; // local parameters for racl_ctrl - localparam int RaclCtrlNumSubscribingIps = 8; + localparam int RaclCtrlNumSubscribingIps = 9; // local parameters for rv_core_ibex localparam int unsigned RvCoreIbexNEscalationSeverities = alert_handler_reg_pkg::N_ESC_SEV; localparam int unsigned RvCoreIbexWidthPingCounter = alert_handler_reg_pkg::PING_CNT_DW; @@ -2623,6 +2623,9 @@ module top_darjeeling #( .rst_ni (rstmgr_aon_resets.rst_lc_n[rstmgr_pkg::Domain0Sel]) ); ac_range_check #( + .EnableRacl(1'b1), + .RaclErrorRsp(1'b1), + .RaclPolicySelVec(top_racl_pkg::RACL_POLICY_SEL_AC_RANGE_CHECK), .AlertAsyncOn(alert_handler_reg_pkg::AsyncOn[98:97]) ) u_ac_range_check ( @@ -2639,9 +2642,9 @@ module top_darjeeling #( .ctn_tl_d2h_o(soc_proxy_ctn_tl_d2h), .ctn_filtered_tl_h2d_o(ctn_tl_h2d_o), .ctn_filtered_tl_d2h_i(ctn_tl_d2h_i), - .racl_policies_i(top_racl_pkg::RACL_POLICY_VEC_DEFAULT), - .racl_error_o(), - .racl_error_log_o(), + .racl_policies_i(racl_ctrl_racl_policies), + .racl_error_o(racl_ctrl_racl_error[8]), + .racl_error_log_o(racl_ctrl_racl_error_log[8]), .tl_i(ac_range_check_tl_req), .tl_o(ac_range_check_tl_rsp), diff --git a/hw/top_darjeeling/rtl/autogen/top_racl_pkg.sv b/hw/top_darjeeling/rtl/autogen/top_racl_pkg.sv index cdc717bd7b3e13..6f6200db36758d 100644 --- a/hw/top_darjeeling/rtl/autogen/top_racl_pkg.sv +++ b/hw/top_darjeeling/rtl/autogen/top_racl_pkg.sv @@ -276,4 +276,179 @@ package top_racl_pkg; parameter int unsigned RACL_POLICY_SEL_MBX_PCIE1_SOC_WIN_WDATA = 2; parameter int unsigned RACL_POLICY_SEL_MBX_PCIE1_SOC_WIN_RDATA = 2; + /** + * Policy selection vector for ac_range_check + * TLUL interface name: None + * RACL group: Null + * Register to policy mapping: + * INTR_STATE: SOC_ROT (Idx 2) + * INTR_ENABLE: SOC_ROT (Idx 2) + * INTR_TEST: SOC_ROT (Idx 2) + * ALERT_TEST: SOC_ROT (Idx 2) + * LOG_CONFIG: SOC_ROT (Idx 2) + * LOG_STATUS: SOC_ROT (Idx 2) + * LOG_ADDRESS: SOC_ROT (Idx 2) + * RANGE_REGWEN_0: SOC_ROT (Idx 2) + * RANGE_REGWEN_1: SOC_ROT (Idx 2) + * RANGE_REGWEN_2: SOC_ROT (Idx 2) + * RANGE_REGWEN_3: SOC_ROT (Idx 2) + * RANGE_REGWEN_4: SOC_ROT (Idx 2) + * RANGE_REGWEN_5: SOC_ROT (Idx 2) + * RANGE_REGWEN_6: SOC_ROT (Idx 2) + * RANGE_REGWEN_7: SOC_ROT (Idx 2) + * RANGE_REGWEN_8: SOC_ROT (Idx 2) + * RANGE_REGWEN_9: SOC_ROT (Idx 2) + * RANGE_REGWEN_10: SOC_ROT (Idx 2) + * RANGE_REGWEN_11: SOC_ROT (Idx 2) + * RANGE_REGWEN_12: SOC_ROT (Idx 2) + * RANGE_REGWEN_13: SOC_ROT (Idx 2) + * RANGE_REGWEN_14: SOC_ROT (Idx 2) + * RANGE_REGWEN_15: SOC_ROT (Idx 2) + * RANGE_REGWEN_16: SOC_ROT (Idx 2) + * RANGE_REGWEN_17: SOC_ROT (Idx 2) + * RANGE_REGWEN_18: SOC_ROT (Idx 2) + * RANGE_REGWEN_19: SOC_ROT (Idx 2) + * RANGE_REGWEN_20: SOC_ROT (Idx 2) + * RANGE_REGWEN_21: SOC_ROT (Idx 2) + * RANGE_REGWEN_22: SOC_ROT (Idx 2) + * RANGE_REGWEN_23: SOC_ROT (Idx 2) + * RANGE_REGWEN_24: SOC_ROT (Idx 2) + * RANGE_REGWEN_25: SOC_ROT (Idx 2) + * RANGE_REGWEN_26: SOC_ROT (Idx 2) + * RANGE_REGWEN_27: SOC_ROT (Idx 2) + * RANGE_REGWEN_28: SOC_ROT (Idx 2) + * RANGE_REGWEN_29: SOC_ROT (Idx 2) + * RANGE_REGWEN_30: SOC_ROT (Idx 2) + * RANGE_REGWEN_31: SOC_ROT (Idx 2) + * RANGE_BASE_0: SOC_ROT (Idx 2) + * RANGE_BASE_1: SOC_ROT (Idx 2) + * RANGE_BASE_2: SOC_ROT (Idx 2) + * RANGE_BASE_3: SOC_ROT (Idx 2) + * RANGE_BASE_4: SOC_ROT (Idx 2) + * RANGE_BASE_5: SOC_ROT (Idx 2) + * RANGE_BASE_6: SOC_ROT (Idx 2) + * RANGE_BASE_7: SOC_ROT (Idx 2) + * RANGE_BASE_8: SOC_ROT (Idx 2) + * RANGE_BASE_9: SOC_ROT (Idx 2) + * RANGE_BASE_10: SOC_ROT (Idx 2) + * RANGE_BASE_11: SOC_ROT (Idx 2) + * RANGE_BASE_12: SOC_ROT (Idx 2) + * RANGE_BASE_13: SOC_ROT (Idx 2) + * RANGE_BASE_14: SOC_ROT (Idx 2) + * RANGE_BASE_15: SOC_ROT (Idx 2) + * RANGE_BASE_16: SOC_ROT (Idx 2) + * RANGE_BASE_17: SOC_ROT (Idx 2) + * RANGE_BASE_18: SOC_ROT (Idx 2) + * RANGE_BASE_19: SOC_ROT (Idx 2) + * RANGE_BASE_20: SOC_ROT (Idx 2) + * RANGE_BASE_21: SOC_ROT (Idx 2) + * RANGE_BASE_22: SOC_ROT (Idx 2) + * RANGE_BASE_23: SOC_ROT (Idx 2) + * RANGE_BASE_24: SOC_ROT (Idx 2) + * RANGE_BASE_25: SOC_ROT (Idx 2) + * RANGE_BASE_26: SOC_ROT (Idx 2) + * RANGE_BASE_27: SOC_ROT (Idx 2) + * RANGE_BASE_28: SOC_ROT (Idx 2) + * RANGE_BASE_29: SOC_ROT (Idx 2) + * RANGE_BASE_30: SOC_ROT (Idx 2) + * RANGE_BASE_31: SOC_ROT (Idx 2) + * RANGE_LIMIT_0: SOC_ROT (Idx 2) + * RANGE_LIMIT_1: SOC_ROT (Idx 2) + * RANGE_LIMIT_2: SOC_ROT (Idx 2) + * RANGE_LIMIT_3: SOC_ROT (Idx 2) + * RANGE_LIMIT_4: SOC_ROT (Idx 2) + * RANGE_LIMIT_5: SOC_ROT (Idx 2) + * RANGE_LIMIT_6: SOC_ROT (Idx 2) + * RANGE_LIMIT_7: SOC_ROT (Idx 2) + * RANGE_LIMIT_8: SOC_ROT (Idx 2) + * RANGE_LIMIT_9: SOC_ROT (Idx 2) + * RANGE_LIMIT_10: SOC_ROT (Idx 2) + * RANGE_LIMIT_11: SOC_ROT (Idx 2) + * RANGE_LIMIT_12: SOC_ROT (Idx 2) + * RANGE_LIMIT_13: SOC_ROT (Idx 2) + * RANGE_LIMIT_14: SOC_ROT (Idx 2) + * RANGE_LIMIT_15: SOC_ROT (Idx 2) + * RANGE_LIMIT_16: SOC_ROT (Idx 2) + * RANGE_LIMIT_17: SOC_ROT (Idx 2) + * RANGE_LIMIT_18: SOC_ROT (Idx 2) + * RANGE_LIMIT_19: SOC_ROT (Idx 2) + * RANGE_LIMIT_20: SOC_ROT (Idx 2) + * RANGE_LIMIT_21: SOC_ROT (Idx 2) + * RANGE_LIMIT_22: SOC_ROT (Idx 2) + * RANGE_LIMIT_23: SOC_ROT (Idx 2) + * RANGE_LIMIT_24: SOC_ROT (Idx 2) + * RANGE_LIMIT_25: SOC_ROT (Idx 2) + * RANGE_LIMIT_26: SOC_ROT (Idx 2) + * RANGE_LIMIT_27: SOC_ROT (Idx 2) + * RANGE_LIMIT_28: SOC_ROT (Idx 2) + * RANGE_LIMIT_29: SOC_ROT (Idx 2) + * RANGE_LIMIT_30: SOC_ROT (Idx 2) + * RANGE_LIMIT_31: SOC_ROT (Idx 2) + * RANGE_PERM_0: SOC_ROT (Idx 2) + * RANGE_PERM_1: SOC_ROT (Idx 2) + * RANGE_PERM_2: SOC_ROT (Idx 2) + * RANGE_PERM_3: SOC_ROT (Idx 2) + * RANGE_PERM_4: SOC_ROT (Idx 2) + * RANGE_PERM_5: SOC_ROT (Idx 2) + * RANGE_PERM_6: SOC_ROT (Idx 2) + * RANGE_PERM_7: SOC_ROT (Idx 2) + * RANGE_PERM_8: SOC_ROT (Idx 2) + * RANGE_PERM_9: SOC_ROT (Idx 2) + * RANGE_PERM_10: SOC_ROT (Idx 2) + * RANGE_PERM_11: SOC_ROT (Idx 2) + * RANGE_PERM_12: SOC_ROT (Idx 2) + * RANGE_PERM_13: SOC_ROT (Idx 2) + * RANGE_PERM_14: SOC_ROT (Idx 2) + * RANGE_PERM_15: SOC_ROT (Idx 2) + * RANGE_PERM_16: SOC_ROT (Idx 2) + * RANGE_PERM_17: SOC_ROT (Idx 2) + * RANGE_PERM_18: SOC_ROT (Idx 2) + * RANGE_PERM_19: SOC_ROT (Idx 2) + * RANGE_PERM_20: SOC_ROT (Idx 2) + * RANGE_PERM_21: SOC_ROT (Idx 2) + * RANGE_PERM_22: SOC_ROT (Idx 2) + * RANGE_PERM_23: SOC_ROT (Idx 2) + * RANGE_PERM_24: SOC_ROT (Idx 2) + * RANGE_PERM_25: SOC_ROT (Idx 2) + * RANGE_PERM_26: SOC_ROT (Idx 2) + * RANGE_PERM_27: SOC_ROT (Idx 2) + * RANGE_PERM_28: SOC_ROT (Idx 2) + * RANGE_PERM_29: SOC_ROT (Idx 2) + * RANGE_PERM_30: SOC_ROT (Idx 2) + * RANGE_PERM_31: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_0: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_1: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_2: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_3: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_4: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_5: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_6: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_7: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_8: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_9: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_10: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_11: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_12: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_13: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_14: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_15: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_16: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_17: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_18: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_19: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_20: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_21: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_22: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_23: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_24: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_25: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_26: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_27: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_28: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_29: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_30: SOC_ROT (Idx 2) + * RANGE_RACL_POLICY_SHADOWED_31: SOC_ROT (Idx 2) + */ + parameter int unsigned RACL_POLICY_SEL_AC_RANGE_CHECK [167] = '{2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}; + endpackage diff --git a/util/topgen.py b/util/topgen.py index 2a8e6baf17bb65..0a74483d262d77 100755 --- a/util/topgen.py +++ b/util/topgen.py @@ -565,14 +565,23 @@ def generate_ac_range_check(topcfg: Dict[str, object], out_path: Path) -> None: log.info('Generating ac_range_check with ipgen') topname = topcfg['name'] + # Determine RACL params from the top-level config, otherwise use ipgen's default values + racl_params = {} + if 'racl_config' in topcfg: + racl_params = { + 'nr_role_bits': topcfg['racl']['nr_role_bits'], + 'nr_ctn_uid_bits': topcfg['racl']['nr_ctn_uid_bits'] + } + # Get the AC Range Check instance ac_ranges = lib.find_module(topcfg['module'], 'ac_range_check') params = { - "num_ranges": ac_ranges['ipgen_param']['num_ranges'], - "module_instance_name": ac_ranges['type'] + 'num_ranges': ac_ranges['ipgen_param']['num_ranges'], + 'module_instance_name': ac_ranges['type'] } + params.update(racl_params) - ipgen_render("ac_range_check", topname, params, out_path) + ipgen_render('ac_range_check', topname, params, out_path) # Generate RACL collateral @@ -982,13 +991,13 @@ def _process_top( if lib.find_module(completecfg['module'], 'rstmgr'): generate_rstmgr(completecfg, out_path) + # Generate RACL collateral + generate_racl(completecfg, name_to_block, out_path) + # Generate ac_range_check if there is an instance if lib.find_module(completecfg['module'], 'ac_range_check'): generate_ac_range_check(completecfg, out_path) - # Generate RACL collateral - generate_racl(completecfg, name_to_block, out_path) - # Generate top only modules # These modules are not ipgen, but are not in hw/ip generate_top_only(top_only_dict, cfg_path, top_name, args.hjson_path)