-
Notifications
You must be signed in to change notification settings - Fork 80
/
non-standard-hisi_hip08.c
1047 lines (919 loc) · 28.2 KB
/
non-standard-hisi_hip08.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) 2019 Hisilicon Limited.
*/
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include "non-standard-hisilicon.h"
#include "ras-logger.h"
#include "ras-non-standard-handler.h"
#include "ras-report.h"
#include "types.h"
/* HISI OEM error definitions */
/* HISI OEM format1 error definitions */
#define HISI_OEM_MODULE_ID_MN 0
#define HISI_OEM_MODULE_ID_PLL 1
#define HISI_OEM_MODULE_ID_SLLC 2
#define HISI_OEM_MODULE_ID_AA 3
#define HISI_OEM_MODULE_ID_SIOE 4
#define HISI_OEM_MODULE_ID_POE 5
#define HISI_OEM_MODULE_ID_DISP 8
#define HISI_OEM_MODULE_ID_LPC 9
#define HISI_OEM_MODULE_ID_GIC 13
#define HISI_OEM_MODULE_ID_RDE 14
#define HISI_OEM_MODULE_ID_SAS 15
#define HISI_OEM_MODULE_ID_SATA 16
#define HISI_OEM_MODULE_ID_USB 17
#define HISI_OEM_VALID_SOC_ID BIT(0)
#define HISI_OEM_VALID_SOCKET_ID BIT(1)
#define HISI_OEM_VALID_NIMBUS_ID BIT(2)
#define HISI_OEM_VALID_MODULE_ID BIT(3)
#define HISI_OEM_VALID_SUB_MODULE_ID BIT(4)
#define HISI_OEM_VALID_ERR_SEVERITY BIT(5)
#define HISI_OEM_TYPE1_VALID_ERR_MISC_0 BIT(6)
#define HISI_OEM_TYPE1_VALID_ERR_MISC_1 BIT(7)
#define HISI_OEM_TYPE1_VALID_ERR_MISC_2 BIT(8)
#define HISI_OEM_TYPE1_VALID_ERR_MISC_3 BIT(9)
#define HISI_OEM_TYPE1_VALID_ERR_MISC_4 BIT(10)
#define HISI_OEM_TYPE1_VALID_ERR_ADDR BIT(11)
/* HISI OEM format2 error definitions */
#define HISI_OEM_MODULE_ID_SMMU 0
#define HISI_OEM_MODULE_ID_HHA 1
#define HISI_OEM_MODULE_ID_PA 2
#define HISI_OEM_MODULE_ID_HLLC 3
#define HISI_OEM_MODULE_ID_DDRC 4
#define HISI_OEM_MODULE_ID_L3T 5
#define HISI_OEM_MODULE_ID_L3D 6
#define HISI_OEM_TYPE2_VALID_ERR_FR BIT(6)
#define HISI_OEM_TYPE2_VALID_ERR_CTRL BIT(7)
#define HISI_OEM_TYPE2_VALID_ERR_STATUS BIT(8)
#define HISI_OEM_TYPE2_VALID_ERR_ADDR BIT(9)
#define HISI_OEM_TYPE2_VALID_ERR_MISC_0 BIT(10)
#define HISI_OEM_TYPE2_VALID_ERR_MISC_1 BIT(11)
/* HISI PCIe Local error definitions */
#define HISI_PCIE_SUB_MODULE_ID_AP 0
#define HISI_PCIE_SUB_MODULE_ID_TL 1
#define HISI_PCIE_SUB_MODULE_ID_MAC 2
#define HISI_PCIE_SUB_MODULE_ID_DL 3
#define HISI_PCIE_SUB_MODULE_ID_SDI 4
#define HISI_PCIE_LOCAL_VALID_VERSION BIT(0)
#define HISI_PCIE_LOCAL_VALID_SOC_ID BIT(1)
#define HISI_PCIE_LOCAL_VALID_SOCKET_ID BIT(2)
#define HISI_PCIE_LOCAL_VALID_NIMBUS_ID BIT(3)
#define HISI_PCIE_LOCAL_VALID_SUB_MODULE_ID BIT(4)
#define HISI_PCIE_LOCAL_VALID_CORE_ID BIT(5)
#define HISI_PCIE_LOCAL_VALID_PORT_ID BIT(6)
#define HISI_PCIE_LOCAL_VALID_ERR_TYPE BIT(7)
#define HISI_PCIE_LOCAL_VALID_ERR_SEVERITY BIT(8)
#define HISI_PCIE_LOCAL_VALID_ERR_MISC 9
#define HISI_PCIE_LOCAL_ERR_MISC_MAX 33
#define HISI_BUF_LEN 1024
struct hisi_oem_type1_err_sec {
uint32_t val_bits;
uint8_t version;
uint8_t soc_id;
uint8_t socket_id;
uint8_t nimbus_id;
uint8_t module_id;
uint8_t sub_module_id;
uint8_t err_severity;
uint8_t reserv;
uint32_t err_misc_0;
uint32_t err_misc_1;
uint32_t err_misc_2;
uint32_t err_misc_3;
uint32_t err_misc_4;
uint64_t err_addr;
};
struct hisi_oem_type2_err_sec {
uint32_t val_bits;
uint8_t version;
uint8_t soc_id;
uint8_t socket_id;
uint8_t nimbus_id;
uint8_t module_id;
uint8_t sub_module_id;
uint8_t err_severity;
uint8_t reserv;
uint32_t err_fr_0;
uint32_t err_fr_1;
uint32_t err_ctrl_0;
uint32_t err_ctrl_1;
uint32_t err_status_0;
uint32_t err_status_1;
uint32_t err_addr_0;
uint32_t err_addr_1;
uint32_t err_misc0_0;
uint32_t err_misc0_1;
uint32_t err_misc1_0;
uint32_t err_misc1_1;
};
struct hisi_pcie_local_err_sec {
uint64_t val_bits;
uint8_t version;
uint8_t soc_id;
uint8_t socket_id;
uint8_t nimbus_id;
uint8_t sub_module_id;
uint8_t core_id;
uint8_t port_id;
uint8_t err_severity;
uint16_t err_type;
uint8_t reserv[2];
uint32_t err_misc[HISI_PCIE_LOCAL_ERR_MISC_MAX];
};
enum {
HIP08_OEM_TYPE1_FIELD_ID,
HIP08_OEM_TYPE1_FIELD_TIMESTAMP,
HIP08_OEM_TYPE1_FIELD_VERSION,
HIP08_OEM_TYPE1_FIELD_SOC_ID,
HIP08_OEM_TYPE1_FIELD_SOCKET_ID,
HIP08_OEM_TYPE1_FIELD_NIMBUS_ID,
HIP08_OEM_TYPE1_FIELD_MODULE_ID,
HIP08_OEM_TYPE1_FIELD_SUB_MODULE_ID,
HIP08_OEM_TYPE1_FIELD_ERR_SEV,
HIP08_OEM_TYPE1_FIELD_REGS_DUMP,
};
enum {
HIP08_OEM_TYPE2_FIELD_ID,
HIP08_OEM_TYPE2_FIELD_TIMESTAMP,
HIP08_OEM_TYPE2_FIELD_VERSION,
HIP08_OEM_TYPE2_FIELD_SOC_ID,
HIP08_OEM_TYPE2_FIELD_SOCKET_ID,
HIP08_OEM_TYPE2_FIELD_NIMBUS_ID,
HIP08_OEM_TYPE2_FIELD_MODULE_ID,
HIP08_OEM_TYPE2_FIELD_SUB_MODULE_ID,
HIP08_OEM_TYPE2_FIELD_ERR_SEV,
HIP08_OEM_TYPE2_FIELD_REGS_DUMP,
};
enum {
HIP08_PCIE_LOCAL_FIELD_ID,
HIP08_PCIE_LOCAL_FIELD_TIMESTAMP,
HIP08_PCIE_LOCAL_FIELD_VERSION,
HIP08_PCIE_LOCAL_FIELD_SOC_ID,
HIP08_PCIE_LOCAL_FIELD_SOCKET_ID,
HIP08_PCIE_LOCAL_FIELD_NIMBUS_ID,
HIP08_PCIE_LOCAL_FIELD_SUB_MODULE_ID,
HIP08_PCIE_LOCAL_FIELD_CORE_ID,
HIP08_PCIE_LOCAL_FIELD_PORT_ID,
HIP08_PCIE_LOCAL_FIELD_ERR_SEV,
HIP08_PCIE_LOCAL_FIELD_ERR_TYPE,
HIP08_PCIE_LOCAL_FIELD_REGS_DUMP,
};
struct hisi_module_info {
int id;
const char *name;
const char * const *sub;
int sub_num;
};
static const char * const pll_submodule_name[] = {
"TB_PLL0",
"TB_PLL1",
"TB_PLL2",
"TB_PLL3",
"TA_PLL0",
"TA_PLL1",
"TA_PLL2",
"TA_PLL3",
"NIMBUS_PLL0",
"NIMBUS_PLL1",
"NIMBUS_PLL2",
"NIMBUS_PLL3",
"NIMBUS_PLL4",
};
static const char * const sllc_submodule_name[] = {
"TB_SLLC0",
"TB_SLLC1",
"TB_SLLC2",
"TA_SLLC0",
"TA_SLLC1",
"TA_SLLC2",
"NIMBUS_SLLC0",
"NIMBUS_SLLC1",
};
static const char * const sioe_submodule_name[] = {
"TB_SIOE0",
"TB_SIOE1",
"TB_SIOE2",
"TB_SIOE3",
"TA_SIOE0",
"TA_SIOE1",
"TA_SIOE2",
"TA_SIOE3",
"NIMBUS_SIOE0",
"NIMBUS_SIOE1",
};
static const char * const poe_submodule_name[] = {
"TB_POE",
"TA_POE",
};
static const char * const disp_submodule_name[] = {
"TB_PERI_DISP",
"TB_POE_DISP",
"TB_GIC_DISP",
"TA_PERI_DISP",
"TA_POE_DISP",
"TA_GIC_DISP",
"HAC_DISP",
"PCIE_DISP",
"IO_MGMT_DISP",
"NETWORK_DISP",
};
static const char * const sas_submodule_name[] = {
"SAS0",
"SAS1",
};
static const struct hisi_module_info hisi_oem_type1_module[] = {
{
.id = HISI_OEM_MODULE_ID_PLL,
.name = "PLL",
.sub = pll_submodule_name,
.sub_num = ARRAY_SIZE(pll_submodule_name),
},
{
.id = HISI_OEM_MODULE_ID_SAS,
.name = "SAS",
.sub = sas_submodule_name,
.sub_num = ARRAY_SIZE(sas_submodule_name),
},
{
.id = HISI_OEM_MODULE_ID_POE,
.name = "POE",
.sub = poe_submodule_name,
.sub_num = ARRAY_SIZE(poe_submodule_name),
},
{
.id = HISI_OEM_MODULE_ID_SLLC,
.name = "SLLC",
.sub = sllc_submodule_name,
.sub_num = ARRAY_SIZE(sllc_submodule_name),
},
{
.id = HISI_OEM_MODULE_ID_SIOE,
.name = "SIOE",
.sub = sioe_submodule_name,
.sub_num = ARRAY_SIZE(sioe_submodule_name),
},
{
.id = HISI_OEM_MODULE_ID_DISP,
.name = "DISP",
.sub = disp_submodule_name,
.sub_num = ARRAY_SIZE(disp_submodule_name),
},
{
.id = HISI_OEM_MODULE_ID_MN,
.name = "MN",
},
{
.id = HISI_OEM_MODULE_ID_AA,
.name = "AA",
},
{
.id = HISI_OEM_MODULE_ID_LPC,
.name = "LPC",
},
{
.id = HISI_OEM_MODULE_ID_GIC,
.name = "GIC",
},
{
.id = HISI_OEM_MODULE_ID_RDE,
.name = "RDE",
},
{
.id = HISI_OEM_MODULE_ID_SATA,
.name = "SATA",
},
{
.id = HISI_OEM_MODULE_ID_USB,
.name = "USB",
},
{
}
};
static const char * const smmu_submodule_name[] = {
"HAC_SMMU",
"PCIE_SMMU",
"MGMT_SMMU",
"NIC_SMMU",
};
static const char * const hllc_submodule_name[] = {
"HLLC0",
"HLLC1",
"HLLC2",
};
static const char * const hha_submodule_name[] = {
"TB_HHA0",
"TB_HHA1",
"TA_HHA0",
"TA_HHA1"
};
static const char * const ddrc_submodule_name[] = {
"TB_DDRC0",
"TB_DDRC1",
"TB_DDRC2",
"TB_DDRC3",
"TA_DDRC0",
"TA_DDRC1",
"TA_DDRC2",
"TA_DDRC3",
};
static const char * const l3tag_submodule_name[] = {
"TB_PARTITION0",
"TB_PARTITION1",
"TB_PARTITION2",
"TB_PARTITION3",
"TB_PARTITION4",
"TB_PARTITION5",
"TB_PARTITION6",
"TB_PARTITION7",
"TA_PARTITION0",
"TA_PARTITION1",
"TA_PARTITION2",
"TA_PARTITION3",
"TA_PARTITION4",
"TA_PARTITION5",
"TA_PARTITION6",
"TA_PARTITION7",
};
static const char * const l3data_submodule_name[] = {
"TB_BANK0",
"TB_BANK1",
"TB_BANK2",
"TB_BANK3",
"TA_BANK0",
"TA_BANK1",
"TA_BANK2",
"TA_BANK3",
};
static const struct hisi_module_info hisi_oem_type2_module[] = {
{
.id = HISI_OEM_MODULE_ID_SMMU,
.name = "SMMU",
.sub = smmu_submodule_name,
.sub_num = ARRAY_SIZE(smmu_submodule_name),
},
{
.id = HISI_OEM_MODULE_ID_HHA,
.name = "HHA",
.sub = hha_submodule_name,
.sub_num = ARRAY_SIZE(hha_submodule_name),
},
{
.id = HISI_OEM_MODULE_ID_PA,
.name = "PA",
},
{
.id = HISI_OEM_MODULE_ID_HLLC,
.name = "HLLC",
.sub = hllc_submodule_name,
.sub_num = ARRAY_SIZE(hllc_submodule_name),
},
{
.id = HISI_OEM_MODULE_ID_DDRC,
.name = "DDRC",
.sub = ddrc_submodule_name,
.sub_num = ARRAY_SIZE(ddrc_submodule_name),
},
{
.id = HISI_OEM_MODULE_ID_L3T,
.name = "L3TAG",
.sub = l3tag_submodule_name,
.sub_num = ARRAY_SIZE(l3tag_submodule_name),
},
{
.id = HISI_OEM_MODULE_ID_L3D,
.name = "L3DATA",
.sub = l3data_submodule_name,
.sub_num = ARRAY_SIZE(l3data_submodule_name),
},
{
}
};
static const char * const oem_module_name(const struct hisi_module_info *info,
uint8_t module_id)
{
const struct hisi_module_info *module = &info[0];
for (; module->name; module++) {
if (module->id != module_id)
continue;
return module->name;
}
return "unknown";
}
static const char * const oem_submodule_name(const struct hisi_module_info *info,
uint8_t module_id, uint8_t sub_module_id)
{
const struct hisi_module_info *module = &info[0];
for (; module->name; module++) {
const char * const *submodule = module->sub;
if (module->id != module_id)
continue;
if (!module->sub)
return module->name;
if (sub_module_id >= module->sub_num)
return "unknown";
return submodule[sub_module_id];
}
return "unknown";
}
static char *pcie_local_sub_module_name(uint8_t id)
{
switch (id) {
case HISI_PCIE_SUB_MODULE_ID_AP: return "AP_Layer";
case HISI_PCIE_SUB_MODULE_ID_TL: return "TL_Layer";
case HISI_PCIE_SUB_MODULE_ID_MAC: return "MAC_Layer";
case HISI_PCIE_SUB_MODULE_ID_DL: return "DL_Layer";
case HISI_PCIE_SUB_MODULE_ID_SDI: return "SDI_Layer";
default:
break;
}
return "unknown";
}
#ifdef HAVE_SQLITE3
static const struct db_fields hip08_oem_event_fields[] = {
{ .name = "id", .type = "INTEGER PRIMARY KEY" },
{ .name = "timestamp", .type = "TEXT" },
{ .name = "version", .type = "INTEGER" },
{ .name = "soc_id", .type = "INTEGER" },
{ .name = "socket_id", .type = "INTEGER" },
{ .name = "nimbus_id", .type = "INTEGER" },
{ .name = "module_id", .type = "TEXT" },
{ .name = "sub_module_id", .type = "TEXT" },
{ .name = "err_severity", .type = "TEXT" },
{ .name = "regs_dump", .type = "TEXT" },
};
static const struct db_table_descriptor hip08_oem_type1_event_tab = {
.name = "hip08_oem_type1_event_v2",
.fields = hip08_oem_event_fields,
.num_fields = ARRAY_SIZE(hip08_oem_event_fields),
};
static const struct db_table_descriptor hip08_oem_type2_event_tab = {
.name = "hip08_oem_type2_event_v2",
.fields = hip08_oem_event_fields,
.num_fields = ARRAY_SIZE(hip08_oem_event_fields),
};
static const struct db_fields hip08_pcie_local_event_fields[] = {
{ .name = "id", .type = "INTEGER PRIMARY KEY" },
{ .name = "timestamp", .type = "TEXT" },
{ .name = "version", .type = "INTEGER" },
{ .name = "soc_id", .type = "INTEGER" },
{ .name = "socket_id", .type = "INTEGER" },
{ .name = "nimbus_id", .type = "INTEGER" },
{ .name = "sub_module_id", .type = "TEXT" },
{ .name = "core_id", .type = "INTEGER" },
{ .name = "port_id", .type = "INTEGER" },
{ .name = "err_severity", .type = "TEXT" },
{ .name = "err_type", .type = "INTEGER" },
{ .name = "regs_dump", .type = "TEXT" },
};
static const struct db_table_descriptor hip08_pcie_local_event_tab = {
.name = "hip08_pcie_local_event_v2",
.fields = hip08_pcie_local_event_fields,
.num_fields = ARRAY_SIZE(hip08_pcie_local_event_fields),
};
#endif
#define IN_RANGE(p, start, end) ((p) >= (start) && (p) < (end))
static void decode_oem_type1_err_hdr(struct ras_ns_ev_decoder *ev_decoder,
struct trace_seq *s,
const struct hisi_oem_type1_err_sec *err)
{
char buf[HISI_BUF_LEN];
char *p = buf;
char *end = buf + HISI_BUF_LEN;
p += snprintf(p, end - p, "[ table_version=%d ", err->version);
record_vendor_data(ev_decoder, HISI_OEM_DATA_TYPE_INT,
HIP08_OEM_TYPE1_FIELD_VERSION, err->version, NULL);
if (err->val_bits & HISI_OEM_VALID_SOC_ID && IN_RANGE(p, buf, end)) {
p += snprintf(p, end - p, "SOC_ID=%d ", err->soc_id);
record_vendor_data(ev_decoder, HISI_OEM_DATA_TYPE_INT,
HIP08_OEM_TYPE1_FIELD_SOC_ID,
err->soc_id, NULL);
}
if (err->val_bits & HISI_OEM_VALID_SOCKET_ID && IN_RANGE(p, buf, end)) {
p += snprintf(p, end - p, "socket_ID=%d ", err->socket_id);
record_vendor_data(ev_decoder, HISI_OEM_DATA_TYPE_INT,
HIP08_OEM_TYPE1_FIELD_SOCKET_ID,
err->socket_id, NULL);
}
if (err->val_bits & HISI_OEM_VALID_NIMBUS_ID && IN_RANGE(p, buf, end)) {
p += snprintf(p, end - p, "nimbus_ID=%d ", err->nimbus_id);
record_vendor_data(ev_decoder, HISI_OEM_DATA_TYPE_INT,
HIP08_OEM_TYPE1_FIELD_NIMBUS_ID,
err->nimbus_id, NULL);
}
if (err->val_bits & HISI_OEM_VALID_MODULE_ID && IN_RANGE(p, buf, end)) {
const char *str = oem_module_name(hisi_oem_type1_module,
err->module_id);
p += snprintf(p, end - p, "module=%s ", str);
record_vendor_data(ev_decoder, HISI_OEM_DATA_TYPE_TEXT,
HIP08_OEM_TYPE1_FIELD_MODULE_ID,
0, str);
}
if (err->val_bits & HISI_OEM_VALID_SUB_MODULE_ID &&
IN_RANGE(p, buf, end)) {
const char *str = oem_submodule_name(hisi_oem_type1_module,
err->module_id,
err->sub_module_id);
p += snprintf(p, end - p, "submodule=%s ", str);
record_vendor_data(ev_decoder, HISI_OEM_DATA_TYPE_TEXT,
HIP08_OEM_TYPE1_FIELD_SUB_MODULE_ID,
0, str);
}
if (err->val_bits & HISI_OEM_VALID_ERR_SEVERITY &&
IN_RANGE(p, buf, end)) {
p += snprintf(p, end - p, "error_severity=%s ",
err_severity(err->err_severity));
record_vendor_data(ev_decoder, HISI_OEM_DATA_TYPE_TEXT,
HIP08_OEM_TYPE1_FIELD_ERR_SEV,
0, err_severity(err->err_severity));
}
if (IN_RANGE(p, buf, end))
p += snprintf(p, end - p, "]");
trace_seq_printf(s, "%s\n", buf);
}
static void decode_oem_type1_err_regs(struct ras_ns_ev_decoder *ev_decoder,
struct trace_seq *s,
const struct hisi_oem_type1_err_sec *err)
{
char buf[HISI_BUF_LEN];
char *p = buf;
char *end = buf + HISI_BUF_LEN;
trace_seq_printf(s, "Reg Dump:\n");
if (err->val_bits & HISI_OEM_TYPE1_VALID_ERR_MISC_0) {
trace_seq_printf(s, "ERR_MISC0=0x%x\n", err->err_misc_0);
p += snprintf(p, end - p, "ERR_MISC0=0x%x ", err->err_misc_0);
}
if (err->val_bits & HISI_OEM_TYPE1_VALID_ERR_MISC_1 &&
IN_RANGE(p, buf, end)) {
trace_seq_printf(s, "ERR_MISC1=0x%x\n", err->err_misc_1);
p += snprintf(p, end - p, "ERR_MISC1=0x%x ", err->err_misc_1);
}
if (err->val_bits & HISI_OEM_TYPE1_VALID_ERR_MISC_2 &&
IN_RANGE(p, buf, end)) {
trace_seq_printf(s, "ERR_MISC2=0x%x\n", err->err_misc_2);
p += snprintf(p, end - p, "ERR_MISC2=0x%x ", err->err_misc_2);
}
if (err->val_bits & HISI_OEM_TYPE1_VALID_ERR_MISC_3 &&
IN_RANGE(p, buf, end)) {
trace_seq_printf(s, "ERR_MISC3=0x%x\n", err->err_misc_3);
p += snprintf(p, end - p, "ERR_MISC3=0x%x ", err->err_misc_3);
}
if (err->val_bits & HISI_OEM_TYPE1_VALID_ERR_MISC_4 &&
IN_RANGE(p, buf, end)) {
trace_seq_printf(s, "ERR_MISC4=0x%x\n", err->err_misc_4);
p += snprintf(p, end - p, "ERR_MISC4=0x%x ", err->err_misc_4);
}
if (err->val_bits & HISI_OEM_TYPE1_VALID_ERR_ADDR &&
IN_RANGE(p, buf, end)) {
trace_seq_printf(s, "ERR_ADDR=0x%llx\n",
(unsigned long long)err->err_addr);
p += snprintf(p, end - p, "ERR_ADDR=0x%llx ",
(unsigned long long)err->err_addr);
}
if (p > buf && p < end) {
p--;
*p = '\0';
}
record_vendor_data(ev_decoder, HISI_OEM_DATA_TYPE_TEXT,
HIP08_OEM_TYPE1_FIELD_REGS_DUMP, 0, buf);
step_vendor_data_tab(ev_decoder, "hip08_oem_type1_event_tab");
}
static int add_hip08_oem_type1_table(struct ras_events *ras, struct ras_ns_ev_decoder *ev_decoder)
{
#ifdef HAVE_SQLITE3
if (ras->record_events && !ev_decoder->stmt_dec_record) {
if (ras_mc_add_vendor_table(ras, &ev_decoder->stmt_dec_record,
&hip08_oem_type1_event_tab) != SQLITE_OK) {
log(TERM, LOG_WARNING, "Failed to create sql hip08_oem_type1_event_tab\n");
return -1;
}
}
#endif
return 0;
}
/* error data decoding functions */
static int decode_hip08_oem_type1_error(struct ras_events *ras,
struct ras_ns_ev_decoder *ev_decoder,
struct trace_seq *s,
struct ras_non_standard_event *event)
{
const struct hisi_oem_type1_err_sec *err =
(struct hisi_oem_type1_err_sec *)event->error;
if (err->val_bits == 0) {
trace_seq_printf(s, "%s: no valid error information\n",
__func__);
return -1;
}
record_vendor_data(ev_decoder, HISI_OEM_DATA_TYPE_TEXT,
HIP08_OEM_TYPE1_FIELD_TIMESTAMP,
0, event->timestamp);
trace_seq_printf(s, "\nHISI HIP08: OEM Type-1 Error\n");
decode_oem_type1_err_hdr(ev_decoder, s, err);
decode_oem_type1_err_regs(ev_decoder, s, err);
return 0;
}
static void decode_oem_type2_err_hdr(struct ras_ns_ev_decoder *ev_decoder,
struct trace_seq *s,
const struct hisi_oem_type2_err_sec *err)
{
char buf[HISI_BUF_LEN];
char *p = buf;
char *end = buf + HISI_BUF_LEN;
p += snprintf(p, end - p, "[ table_version=%d ", err->version);
record_vendor_data(ev_decoder, HISI_OEM_DATA_TYPE_INT,
HIP08_OEM_TYPE2_FIELD_VERSION, err->version, NULL);
if (err->val_bits & HISI_OEM_VALID_SOC_ID && IN_RANGE(p, buf, end)) {
p += snprintf(p, end - p, "SOC_ID=%d ", err->soc_id);
record_vendor_data(ev_decoder, HISI_OEM_DATA_TYPE_INT,
HIP08_OEM_TYPE2_FIELD_SOC_ID,
err->soc_id, NULL);
}
if (err->val_bits & HISI_OEM_VALID_SOCKET_ID && IN_RANGE(p, buf, end)) {
p += snprintf(p, end - p, "socket_ID=%d ", err->socket_id);
record_vendor_data(ev_decoder, HISI_OEM_DATA_TYPE_INT,
HIP08_OEM_TYPE2_FIELD_SOCKET_ID,
err->socket_id, NULL);
}
if (err->val_bits & HISI_OEM_VALID_NIMBUS_ID && IN_RANGE(p, buf, end)) {
p += snprintf(p, end - p, "nimbus_ID=%d ", err->nimbus_id);
record_vendor_data(ev_decoder, HISI_OEM_DATA_TYPE_INT,
HIP08_OEM_TYPE2_FIELD_NIMBUS_ID,
err->nimbus_id, NULL);
}
if (err->val_bits & HISI_OEM_VALID_MODULE_ID && IN_RANGE(p, buf, end)) {
const char *str = oem_module_name(hisi_oem_type2_module,
err->module_id);
p += snprintf(p, end - p, "module=%s ", str);
record_vendor_data(ev_decoder, HISI_OEM_DATA_TYPE_TEXT,
HIP08_OEM_TYPE2_FIELD_MODULE_ID,
0, str);
}
if (err->val_bits & HISI_OEM_VALID_SUB_MODULE_ID &&
IN_RANGE(p, buf, end)) {
const char *str = oem_submodule_name(hisi_oem_type2_module,
err->module_id,
err->sub_module_id);
p += snprintf(p, end - p, "submodule=%s ", str);
record_vendor_data(ev_decoder, HISI_OEM_DATA_TYPE_TEXT,
HIP08_OEM_TYPE2_FIELD_SUB_MODULE_ID,
0, str);
}
if (err->val_bits & HISI_OEM_VALID_ERR_SEVERITY &&
IN_RANGE(p, buf, end)) {
p += snprintf(p, end - p, "error_severity=%s ",
err_severity(err->err_severity));
record_vendor_data(ev_decoder, HISI_OEM_DATA_TYPE_TEXT,
HIP08_OEM_TYPE2_FIELD_ERR_SEV,
0, err_severity(err->err_severity));
}
if (IN_RANGE(p, buf, end))
p += snprintf(p, end - p, "]");
trace_seq_printf(s, "%s\n", buf);
}
static void decode_oem_type2_err_regs(struct ras_ns_ev_decoder *ev_decoder,
struct trace_seq *s,
const struct hisi_oem_type2_err_sec *err)
{
char buf[HISI_BUF_LEN];
char *p = buf;
char *end = buf + HISI_BUF_LEN;
trace_seq_printf(s, "Reg Dump:\n");
if (err->val_bits & HISI_OEM_TYPE2_VALID_ERR_FR) {
trace_seq_printf(s, "ERR_FR_0=0x%x\n", err->err_fr_0);
trace_seq_printf(s, "ERR_FR_1=0x%x\n", err->err_fr_1);
p += snprintf(p, end - p, "ERR_FR_0=0x%x ERR_FR_1=0x%x ",
err->err_fr_0, err->err_fr_1);
}
if (err->val_bits & HISI_OEM_TYPE2_VALID_ERR_CTRL &&
IN_RANGE(p, buf, end)) {
trace_seq_printf(s, "ERR_CTRL_0=0x%x\n", err->err_ctrl_0);
trace_seq_printf(s, "ERR_CTRL_1=0x%x\n", err->err_ctrl_1);
p += snprintf(p, end - p, "ERR_CTRL_0=0x%x ERR_CTRL_1=0x%x ",
err->err_ctrl_0, err->err_ctrl_1);
}
if (err->val_bits & HISI_OEM_TYPE2_VALID_ERR_STATUS &&
IN_RANGE(p, buf, end)) {
trace_seq_printf(s, "ERR_STATUS_0=0x%x\n", err->err_status_0);
trace_seq_printf(s, "ERR_STATUS_1=0x%x\n", err->err_status_1);
p += snprintf(p, end - p, "ERR_STATUS_0=0x%x ERR_STATUS_1=0x%x ",
err->err_status_0, err->err_status_1);
}
if (err->val_bits & HISI_OEM_TYPE2_VALID_ERR_ADDR &&
IN_RANGE(p, buf, end)) {
trace_seq_printf(s, "ERR_ADDR_0=0x%x\n", err->err_addr_0);
trace_seq_printf(s, "ERR_ADDR_1=0x%x\n", err->err_addr_1);
p += snprintf(p, end - p, "ERR_ADDR_0=0x%x ERR_ADDR_1=0x%x ",
err->err_addr_0, err->err_addr_1);
}
if (err->val_bits & HISI_OEM_TYPE2_VALID_ERR_MISC_0 &&
IN_RANGE(p, buf, end)) {
trace_seq_printf(s, "ERR_MISC0_0=0x%x\n", err->err_misc0_0);
trace_seq_printf(s, "ERR_MISC0_1=0x%x\n", err->err_misc0_1);
p += snprintf(p, end - p, "ERR_MISC0_0=0x%x ERR_MISC0_1=0x%x ",
err->err_misc0_0, err->err_misc0_1);
}
if (err->val_bits & HISI_OEM_TYPE2_VALID_ERR_MISC_1 &&
IN_RANGE(p, buf, end)) {
trace_seq_printf(s, "ERR_MISC1_0=0x%x\n", err->err_misc1_0);
trace_seq_printf(s, "ERR_MISC1_1=0x%x\n", err->err_misc1_1);
p += snprintf(p, end - p, "ERR_MISC1_0=0x%x ERR_MISC1_1=0x%x ",
err->err_misc1_0, err->err_misc1_1);
}
if (p > buf && p < end) {
p--;
*p = '\0';
}
record_vendor_data(ev_decoder, HISI_OEM_DATA_TYPE_TEXT,
HIP08_OEM_TYPE2_FIELD_REGS_DUMP, 0, buf);
step_vendor_data_tab(ev_decoder, "hip08_oem_type2_event_tab");
}
static int add_hip08_oem_type2_table(struct ras_events *ras, struct ras_ns_ev_decoder *ev_decoder)
{
#ifdef HAVE_SQLITE3
if (ras->record_events && !ev_decoder->stmt_dec_record) {
if (ras_mc_add_vendor_table(ras, &ev_decoder->stmt_dec_record,
&hip08_oem_type2_event_tab) != SQLITE_OK) {
log(TERM, LOG_WARNING, "Failed to create sql hip08_oem_type2_event_tab\n");
return -1;
}
}
#endif
return 0;
}
static int decode_hip08_oem_type2_error(struct ras_events *ras,
struct ras_ns_ev_decoder *ev_decoder,
struct trace_seq *s,
struct ras_non_standard_event *event)
{
const struct hisi_oem_type2_err_sec *err =
(struct hisi_oem_type2_err_sec *)event->error;
if (err->val_bits == 0) {
trace_seq_printf(s, "%s: no valid error information\n",
__func__);
return -1;
}
record_vendor_data(ev_decoder, HISI_OEM_DATA_TYPE_TEXT,
HIP08_OEM_TYPE2_FIELD_TIMESTAMP,
0, event->timestamp);
trace_seq_printf(s, "\nHISI HIP08: OEM Type-2 Error\n");
decode_oem_type2_err_hdr(ev_decoder, s, err);
decode_oem_type2_err_regs(ev_decoder, s, err);
return 0;
}
static void decode_pcie_local_err_hdr(struct ras_ns_ev_decoder *ev_decoder,
struct trace_seq *s,
const struct hisi_pcie_local_err_sec *err)
{
char buf[HISI_BUF_LEN];
char *p = buf;
char *end = buf + HISI_BUF_LEN;
p += snprintf(p, end - p, "[ table_version=%d ", err->version);
record_vendor_data(ev_decoder, HISI_OEM_DATA_TYPE_INT,
HIP08_PCIE_LOCAL_FIELD_VERSION,
err->version, NULL);
if (err->val_bits & HISI_PCIE_LOCAL_VALID_SOC_ID &&
IN_RANGE(p, buf, end)) {
p += snprintf(p, end - p, "SOC_ID=%d ", err->soc_id);
record_vendor_data(ev_decoder, HISI_OEM_DATA_TYPE_INT,
HIP08_PCIE_LOCAL_FIELD_SOC_ID,
err->soc_id, NULL);
}
if (err->val_bits & HISI_PCIE_LOCAL_VALID_SOCKET_ID &&
IN_RANGE(p, buf, end)) {
p += snprintf(p, end - p, "socket_ID=%d ", err->socket_id);
record_vendor_data(ev_decoder, HISI_OEM_DATA_TYPE_INT,
HIP08_PCIE_LOCAL_FIELD_SOCKET_ID,
err->socket_id, NULL);
}
if (err->val_bits & HISI_PCIE_LOCAL_VALID_NIMBUS_ID &&
IN_RANGE(p, buf, end)) {
p += snprintf(p, end - p, "nimbus_ID=%d ", err->nimbus_id);
record_vendor_data(ev_decoder, HISI_OEM_DATA_TYPE_INT,
HIP08_PCIE_LOCAL_FIELD_NIMBUS_ID,
err->nimbus_id, NULL);
}
if (err->val_bits & HISI_PCIE_LOCAL_VALID_SUB_MODULE_ID &&
IN_RANGE(p, buf, end)) {
p += snprintf(p, end - p, "submodule=%s ",
pcie_local_sub_module_name(err->sub_module_id));
record_vendor_data(ev_decoder, HISI_OEM_DATA_TYPE_TEXT,
HIP08_PCIE_LOCAL_FIELD_SUB_MODULE_ID,
0, pcie_local_sub_module_name(err->sub_module_id));
}
if (err->val_bits & HISI_PCIE_LOCAL_VALID_CORE_ID &&
IN_RANGE(p, buf, end)) {
p += snprintf(p, end - p, "core_ID=core%d ", err->core_id);
record_vendor_data(ev_decoder, HISI_OEM_DATA_TYPE_INT,
HIP08_PCIE_LOCAL_FIELD_CORE_ID,
err->core_id, NULL);
}
if (err->val_bits & HISI_PCIE_LOCAL_VALID_PORT_ID &&
IN_RANGE(p, buf, end)) {
p += snprintf(p, end - p, "port_ID=port%d ", err->port_id);
record_vendor_data(ev_decoder, HISI_OEM_DATA_TYPE_INT,
HIP08_PCIE_LOCAL_FIELD_PORT_ID,
err->port_id, NULL);
}
if (err->val_bits & HISI_PCIE_LOCAL_VALID_ERR_SEVERITY &&
IN_RANGE(p, buf, end)) {
p += snprintf(p, end - p, "error_severity=%s ",
err_severity(err->err_severity));
record_vendor_data(ev_decoder, HISI_OEM_DATA_TYPE_TEXT,
HIP08_PCIE_LOCAL_FIELD_ERR_SEV,
0, err_severity(err->err_severity));
}
if (err->val_bits & HISI_PCIE_LOCAL_VALID_ERR_TYPE &&
IN_RANGE(p, buf, end)) {
p += snprintf(p, end - p, "error_type=0x%x ", err->err_type);
record_vendor_data(ev_decoder, HISI_OEM_DATA_TYPE_INT,
HIP08_PCIE_LOCAL_FIELD_ERR_TYPE,
err->err_type, NULL);
}
if (IN_RANGE(p, buf, end))
p += snprintf(p, end - p, "]");
trace_seq_printf(s, "%s\n", buf);
}
static void decode_pcie_local_err_regs(struct ras_ns_ev_decoder *ev_decoder,
struct trace_seq *s,
const struct hisi_pcie_local_err_sec *err)
{
char buf[HISI_BUF_LEN];
char *p = buf;
char *end = buf + HISI_BUF_LEN;
uint32_t i;
trace_seq_printf(s, "Reg Dump:\n");
for (i = 0; i < HISI_PCIE_LOCAL_ERR_MISC_MAX; i++) {
if (err->val_bits & BIT(HISI_PCIE_LOCAL_VALID_ERR_MISC + i) &&
IN_RANGE(p, buf, end)) {
trace_seq_printf(s, "ERR_MISC_%d=0x%x\n", i,
err->err_misc[i]);
p += snprintf(p, end - p, "ERR_MISC_%d=0x%x ",
i, err->err_misc[i]);
}
}
if (p > buf && p < end) {
p--;
*p = '\0';
}
record_vendor_data(ev_decoder, HISI_OEM_DATA_TYPE_TEXT,
HIP08_PCIE_LOCAL_FIELD_REGS_DUMP, 0, buf);
step_vendor_data_tab(ev_decoder, "hip08_pcie_local_event_tab");
}
static int add_hip08_pcie_local_table(struct ras_events *ras, struct ras_ns_ev_decoder *ev_decoder)
{
#ifdef HAVE_SQLITE3
if (ras->record_events && !ev_decoder->stmt_dec_record) {
if (ras_mc_add_vendor_table(ras, &ev_decoder->stmt_dec_record,
&hip08_pcie_local_event_tab) != SQLITE_OK) {
log(TERM, LOG_WARNING, "Failed to create sql hip08_pcie_local_event_tab\n");
return -1;
}
}
#endif
return 0;
}
static int decode_hip08_pcie_local_error(struct ras_events *ras,
struct ras_ns_ev_decoder *ev_decoder,
struct trace_seq *s,