diff --git a/README.md b/README.md
index 0941b69..5fb0556 100644
--- a/README.md
+++ b/README.md
@@ -617,7 +617,7 @@ _`fma4` on zen1, ISA in hypervisor, etc._
 |CPU|ISA|
 |:---:|---|
 |x86|`mmx` `sse` `sse2` `sse3` `ssse3` `sse41` `sse42` `sse4a` `xop` `avx` `f16c` `fma` `fma4` `avx2` `avx512f` `avx512bw` `avx512cd` `avx512dq` `avx512vl` `avx512vnni` `avx512bf16` `avx512ifma` `avx512vbmi` `avx512vbmi2` `avx512fp16` `avx512er` `avx5124fmaps` `avx5124vnniw` `avxvnni` `avxvnniint8` `avxifma`|
-|arm|`half` `edsp` `neon` `vfpv4` `idiv`|
+|arm|`half` `edsp` `neon` `vfpv4` `idiv` `asimdhp` `asimddp` `asimdfhm`|
 |aarch64|`neon` `vfpv4` `cpuid` `asimdrdm` `asimdhp` `asimddp` `asimdfhm` `bf16` `i8mm` `mte` `sve` `sve2` `svebf16` `svei8mm` `svef32mm` `pmull` `crc32` `aes` `sha1` `sha2` `sha3` `sha512` `sm3` `sm4` `amx`|
 |mips|`msa`|
 |powerpc|`vsx`|
diff --git a/main.c b/main.c
index 18fa661..016fbde 100644
--- a/main.c
+++ b/main.c
@@ -81,6 +81,9 @@ int main()
     PRINT_ISA_SUPPORT(neon)
     PRINT_ISA_SUPPORT(vfpv4)
     PRINT_ISA_SUPPORT(idiv)
+    PRINT_ISA_SUPPORT(asimdhp)
+    PRINT_ISA_SUPPORT(asimddp)
+    PRINT_ISA_SUPPORT(asimdfhm)
 
 #elif __mips__
     PRINT_ISA_SUPPORT(msa)
diff --git a/ruapu.h b/ruapu.h
index 2160b06..54c2553 100644
--- a/ruapu.h
+++ b/ruapu.h
@@ -252,12 +252,18 @@ RUAPU_INSTCODE(edsp, 0xfb20, 0x0000) // smlad r0,r0,r0,r0
 RUAPU_INSTCODE(neon, 0xef00, 0x0d40) // vadd.f32 q0,q0,q0
 RUAPU_INSTCODE(vfpv4, 0xeea0, 0x0a00) // vfma.f32 s0,s0,s0
 RUAPU_INSTCODE(idiv, 0x2003, 0xfb90, 0xf0f0) // movs r0,#3 + sdiv r0,r0,r0
+RUAPU_INSTCODE(asimdhp, 0xef10, 0x0d00) // vadd.f16 d0,d0,d0
+RUAPU_INSTCODE(asimddp, 0xfc20, 0x0d40) // vsdot.s8 q0,q0,q0
+RUAPU_INSTCODE(asimdfhm, 0xfc20, 0x0850) // vfmal.f16 q0,d0,d0
 #else
 RUAPU_INSTCODE(half, 0xe1dd00b0) // ldrh r0,[sp]
 RUAPU_INSTCODE(edsp, 0xe7000010) // smlad r0,r0,r0,r0
 RUAPU_INSTCODE(neon, 0xf2000d40) // vadd.f32 q0,q0,q0
 RUAPU_INSTCODE(vfpv4, 0xeea00a00) // vfma.f32 s0,s0,s0
 RUAPU_INSTCODE(idiv, 0xe3a00003, 0xe710f010) // movs r0,#3 + sdiv r0,r0,r0
+RUAPU_INSTCODE(asimdhp, 0xf2100d00) // vadd.f16 d0,d0,d0
+RUAPU_INSTCODE(asimddp, 0xfc200d40) // vsdot.s8 q0,q0,q0
+RUAPU_INSTCODE(asimdfhm, 0xfc200850) // vfmal.f16 q0,d0,d0
 #endif
 
 #elif __mips__