PolarFire-SoC
VKPSOC fail to load design on Libero lauched ModelSim #414
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wxtang123
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Reference designs, FPGA and development kits
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Can you please provide steps to reproducers this problem |
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I try to run simulation before synthesis,
but a error report as follow occured.
The IMAGE_SCALAR is v4.1.0 ,
what I may miss to run the baisc simulation on top design?
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