floo_noc.core

CAPI=2:
# Created by bender from the available manifest file.


name: '::floo_noc:'
filesets:
  spyglass_or_synthesis:
    file_type: systemVerilogSource
    files:
    - hw/test/floo_test_pkg.sv
    - hw/synth/floo_synth_axi_chimney.sv
    - hw/synth/floo_synth_narrow_wide_chimney.sv
    - hw/synth/floo_synth_router.sv
    - hw/synth/floo_synth_narrow_wide_router.sv
    - hw/synth/floo_synth_endpoint.sv
    depend:
    - ::idma:0.6.0
    - pulp-platform.org::common_cells:1.33.1
    - pulp-platform.org::common_verification:0.2.3
    - pulp-platform.org::axi:0.39.2
    - ::axi_riscv_atomics:0.8.2
  files_rtl:
    file_type: systemVerilogSource
    files:
    - hw/floo_pkg.sv
    - hw/floo_axi_pkg.sv
    - hw/floo_narrow_wide_pkg.sv
    - hw/floo_cut.sv
    - hw/floo_fifo.sv
    - hw/floo_cdc.sv
    - hw/floo_route_select.sv
    - hw/floo_route_comp.sv
    - hw/floo_vc_arbiter.sv
    - hw/floo_wormhole_arbiter.sv
    - hw/floo_simple_rob.sv
    - hw/floo_rob.sv
    - hw/floo_rob_wrapper.sv
    - hw/floo_meta_buffer.sv
    - hw/vc_router_util/floo_credit_counter.sv
    - hw/vc_router_util/floo_input_fifo.sv
    - hw/vc_router_util/floo_input_port.sv
    - hw/vc_router_util/floo_look_ahead_routing.sv
    - hw/vc_router_util/floo_mux.sv
    - hw/vc_router_util/floo_rr_arbiter.sv
    - hw/vc_router_util/floo_sa_global.sv
    - hw/vc_router_util/floo_sa_local.sv
    - hw/vc_router_util/floo_vc_assignment.sv
    - hw/vc_router_util/floo_vc_router_switch.sv
    - hw/vc_router_util/floo_vc_selection.sv
    - hw/floo_narrow_wide_join.sv
    - hw/floo_axi_chimney.sv
    - hw/floo_narrow_wide_chimney.sv
    - hw/floo_vc_narrow_wide_chimney.sv
    - hw/floo_router.sv
    - hw/floo_vc_router.sv
    - hw/floo_narrow_wide_router.sv
    - hw/floo_vc_narrow_wide_router.sv
    - hw/include/floo_noc/typedef.svh:
        is_include_file: true
        include_path: hw/include
    depend:
    - ::idma:0.6.0
    - pulp-platform.org::common_cells:1.33.1
    - pulp-platform.org::common_verification:0.2.3
    - pulp-platform.org::axi:0.39.2
    - ::axi_riscv_atomics:0.8.2
  test:
    file_type: systemVerilogSource
    files:
    - hw/test/floo_test_pkg.sv
    - hw/test/floo_axi_test_node.sv
    - hw/test/floo_axi_rand_slave.sv
    - hw/test/floo_dma_test_node.sv
    - hw/test/axi_reorder_compare.sv
    - hw/test/axi_reorder_remap_compare.sv
    - hw/test/axi_bw_monitor.sv
    - hw/test/floo_hbm_model.sv
    - hw/tb/tb_floo_axi_chimney.sv
    - hw/tb/tb_floo_narrow_wide_chimney.sv
    - hw/tb/tb_floo_router.sv
    - hw/tb/tb_floo_vc_router.sv
    - hw/tb/tb_floo_rob.sv
    - hw/tb/tb_floo_dma_chimney.sv
    - hw/tb/tb_floo_dma_nw_chimney.sv
    - hw/tb/tb_floo_dma_mesh.sv
    - hw/tb/tb_floo_vc_dma_mesh.sv
    - hw/test/include/tb_tasks.svh:
        is_include_file: true
        include_path: hw/test
    - hw/test/include/axi_print_txns.svh:
        is_include_file: true
        include_path: hw/test
    depend:
    - ::idma:0.6.0
    - pulp-platform.org::common_cells:1.33.1
    - pulp-platform.org::common_verification:0.2.3
    - pulp-platform.org::axi:0.39.2
    - ::axi_riscv_atomics:0.8.2
targets:
  default:
    filesets:
    - files_rtl
  simulation:
    filesets:
    - files_rtl
    - test