AtomicBuffer opaque methods #313
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Added opaque operations to AtomicBuffer. An opaque operation provides atomicity and visibility, but it doesn't provide any ordering guarantees beyond coherence. So it doesn't order loads/stores to different addresses, only to its own address. Opaque operations are great for performance counters or progress indicators and provide the least amount of overhead on the CPU (all modern CPUs are coherent); especially CPUs with a weak memory model like ARM or RISC-V.
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Added opaque operations to AtomicBuffer for int/long. An opaque loads/stores provides atomicity and visibility, but it doesn't provide any ordering guarantees beyond coherence. So it doesn't order loads/stores to different addresses (doesn't provide consistency), only to its own address (coherence). Opaque is very much like a C-style volatile and can be used in the same situation as the C++ memory_order_relaxed.
For more info see:
https://gee.cs.oswego.edu/dl/html/j9mm.html
Opaque operations are great for performance counters or progress indicators and provide the least amount of overhead on the CPU (all modern CPUs are coherent); especially ISA's with a weak memory model like ARM or RISC-V. It provides less value on the X86 since every store is a release store and every load is an acquire load.
Opaque is great for single writer multiple reader scenario's.
Idea:
Instead of using the naming 'opaque', the name 'relaxed' could be an idea. With relaxed coming from memory_order_relaxed.