From aa81fa54bf6e5ed7d51138bbe40b240551c0f7c9 Mon Sep 17 00:00:00 2001 From: Giovanni <561184+wargio@users.noreply.github.com> Date: Sun, 16 Feb 2025 20:18:26 +0800 Subject: [PATCH] Fix analysis cpu usage (#4909) * Fix dwarf mapping due wrong usage of cpu instead of plugin name * Add default ARM cpu as arm * Update `analysis.cpu` when `asm.cpu` is updated. --- librz/arch/dwarf_process.c | 6 +++--- librz/arch/p/asm/asm_arm_cs.c | 2 +- librz/core/cconfig.c | 2 ++ 3 files changed, 6 insertions(+), 4 deletions(-) diff --git a/librz/arch/dwarf_process.c b/librz/arch/dwarf_process.c index 3afb055d5f5..2c77bd6edcc 100644 --- a/librz/arch/dwarf_process.c +++ b/librz/arch/dwarf_process.c @@ -488,7 +488,7 @@ static const char *map_dwarf_reg_to_riscv_reg(ut32 reg_num) { * \param bits The architecture bitness * \return The function that maps a DWARF register number to a register name */ -static DWARF_RegisterMapping dwarf_register_mapping_query(RZ_NONNULL char *arch, int bits) { +static DWARF_RegisterMapping dwarf_register_mapping_query(RZ_NONNULL const char *arch, int bits) { if (RZ_STR_EQ(arch, "x86")) { if (bits == 64) { return map_dwarf_reg_to_x86_64_reg; @@ -1759,10 +1759,10 @@ RZ_API void rz_analysis_dwarf_preprocess_info( RZ_NONNULL RZ_BORROW RzAnalysis *analysis, RZ_NONNULL RZ_BORROW RzBinDWARF *dw) { rz_return_if_fail(analysis && dw); - if (!dw->info) { + if (!dw->info || !analysis->cur) { return; } - analysis->debug_info->dwarf_register_mapping = dwarf_register_mapping_query(analysis->cpu, analysis->bits); + analysis->debug_info->dwarf_register_mapping = dwarf_register_mapping_query(analysis->cur->name, analysis->bits); DwContext ctx = { .analysis = analysis, .dw = dw, diff --git a/librz/arch/p/asm/asm_arm_cs.c b/librz/arch/p/asm/asm_arm_cs.c index b9bc86f3944..582076756ef 100644 --- a/librz/arch/p/asm/asm_arm_cs.c +++ b/librz/arch/p/asm/asm_arm_cs.c @@ -300,7 +300,7 @@ char **arm_cpu_descriptions() { RzAsmPlugin rz_asm_plugin_arm_cs = { .name = "arm", .desc = "Capstone ARM disassembler", - .cpus = "v8,cortexm,arm1176,cortexA72,cortexA8", + .cpus = "arm,v8,cortexm,arm1176,cortexA72,cortexA8", .platforms = "bcm2835,omap3430", .features = "v8", .license = "BSD", diff --git a/librz/core/cconfig.c b/librz/core/cconfig.c index 7e43ea4ec06..2f37144cfff 100644 --- a/librz/core/cconfig.c +++ b/librz/core/cconfig.c @@ -577,6 +577,7 @@ static bool cb_asmarch(void *user, void *data) { if (core->analysis) { const char *asmcpu = rz_config_get(core->config, "asm.cpu"); const char *platform = rz_config_get(core->config, "asm.platform"); + rz_config_set(core->config, "analysis.cpu", asmcpu); rz_syscall_setup(core->analysis->syscall, node->value, core->analysis->bits, asmcpu, asmos); update_syscall_ns(core); char *platforms_dir = rz_path_system(RZ_SDB_ARCH_PLATFORMS); @@ -680,6 +681,7 @@ static bool cb_asmbits(void *user, void *data) { const char *asmarch = rz_config_get(core->config, "asm.arch"); const char *asmcpu = rz_config_get(core->config, "asm.cpu"); if (core->analysis) { + rz_config_set(core->config, "analysis.cpu", asmcpu); if (!rz_syscall_setup(core->analysis->syscall, asmarch, bits, asmcpu, asmos)) { // eprintf ("asm.arch: Cannot setup syscall '%s/%s' from '%s'\n", // node->value, asmos, RZ_LIBDIR"/rizin/"RZ_VERSION"/syscall");