x86 RzIL uplifting #2747
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x86 RzIL uplifting #2747
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DMaroo
requested review from
wargio,
thestr4ng3r,
kazarmy and
ret2libc
as code owners
thestr4ng3r
requested changes
Nov 22, 2022
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I have annotated all the places that are not yet covered by asm tests, so you can check them off one after another. This may be somewhat tedious, but it is quite important to have these all type-checked, especially with different bitness. In particular, we need tests for x86_64 too.
Here is the coverage report I used: x86_il.c.gcov.txt
The overall design and structure looks very nice to me, great job already!
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I have added tests for x86-64 and x86-16. I am now working on improving coverage. |
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* Implement functions for lifting x86 operands to RzIL * Implement RzIL for invalid instructions
* Create an enum for flags in x86 `EFLAGS` register
* Add `x86_il_{get,set}_eflags` utility functions to deal with flags
* Add documentation format and documentation for the lifted instructions * Add `RET_NULL_IF_64BIT_OR_LOCK` macro for convenience * Add `MOD` and `SMOD` in `rz_il_opbuilder_*.h` for convenience
* Format according to clang-format
* Cast to correct types in case of address override prefix in case of
`CMPS` instruction in 64 bits
* Fix typo, and use `RDX` and `RAX`, instead of `EDX` and `EAX` in
`DIV` implmentation for 64-bit operand
* Update lifting of `LODS`, `MOVS`, `SCAS` and `STOS` instructions to
cast the memaddr to correct width
* Fix casting error in `ENTER`
* Makes it easier for future contributors and other people
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thestr4ng3r
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Nov 25, 2022
wargio
approved these changes
Nov 26, 2022
Co-authored-by: Giovanni <[email protected]>
XVilka
requested changes
Nov 27, 2022
* Fix typos in Doxygen documentation * Add dummy implementation for `IN`, `OUT` and `WAIT`
* Implement `LOOP` family of instructions
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@DMaroo run clang-format. |
XVilka
approved these changes
Nov 28, 2022
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Your checklist for this pull request
Detailed description
This PR intends to lift x86 ISA to RzIL. This is a GSoC 2022 project.
Relevant links:
Test plan
Highlighted in the proposal document.
Closing issues
Tracker issue: #2080
Notes
This is only the first in series of a bunch of pull requests which plan on lifting x86. The IL implementation in the PR has not been semantically verified but the generated IL code has been type checked.
More info on the plan can be found here: https://dmaroo.github.io/gsocx86lifting