DkVideo4K.gprj

<?xml version="1" encoding="UTF-8"?>
<!DOCTYPE gowin-fpga-project>
<Project>
    <Template>FPGA</Template>
    <Version>5</Version>
    <Device name="GW1NSR-4C" pn="GW1NSR-LV4CQN48PC6/I5">gw1nsr4c-000</Device>
    <FileList>
        <File path="src/verilog/dvi_tx.v" type="file.verilog" enable="1"/>
        <File path="src/verilog/hyperram_memory_interface.v" type="file.verilog" enable="1"/>
        <File path="src/verilog/video_frame_buffer.v" type="file.verilog" enable="1"/>
        <File path="video_top.v" type="file.verilog" enable="1"/>
        <File path="src/constraints/tangnano4k.cst" type="file.cst" enable="1"/>
        <File path="src/constraints/tangnano4k.sdc" type="file.sdc" enable="1"/>
    </FileList>
</Project>