Iverilog doesn't accept spaces in the value path of the -B flag.

[zapta]

Iverilog exists with an error if the value of -B has a space in the path, but do accept correctly space in source files paths. Is there a workaround (escaping?) for passing to -B a value with a space?

I am using Icarus Verilog version 13.0 (devel) (s20221226-533-g676b36e45 on Mac OSX apple silicon.

/Users/user/.apio/packages/tools-oss-cad-suite/bin/iverilog -B '/Users/user/xx packages/tools-oss-cad-suite/lib/ivl' -o _build/ledon_tb.out -DVCD_OUTPUT=_build/ledon_tb -DNO_ICE40_DEFAULT_ASSIGNMENTS /Users/user/xx_packages/tools-oss-cad-suite/share/yosys/ice40/cells_sim.v main.v ledon_tb.v
sh: /Users/user/xx: No such file or directory
sh: /Users/user/xx: No such file or directory

EDIT: What does the -B flag does? Do I need it? Found this iverilog command line in our existing code line.