All notable changes to this project will be documented in this file.
The format is based on Keep a Changelog and this project adheres to Semantic Versioning.
- Support for 16-bit words with SPI (#107)
- SPI support for reclock after initialization (#98)
- Support for
stm32f302x6
andstm32f302x8
devices (#132) - Support for the onboard real-time clock (RTC) (#136)
- Enable DMA for USART on
stm32f302
devices (#139)
- Introduced auto-generated GPIO mappings based on the STM32CubeMX database (#129)
v0.5.0 - 2020-07-21
- Implement
InputPin
forOutput<OpenDrain>
pins (#114) - Support for safe one-shot DMA transfers (#86)
- DMA support for serial reception and transmission (#86)
- ADC support for
stm32f303
devices (#47)
PLL
was calculated wrong for devices, which do not divideHSI
(#67)
- The system clock calculation is more fine grained now. (#67) Now the system clock can be some value, like 14 MHz, which can not a be represented as a multiple of the oscillator clock:
let clocks = rcc
.cfgr
.use_hse(8.mhz())
.sysclk(14.mhz())
// or
let clocks = rcc
.cfgr
.use_hse(32.mhz())
.sysclk(72.mhz())
This is possible through utilizing the divider, which can divide the external oscillator clock on most devices. Some devices have even the possibility to divide the internal oscillator clock.
- The feature gate requires you to select a subvariant if possible. (#75)
- Split up
stm32f302
into sub-targetsstm32f302xb
,stm32f302xc
,stm32f302xd
,stm32f302xe
- Bump
stm32f3
dependency to0.11.0
(#97) - The
stm32f3
reexport is now renamed fromstm32
topac
(#101) - The correct
stm32f3
modules are now used for thestm32f318
andstm32f738
targets. As a result, some previously (wrongly) supported peripherals have been removed from these targets. (#116)
v0.4.3 - 2020-04-11
- Independent Watchdog (#58)
- Wrong default modes for debug GPIO pins (#82)
- Wrong calculation of HCLK prescaler, if using a prescaler value equal or higher than 64 (#42)
- UART reception error flags not cleared (#91)
v0.4.2 - 2020-03-21
- Bump
stm32f3
dependency to0.10.0
(#70)
v0.4.1 - 2020-03-07
- Use Infallible error type for UART (#50)
- Implement blocking Write for UART (#50)
- Implement blocking Read for I2C (#52)
- Regression in v0.4.0 that set SPI to LSB-first ordering (#60)
v0.4.0 - 2019-12-27
- USB Driver for all devices except
stm32f301
andstm32f334
as they have no USB peripheral. (#24) StatefulOutputPin
andToggleableOutputPin
(#25)- Support devices with 2-bit PLLSRC fields (#31)
- This allows using 72 MHz
sysclk
on thestm32f303
- This allows using 72 MHz
- Analog gpio trait (#33)
- Add PWM Channels (#34)
- SPI embedded hal modes are now public (#35)
- Alternate gpio functions are now only made available for devices, which have them. (#21)
stm32f303
is now split intostm32f303xd
andstm32f303xe
as they provide different alternate gpio functions.stm32f303
is still available.- Bump
stm32f3
dependency to0.9.0
(#39)
- Fixed wrong initialization of the SPI (#35)
v0.3.0 - 2019-08-26
- HSE and USB clock are now supported (#18)
- Bump
stm32f3
version to0.8.0
(#19)
v0.2.3 - 2019-07-07
- Fix timer initialization (#17)
v0.2.2 - 2019-07-06
- Missing
stm32f303
timers (#16)
v0.2.1 - 2019-07-06
- Fully erased pin (#14)
v0.2.0 - 2019-07-02
- Various peripheral mappings for some devices (#12)
- Switch to the
embedded-hal
v2 digital pin trait.
v0.1.5 - 2019-06-11
- Support for GPIO AF14 (#6)
v0.1.4 - 2019-05-04
- Fixed I2C address (#4)
v0.1.3 - 2019-04-12
- Implement GPIO
InputPin
traits (#2)
v0.1.2 - 2019-04-06
- Support
stm32f328
,stm32f358
andstm32f398
devices - Support
stm32f334
device - Support
stm32f378
device - Support
stm32f373
device
v0.1.1 - 2019-03-31
- Support
stm32f301
andstm32f318
devices - Support
stm32f302
device
- Support
stm32f303
device