Core: added LAR, LSR register to DWT

[ghost]

Added again LAR, LSR register to Cortex-M7 DWT

[github-actions]

Test Results

   240 files   -   132     240 suites   - 132   0s ⏱️ - 8m 40s
    56 tests +    7      54 ✅ +   10      2 💤  -     3  0 ❌ ±0 
12 948 runs   - 5 280  10 860 ✅  - 1 104  2 088 💤  - 4 176  0 ❌ ±0 

Results for commit afb23fe. ± Comparison against base commit 3165817.

This pull request removes 49 and adds 56 tests. Note that renamed tests count towards both.

CMSIS-Core.src ‑ apsr.c
CMSIS-Core.src ‑ basepri.c
CMSIS-Core.src ‑ bkpt.c
CMSIS-Core.src ‑ clrex.c
CMSIS-Core.src ‑ clz.c
CMSIS-Core.src ‑ control.c
CMSIS-Core.src ‑ cp15.c
CMSIS-Core.src ‑ cpsr.c
CMSIS-Core.src ‑ dmb.c
CMSIS-Core.src ‑ dsb.c
…

TC_CML1Cache_CleanDCacheByAddrWhileDisabled
TC_CML1Cache_EnDisableDCache
TC_CML1Cache_EnDisableICache
TC_CoreFunc_APSR
TC_CoreFunc_BASEPRI
TC_CoreFunc_Control
TC_CoreFunc_EnDisIRQ
TC_CoreFunc_EncDecIRQPrio
TC_CoreFunc_FAULTMASK
TC_CoreFunc_FPSCR
…

This pull request removes 5 skipped tests and adds 2 skipped tests. Note that renamed tests count towards both.

CMSIS-Core.src ‑ lda.c
CMSIS-Core.src ‑ ldaex.c
CMSIS-Core.src ‑ stl.c
CMSIS-Core.src ‑ stlex.c
CMSIS-Core.src ‑ systick.c

TC_CoreInstr_WFE
TC_CoreInstr_WFI

♻️ This comment has been updated with latest results.