lpc4322(scu): pinmux mode needs more than 8bits

ARMmbed · Apr 9, 2022 · 9f14137 · 9f14137
1 parent aec0d97
commit 9f14137
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Showing 2 changed files with 6 additions and 5 deletions.
diff --git a/source/hic_hal/nxp/lpc4322/lpc43xx_scu.c b/source/hic_hal/nxp/lpc4322/lpc43xx_scu.c
@@ -80,7 +80,7 @@
  * 					- FUNC7		:Function 7
  * @return		None
  **********************************************************************/
-void scu_pinmux(uint8_t port, uint8_t pin, uint8_t mode, uint8_t func)
+void scu_pinmux(uint8_t port, uint8_t pin, uint16_t mode, uint8_t func)
 {
     uint32_t *scu_base = (uint32_t *)(LPC_SCU_BASE);
     scu_base[(PORT_OFFSET * port + PIN_OFFSET * pin) / 4] = mode + func;

diff --git a/source/hic_hal/nxp/lpc4322/lpc43xx_scu.h b/source/hic_hal/nxp/lpc4322/lpc43xx_scu.h
@@ -69,9 +69,10 @@ extern "C"
 #define INBUF_DISABLE	  (0 << 6)	// Input buffer
 #define FILTER_ENABLE	  (0 << 7)	// Glitch filter (for signals below 30MHz)
 #define FILTER_DISABLE	  (1 << 7)	// No glitch filter (for signals above 30MHz)
-#define DRIVE_8MA         (1 << 8)	// Drive strength of 8mA
-#define DRIVE_14MA        (1 << 9)	// Drive strength of 14mA
-#define DRIVE_20MA        (3 << 8)	// Drive strength of 20mA
+#define DRIVE_4MA         (0 << 8)	// Normal-drive: drive strength of 4mA (default)
+#define DRIVE_8MA         (1 << 8)	// Medium-drive: drive strength of 8mA
+#define DRIVE_14MA        (2 << 8)	// High-drive: drive strength of 14mA
+#define DRIVE_20MA        (3 << 8)	// Ultra high-drive: drive strength of 20mA
 
 
 /* Configuration examples for various I/O pins */
@@ -107,7 +108,7 @@ extern "C"
  * @{
  */
 
-void scu_pinmux(uint8_t port, uint8_t pin, uint8_t mode, uint8_t func);
+void scu_pinmux(uint8_t port, uint8_t pin, uint16_t mode, uint8_t func);
 
 /**
  * @}