Replace TRUE and FALSE defines with stdbool

X/ControlPane.c

@@ -171,7 +171,7 @@ void ControlPane_Event(ARMul_State *state, XEvent *event) {
 
       } else if (sym == XK_q) {
         fputs("arcem: user requested exit\n", stderr);
-        hostdisplay_change_focus(FALSE);
+        hostdisplay_change_focus(false);
         exit(0);
       }
       break;

X/DispKbd.c

@@ -48,12 +48,6 @@
 
 #define ControlHeight 30
 
-#define IF_DIFF_THEN_ASSIGN_AND_SET_FLAG(a, b, f) \
-    if ((a) != (b)) { \
-        (a) = (b); \
-        (f) = TRUE; \
-    }
-
 /* ------------------------------------------------------------------ */
 static int lastmousemode=0, lastmousex=0, lastmousey=0;
 
@@ -792,14 +786,14 @@ static void MainPane_Event(ARMul_State *state,XEvent *e) {
   switch (e->type) {
     case EnterNotify:
       /*fprintf(stderr,"MainPane: Enter notify!\n"); */
-        hostdisplay_change_focus(TRUE);
+        hostdisplay_change_focus(true);
         lastmousex=e->xcrossing.x;
         lastmousey=e->xcrossing.y;
       break;
 
     case LeaveNotify:
       /*fprintf(stderr,"MainPane: Leave notify!\n"); */
-        hostdisplay_change_focus(FALSE);
+        hostdisplay_change_focus(false);
       break;
 
     case Expose:
@@ -842,12 +836,12 @@ static void CursorPane_Event(ARMul_State *state,XEvent *e) {
   switch (e->type) {
     case EnterNotify:
       fprintf(stderr,"CursorPane: Enter notify!\n");
-        hostdisplay_change_focus(TRUE);
+        hostdisplay_change_focus(true);
       break;
 
     case LeaveNotify:
       fprintf(stderr,"CursorPane: Leave notify!\n");
-        hostdisplay_change_focus(FALSE);
+        hostdisplay_change_focus(false);
       break;
 
     case Expose:
@@ -877,7 +871,7 @@ static void CursorPane_Event(ARMul_State *state,XEvent *e) {
 /* ------------------------------------------------------------------ */
 
 
-void hostdisplay_change_focus(int focus)
+void hostdisplay_change_focus(bool focus)
 {
   if (PD.visInfo.class == PseudoColor) {
     (*(focus ? XInstallColormap : XUninstallColormap))(PD.disp, PD.ArcsColormap);

X/platform.h

@@ -49,7 +49,7 @@ extern void Resize_Window(ARMul_State *state,int x,int y);
 
 extern unsigned int vidc_col_to_x_col(unsigned int col);
 
-extern void hostdisplay_change_focus(int focus);
+extern void hostdisplay_change_focus(bool focus);
 
 extern void UpdateCursorPos(ARMul_State *state,int xscale,int xoffset,int yscale,int yoffset);
 

arch/armarc.c

@@ -188,7 +188,7 @@ static void DumpHandler(int sig) {
  * @param state
  * @returns
  */
-unsigned
+bool
 ARMul_MemoryInit(ARMul_State *state)
 {
   ARMword RAMChunkSize;
@@ -369,7 +369,7 @@ ARMul_MemoryInit(ARMul_State *state)
   hostfs_init();
 #endif
 
-  return(TRUE);
+  return true;
 }
 
 /**

arch/cp15.c

@@ -31,11 +31,11 @@ struct
  * @param hState Emulator state
  * @returns Bool of successful initialisation
  */
-unsigned ARM3_Initialise(ARMul_State *hState)
+bool ARM3_Initialise(ARMul_State *hState)
 {
   ARM3_CP15_Registers.uControlRegister = 0;
 
-  return TRUE;
+  return true;
 }
 
 /**
@@ -94,9 +94,9 @@ unsigned ARM3_MCRs(ARMul_State *hState, unsigned uType, ARMword instr, ARMword u
  * @param hState  Emulator state
  * @param uReg    Coprocessor register
  * @param puValue Place to write the value of the CP register
- * @returns TRUE on success, FALSE on disallowed reads
+ * @returns true on success, false on disallowed reads
  */
-unsigned ARM3_RegisterRead(ARMul_State *hState, unsigned uReg, ARMword *puValue)
+bool ARM3_RegisterRead(ARMul_State *hState, unsigned uReg, ARMword *puValue)
 {
   switch (uReg) {
     case ARM3_CP15_REG_0_RO_PROCESSOR_ID:
@@ -105,7 +105,7 @@ unsigned ARM3_RegisterRead(ARMul_State *hState, unsigned uReg, ARMword *puValue)
 
     case ARM3_CP15_REG_1_WO_FLUSH_CACHE:
       /* flush cache is a write only register */
-      return FALSE;
+      return false;
 
     case ARM3_CP15_REG_2_RW_MISC_CONTROL:
       *puValue = ARM3_CP15_Registers.uControlRegister;
@@ -127,7 +127,7 @@ unsigned ARM3_RegisterRead(ARMul_State *hState, unsigned uReg, ARMword *puValue)
       *puValue = 0;
   }
 
-  return TRUE;
+  return true;
 }
 
 /**
@@ -140,15 +140,15 @@ unsigned ARM3_RegisterRead(ARMul_State *hState, unsigned uReg, ARMword *puValue)
  * @param hState Emulator state
  * @param uReg   Coprocessor register
  * @param uValue Value to write to CP register
- * @returns TRUE on success, FALSE on disallowed reads
+ * @returns true on success, false on disallowed reads
  */
-unsigned ARM3_RegisterWrite(ARMul_State *hState, unsigned uReg, ARMword uValue)
+bool ARM3_RegisterWrite(ARMul_State *hState, unsigned uReg, ARMword uValue)
 {
   switch (uReg)
   {
     case ARM3_CP15_REG_0_RO_PROCESSOR_ID:
       /* PROCESSOR ID is read only register */
-      return FALSE;
+      return false;
 
     case ARM3_CP15_REG_1_WO_FLUSH_CACHE:
       /* flush our non-existant cache */
@@ -181,6 +181,6 @@ unsigned ARM3_RegisterWrite(ARMul_State *hState, unsigned uReg, ARMword uValue)
       break;
   }
 
-  return TRUE;
+  return true;
 }
 

arch/cp15.h

@@ -27,7 +27,7 @@
  * @param hState Emulator state
  * @returns Bool of successful initialisation
  */
-unsigned ARM3_Initialise(ARMul_State *state);
+bool ARM3_Initialise(ARMul_State *state);
 
 /**
  * ARM3_MRCs
@@ -67,9 +67,9 @@ unsigned ARM3_MCRs(ARMul_State *state, unsigned type, ARMword instr, ARMword val
  * @param hState  Emulator state
  * @param uReg    Coprocessor register
  * @param puValue Place to write the value of the CP register
- * @returns TRUE on success, FALSE on disallowed reads
+ * @returns true on success, false on disallowed reads
  */
-unsigned ARM3_RegisterRead(ARMul_State *state, unsigned reg, ARMword *value);
+bool ARM3_RegisterRead(ARMul_State *state, unsigned reg, ARMword *value);
 
 /**
  * ARM3_RegisterWrite
@@ -81,6 +81,6 @@ unsigned ARM3_RegisterRead(ARMul_State *state, unsigned reg, ARMword *value);
  * @param hState Emulator state
  * @param uReg   Coprocessor register
  * @param uValue Value to write to CP register
- * @returns TRUE on success, FALSE on disallowed reads
+ * @returns true on success, false on disallowed reads
  */
-unsigned ARM3_RegisterWrite(ARMul_State *state, unsigned reg, ARMword value);
+bool ARM3_RegisterWrite(ARMul_State *state, unsigned reg, ARMword value);

armcopro.c

@@ -37,7 +37,7 @@ static unsigned NoCoPro4W(ARMul_State *state,unsigned,ARMword,ARMword *);
 *         Install co-processor instruction handlers in this routine         *
 \***************************************************************************/
 
-unsigned ARMul_CoProInit(ARMul_State *state) {
+bool ARMul_CoProInit(ARMul_State *state) {
   unsigned int i;
 
   /* initialise them all first */
@@ -68,7 +68,7 @@ unsigned ARMul_CoProInit(ARMul_State *state) {
        (state->CPInit[i])(state);
      }
    }
-   return(TRUE);
+   return true;
 }
 
 

armdefs.h

@@ -33,12 +33,8 @@ typedef uint32_t ARMword; /* must be 32 bits wide */
 typedef struct ARMul_State ARMul_State;
 extern ARMul_State statestr;
 
-#define FALSE 0
-#define TRUE 1
-#define LOW 0
-#define HIGH 1
-
-#define LATEABTSIG LOW /* TODO - is this correct? */
+#define LOW false
+#define HIGH true
 
 #define MIN(a,b) ((a)<(b)?(a):(b))
 #define MAX(a,b) ((a)>(b)?(a):(b))
@@ -203,15 +199,15 @@ typedef struct {
 *                          Main emulator state                              *
 \***************************************************************************/
 
-typedef unsigned ARMul_CPInits(ARMul_State *state);
-typedef unsigned ARMul_CPExits(ARMul_State *state);
+typedef bool ARMul_CPInits(ARMul_State *state);
+typedef bool ARMul_CPExits(ARMul_State *state);
 typedef unsigned ARMul_LDCs(ARMul_State *state, unsigned type, ARMword instr, ARMword value);
 typedef unsigned ARMul_STCs(ARMul_State *state, unsigned type, ARMword instr, ARMword *value);
 typedef unsigned ARMul_MRCs(ARMul_State *state, unsigned type, ARMword instr, ARMword *value);
 typedef unsigned ARMul_MCRs(ARMul_State *state, unsigned type, ARMword instr, ARMword value);
 typedef unsigned ARMul_CDPs(ARMul_State *state, unsigned type, ARMword instr);
-typedef unsigned ARMul_CPReads(ARMul_State *state, unsigned reg, ARMword *value);
-typedef unsigned ARMul_CPWrites(ARMul_State *state, unsigned reg, ARMword value);
+typedef bool ARMul_CPReads(ARMul_State *state, unsigned reg, ARMword *value);
+typedef bool ARMul_CPWrites(ARMul_State *state, unsigned reg, ARMword value);
 
 typedef enum ARMStartIns {
   NORMAL        = 0,
@@ -232,14 +228,14 @@ struct ARMul_State {
    ARMword Reg[16];           /* the current register file */
    CycleCount NumCycles;      /* Number of cycles */
    enum ARMStartIns NextInstr;/* Pipeline state */
-   unsigned abortSig;         /* Abort state */
+   bool abortSig;             /* Abort state */
    ARMword Aborted;           /* sticky flag for aborts */
    ARMword AbortAddr;         /* to keep track of Prefetch aborts */
    ARMword Exception;         /* IRQ & FIQ pins */
    Vidc_Regs *Display;        /* VIDC regs/host display struct */
    arch_keyboard *Kbd;        /* Keyboard struct */
    ARMword Bank;              /* the current register bank */
-   unsigned NtransSig;        /* MEMC USR/SVC flag, somewhat redundant with FastMapMode */
+   bool NtransSig;            /* MEMC USR/SVC flag, somewhat redundant with FastMapMode */
    ARMword Base;              /* extra hand for base writeback */
    ArcemConfig *Config;
 
@@ -333,7 +329,7 @@ extern void ARMul_Abort(ARMul_State *state, ARMword address);
 *              Definitons of things in the memory interface                 *
 \***************************************************************************/
 
-extern unsigned ARMul_MemoryInit(ARMul_State *state);
+extern bool ARMul_MemoryInit(ARMul_State *state);
 extern void ARMul_MemoryExit(ARMul_State *state);
 
 /***************************************************************************\
@@ -349,7 +345,7 @@ extern void ARMul_MemoryExit(ARMul_State *state);
 #define ARMul_CANT 1
 #define ARMul_INC 3
 
-extern unsigned ARMul_CoProInit(ARMul_State *state);
+extern bool ARMul_CoProInit(ARMul_State *state);
 extern void ARMul_CoProExit(ARMul_State *state);
 extern void ARMul_CoProAttach(ARMul_State *state, unsigned number,
                               ARMul_CPInits *init, ARMul_CPExits *exits,

armemu.c

@@ -552,7 +552,7 @@ static ARMword GetLSRegRHS(ARMul_State *state, ARMword instr)
 * This function does the work of loading a word for a LDR instruction.      *
 \***************************************************************************/
 
-static unsigned LoadWord(ARMul_State *state, ARMword instr, ARMword address)
+static bool LoadWord(ARMul_State *state, ARMword instr, ARMword address)
 {
  ARMword dest;
 
@@ -563,7 +563,7 @@ static unsigned LoadWord(ARMul_State *state, ARMword instr, ARMword address)
  dest = ARMul_LoadWordN(state,address);
  if (state->Aborted) {
     TAKEABORT;
-    return LATEABTSIG;
+    return false; /* LATEABTSIG */
     }
  if (address & 3)
     dest = ARMul_Align(state,address,dest);
@@ -577,7 +577,7 @@ static unsigned LoadWord(ARMul_State *state, ARMword instr, ARMword address)
 * This function does the work of loading a byte for a LDRB instruction.     *
 \***************************************************************************/
 
-static unsigned LoadByte(ARMul_State *state, ARMword instr, ARMword address)
+static bool LoadByte(ARMul_State *state, ARMword instr, ARMword address)
 {
  ARMword dest;
 
@@ -588,7 +588,7 @@ static unsigned LoadByte(ARMul_State *state, ARMword instr, ARMword address)
  dest = ARMul_LoadByte(state,address);
  if (state->Aborted) {
     TAKEABORT;
-    return LATEABTSIG;
+    return false; /* LATEABTSIG */
     }
  UNDEF_LSRBPC;
  WRITEDEST(dest);
@@ -600,7 +600,7 @@ static unsigned LoadByte(ARMul_State *state, ARMword instr, ARMword address)
 * This function does the work of storing a word from a STR instruction.     *
 \***************************************************************************/
 
-static unsigned StoreWord(ARMul_State *state, ARMword instr, ARMword address)
+static bool StoreWord(ARMul_State *state, ARMword instr, ARMword address)
 {BUSUSEDINCPCN;
  if (ADDREXCEPT(address)) {
     INTERNALABORT(address);
@@ -610,16 +610,16 @@ static unsigned StoreWord(ARMul_State *state, ARMword instr, ARMword address)
     ARMul_StoreWordN(state,address,DEST);
  if (state->Aborted) {
     TAKEABORT;
-    return LATEABTSIG;
+    return false; /* LATEABTSIG */
     }
- return(TRUE);
+ return true;
 }
 
 /***************************************************************************\
 * This function does the work of storing a byte for a STRB instruction.     *
 \***************************************************************************/
 
-static unsigned StoreByte(ARMul_State *state, ARMword instr, ARMword address)
+static bool StoreByte(ARMul_State *state, ARMword instr, ARMword address)
 {BUSUSEDINCPCN;
  if (ADDREXCEPT(address)) {
     INTERNALABORT(address);
@@ -629,10 +629,10 @@ static unsigned StoreByte(ARMul_State *state, ARMword instr, ARMword address)
     ARMul_StoreByte(state,address,DEST);
  if (state->Aborted) {
     TAKEABORT;
-    return LATEABTSIG;
+    return false; /* LATEABTSIG */
     }
  UNDEF_LSRBPC;
- return(TRUE);
+ return true;
 }
 
 

armemu.h

@@ -374,9 +374,9 @@ unsigned ARMul_NthReg(ARMword instr, unsigned number);
 void ARMul_LDC(ARMul_State *state,ARMword instr,ARMword address);
 void ARMul_STC(ARMul_State *state,ARMword instr,ARMword address);
 void ARMul_MCR(ARMul_State *state,ARMword instr, ARMword source);
-unsigned ARMul_MRC(ARMul_State *state,ARMword instr,ARMword *result);
+bool ARMul_MRC(ARMul_State *state,ARMword instr,ARMword *result);
 void ARMul_CDP(ARMul_State *state,ARMword instr);
-unsigned IntPending(ARMul_State *state);
+bool IntPending(ARMul_State *state);
 ARMword ARMul_Align(ARMul_State *state, ARMword address, ARMword data);
 
 

arminit.c

@@ -107,7 +107,7 @@ ARMul_State *ARMul_NewState(ArcemConfig *pConfig)
        state->RegBank[j][i] = 0;
     }
 
- state->Aborted = FALSE;
+ state->Aborted = ARMul_ResetV;
  state->Display = NULL;
  state->FastMap = FastMap;
  state->Config  = pConfig;
@@ -153,7 +153,7 @@ ARMword ARMul_DoProg(ARMul_State *state) {
 void ARMul_Abort(ARMul_State *state, ARMword vector) {
   ARMword temp;
   int exit_code;
-  state->Aborted = FALSE;
+  state->Aborted = ARMul_ResetV;
 
   dbug("ARMul_Abort: vector=0x%x\n",vector);