🦀
rusty
BS/MS CS at WPI/Full time Arch & Neovim ricer.
- Worcester, MA
-
00:51
(UTC -05:00) - in/william-snow-iv-140438169
Pinned Loading
-
-
-
34-Engineering/Virtex-HDL
34-Engineering/Virtex-HDL PublicThis repository contains the Xilinx Vivado project for the Artix-7 (XC7A35T-1FTG256C) FPGA on Virtex.
Something went wrong, please refresh the page to try again.
If the problem persists, check the GitHub status page or contact support.
If the problem persists, check the GitHub status page or contact support.