Popular repositories Loading
-
Systolic-Array-Output-Stationary
Systolic-Array-Output-Stationary PublicThis is a Systolic Array project for Vivado Xilinx written in the SystemVerilog language. Systolic array has Output Stationary dataflow. You can use my project for further development of DNN accele…
SystemVerilog 2
-
ESP32-CO2-measurement-device-
ESP32-CO2-measurement-device- PublicProject to create a sensor system for data collection
Python
-
-
-
Small_DNN_3_inputs_2_hidden_layers
Small_DNN_3_inputs_2_hidden_layers PublicIt's Homework 1 for "IAS0360 Machine Learning for Embedded Systems" subject. Written by Nikita Budovey (232072 IACM)
C++
-
Something went wrong, please refresh the page to try again.
If the problem persists, check the GitHub status page or contact support.
If the problem persists, check the GitHub status page or contact support.