Port synth_cnot_phase_aam to Rust

crates/accelerate/src/synthesis/linear/pmh.rs

@@ -162,12 +162,15 @@ pub fn synth_cnot_count_full_pmh(
     let mat: Array2<bool> = arrayview.to_owned();
     let num_qubits = mat.nrows();
 
-    let instructions = _synth_cnot_count_full_pmh(mat, section_size);
+    let instructions = synth_pmh(mat, section_size);
     CircuitData::from_standard_gates(py, num_qubits as u32, instructions, Param::Float(0.0))
 }
 
 type Instructions = (StandardGate, SmallVec<[Param; 3]>, SmallVec<[Qubit; 2]>);
-pub fn _synth_cnot_count_full_pmh(mat: Array2<bool>, sec_size: Option<i64>) -> Vec<Instructions> {
+pub fn synth_pmh(
+    mat: Array2<bool>,
+    sec_size: Option<i64>,
+) -> impl DoubleEndedIterator<Item = Instructions> {
     let mut mat = mat;
     let num_qubits = mat.nrows(); // is a quadratic matrix
 
@@ -188,16 +191,15 @@ pub fn _synth_cnot_count_full_pmh(mat: Array2<bool>, sec_size: Option<i64>) -> V
     let upper_cnots = lower_cnot_synth(mat.view_mut(), blocksize, true);
 
     // iterator over the gates
-    let instructions = upper_cnots
-        .iter()
-        .map(|(i, j)| (*j, *i))
+    upper_cnots
+        .into_iter()
+        .map(|(i, j)| (j, i))
         .chain(lower_cnots.into_iter().rev())
         .map(|(ctrl, target)| {
             (
                 StandardGate::CXGate,
                 smallvec![],
                 smallvec![Qubit(ctrl as u32), Qubit(target as u32)],
             )
-        });
-    instructions.collect()
+        })
 }

crates/accelerate/src/synthesis/linear_phase/cnot_phase_synth.rs

@@ -10,7 +10,7 @@
 // copyright notice, and modified files need to carry a notice indicating
 // that they have been altered from the originals.
 
-use crate::synthesis::linear::pmh::_synth_cnot_count_full_pmh;
+use crate::synthesis::linear::pmh::synth_pmh;
 use ndarray::Array2;
 use numpy::PyReadonlyArray2;
 use pyo3::{prelude::*, types::PyList};
@@ -100,8 +100,8 @@ pub fn synth_cnot_phase_aam(
         }
     }
 
-    let epsilion: usize = num_qubits;
-    let mut q = vec![(s, (0..num_qubits).collect::<Vec<usize>>(), epsilion)];
+    let epsilon: usize = num_qubits;
+    let mut q = vec![(s, (0..num_qubits).collect::<Vec<usize>>(), epsilon)];
 
     while !q.is_empty() {
         let (mut _s, mut _i, mut _ep) = q.pop().unwrap();
@@ -283,10 +283,7 @@ pub fn synth_cnot_phase_aam(
     }
 
     let state_bool = state.mapv(|x| x != 0);
-    let mut instrs = _synth_cnot_count_full_pmh(state_bool, section_size)
-        .into_iter()
-        .rev()
-        .collect();
+    let mut instrs = synth_pmh(state_bool, section_size).rev().collect();
     instructions.append(&mut instrs);
     CircuitData::from_standard_gates(py, num_qubits as u32, instructions, Param::Float(0.0))
 }