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Merge pull request #4681 from QuantamHD/multi_input_pin_swap
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rsz: Enable pin swapping 3+ input standard cells
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maliberty authored Apr 7, 2024
2 parents 821ecff + 22f5ddc commit ce5fc8e
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Showing 7 changed files with 148 additions and 155 deletions.
9 changes: 6 additions & 3 deletions src/rsz/include/rsz/Resizer.hh
Original file line number Diff line number Diff line change
Expand Up @@ -425,10 +425,13 @@ protected:
float pinCapacitance(const Pin *pin, const DcalcAnalysisPt *dcalc_ap) const;
void swapPins(Instance *inst, LibertyPort *port1,
LibertyPort *port2, bool journal);
void findSwapPinCandidate(LibertyPort *input_port, LibertyPort *drvr_port,
float load_cap, const DcalcAnalysisPt *dcalc_ap,
void findSwapPinCandidate(LibertyPort* input_port,
LibertyPort* drvr_port,
const sta::LibertyPortSet& equiv_ports,
float load_cap,
const DcalcAnalysisPt* dcalc_ap,
// Return value
LibertyPort **swap_port);
LibertyPort** swap_port);
void gateDelays(LibertyPort *drvr_port,
float load_cap,
const DcalcAnalysisPt *dcalc_ap,
Expand Down
43 changes: 17 additions & 26 deletions src/rsz/src/RepairSetup.cc
Original file line number Diff line number Diff line change
Expand Up @@ -507,20 +507,6 @@ bool RepairSetup::swapPins(PathRef *drvr_path,
return false;
}

// Results for > 2 input gates are unpredictable. Only swap pins for
// 2 input gates for now.
int input_port_count = 0;
sta::LibertyCellPortIterator port_iter(cell);
while (port_iter.hasNext()) {
LibertyPort *port = port_iter.next();
if (port->direction()->isInput()) {
++input_port_count;
}
}
if (input_port_count > 2) {
return false;
}

// Check if we have already dealt with this instance
// and prevent any further swaps.
if (swap_pin_inst_set_.find(drvr) == swap_pin_inst_set_.end()) {
Expand All @@ -539,17 +525,22 @@ bool RepairSetup::swapPins(PathRef *drvr_path,
}
ports = equiv_pin_map_[input_port];
if (!ports.empty()) {
resizer_->findSwapPinCandidate(input_port, drvr_port, load_cap,
dcalc_ap, &swap_port);
if (!sta::LibertyPort::equiv(swap_port, input_port)) {
debugPrint(logger_, RSZ, "repair_setup", 3,
"Swap {} ({}) {} {}",
network_->name(drvr), cell->name(),
input_port->name(), swap_port->name());
resizer_->swapPins(drvr, input_port, swap_port, true);
swap_pin_count_++;
return true;
}
resizer_->findSwapPinCandidate(
input_port, drvr_port, ports, load_cap, dcalc_ap, &swap_port);
if (!sta::LibertyPort::equiv(swap_port, input_port)) {
debugPrint(logger_,
RSZ,
"repair_setup",
3,
"Swap {} ({}) {} {}",
network_->name(drvr),
cell->name(),
input_port->name(),
swap_port->name());
resizer_->swapPins(drvr, input_port, swap_port, true);
swap_pin_count_++;
return true;
}
}
}
return false;
Expand Down Expand Up @@ -975,7 +966,7 @@ bool RepairSetup::isPortEqiv(sta::FuncExpr* expr,
}
var_index++;
}

std::vector<bool> result_no_swap = simulateExpr(expr, port_stimulus);

// Swap pins
Expand Down
21 changes: 13 additions & 8 deletions src/rsz/src/Resizer.cc
Original file line number Diff line number Diff line change
Expand Up @@ -2195,10 +2195,12 @@ Resizer::bufferDelays(LibertyCell *buffer_cell,
// Create a map of all the pins that are equivalent and then use the fastest pin
// for our violating path. Current implementation does not handle the case
// where 2 paths go through the same gate (we could end up swapping pins twice)
void
Resizer::findSwapPinCandidate(LibertyPort *input_port, LibertyPort *drvr_port,
float load_cap, const DcalcAnalysisPt *dcalc_ap,
LibertyPort **swap_port)
void Resizer::findSwapPinCandidate(LibertyPort* input_port,
LibertyPort* drvr_port,
const sta::LibertyPortSet& equiv_ports,
float load_cap,
const DcalcAnalysisPt* dcalc_ap,
LibertyPort** swap_port)
{
const Pvt *pvt = dcalc_ap->operatingConditions();
LibertyCell *cell = drvr_port->libertyCell();
Expand Down Expand Up @@ -2233,10 +2235,13 @@ Resizer::findSwapPinCandidate(LibertyPort *input_port, LibertyPort *drvr_port,
}
}

// Find the candidate port to swap with
auto port_iter = sta::LibertyCellPortIterator(cell);
while (port_iter.hasNext()) {
LibertyPort *port = port_iter.next();
for (LibertyPort* port : equiv_ports) {
if (port_delays.find(port) == port_delays.end()) {
// It's possible than an equivalent pin doesn't have
// a path to the driver.
continue;
}

if (port->direction()->isInput() &&
!sta::LibertyPort::equiv(input_port, port) &&
!sta::LibertyPort::equiv(drvr_port, port) &&
Expand Down
66 changes: 33 additions & 33 deletions test/aes_sky130hd.metrics
Original file line number Diff line number Diff line change
Expand Up @@ -18,54 +18,54 @@
"design__instance__count__setup_buffer": 348,
"design__instance__count__hold_buffer": 590,
"RSZ::worst_slack_min": "0.00039324100644384563",
"RSZ::worst_slack_max": "-1.2666965612728218",
"RSZ::tns_max": "-221.30824732527836",
"RSZ::worst_slack_max": "-1.2590324694724742",
"RSZ::tns_max": "-220.44971272423314",
"RSZ::hold_buffer_count": "590",
"design__instance__displacement__total": 3171.56,
"design__instance__displacement__mean": 0.056,
"design__instance__displacement__total": 3143.62,
"design__instance__displacement__mean": 0.055,
"design__instance__displacement__max": 11.577,
"route__wirelength__estimated": 1.52768e+06,
"route__wirelength__estimated": 1.525e+06,
"DPL::utilization": "7.6",
"DPL::design_area": "228316",
"DPL::design_area": "228353",
"route__net": 16531,
"route__net__special": 2,
"antenna__violating__nets": 1,
"antenna__violating__pins": 1,
"GRT::ANT::errors": "1",
"antenna__violating__nets": 2,
"antenna__violating__pins": 2,
"GRT::ANT::errors": "2",
"design__violations": 0,
"route__net": 16531,
"route__net__special": 2,
"route__drc_errors__iter:1": 12076,
"route__wirelength__iter:1": 1911705,
"route__drc_errors__iter:2": 2378,
"route__wirelength__iter:2": 1906281,
"route__drc_errors__iter:3": 1528,
"route__wirelength__iter:3": 1903974,
"route__drc_errors__iter:4": 55,
"route__wirelength__iter:4": 1904087,
"route__drc_errors__iter:5": 8,
"route__wirelength__iter:5": 1904067,
"route__drc_errors__iter:1": 11889,
"route__wirelength__iter:1": 1907569,
"route__drc_errors__iter:2": 2358,
"route__wirelength__iter:2": 1902395,
"route__drc_errors__iter:3": 1558,
"route__wirelength__iter:3": 1899850,
"route__drc_errors__iter:4": 80,
"route__wirelength__iter:4": 1899964,
"route__drc_errors__iter:5": 1,
"route__wirelength__iter:5": 1899983,
"route__drc_errors__iter:6": 0,
"route__wirelength__iter:6": 1904067,
"route__wirelength__iter:6": 1899975,
"route__drc_errors": 0,
"route__wirelength": 1904067,
"route__vias": 155955,
"route__vias__singlecut": 155955,
"route__wirelength": 1899975,
"route__vias": 155549,
"route__vias__singlecut": 155549,
"route__vias__multicut": 0,
"DRT::drv": "0",
"antenna__violating__nets": 161,
"antenna__violating__pins": 166,
"DRT::ANT::errors": "161",
"antenna__violating__nets": 159,
"antenna__violating__pins": 163,
"DRT::ANT::errors": "159",
"timing__drv__floating__nets": 0,
"timing__drv__floating__pins": 0,
"DRT::worst_slack_min": "-0.07761724815894486",
"DRT::worst_slack_max": "-1.7186714760049155",
"DRT::tns_max": "-306.7324401292788",
"DRT::clock_skew": "0.5099012467693896",
"DRT::max_slew_slack": "-22.106176614761353",
"DRT::worst_slack_min": "-0.08524536873227737",
"DRT::worst_slack_max": "-1.7390178678188413",
"DRT::tns_max": "-310.00855382455745",
"DRT::clock_skew": "0.5140286120024661",
"DRT::max_slew_slack": "-24.397003650665283",
"DRT::max_fanout_slack": "100.0",
"DRT::max_capacitance_slack": "-26.4578316156125",
"DRT::max_capacitance_slack": "-28.91301952333502",
"DRT::clock_period": "3.740000",
"flow__warnings__count": 75,
"flow__warnings__count": 63,
"flow__errors__count": 0
}
20 changes: 10 additions & 10 deletions test/aes_sky130hd.metrics_limits
Original file line number Diff line number Diff line change
@@ -1,23 +1,23 @@
{
"IFP::instance_count" : "20652.0"
,"DPL::design_area" : "273979.2"
,"DPL::design_area" : "274023.6"
,"DPL::utilization" : "9.12"
,"RSZ::repair_design_buffer_count" : "550"
,"RSZ::max_slew_slack" : "0"
,"RSZ::max_capacitance_slack" : "0"
,"RSZ::max_fanout_slack" : "0"
,"RSZ::worst_slack_min" : "-0.3736067589935562"
,"RSZ::worst_slack_max" : "-1.640696561272822"
,"RSZ::tns_max" : "-864.9622473252784"
,"RSZ::worst_slack_max" : "-1.6330324694724743"
,"RSZ::tns_max" : "-864.1037127242332"
,"RSZ::hold_buffer_count" : "708"
,"GRT::ANT::errors" : "1"
,"GRT::ANT::errors" : "2"
,"DRT::drv" : "0"
,"DRT::worst_slack_min" : "-0.4516172481589449"
,"DRT::worst_slack_max" : "-2.0926714760049157"
,"DRT::tns_max" : "-950.386440129279"
,"DRT::clock_skew" : "0.6118814961232676"
,"DRT::max_slew_slack" : "-26.527411937713623"
,"DRT::max_capacitance_slack" : "-31.749397938734997"
,"DRT::worst_slack_min" : "-0.4592453687322774"
,"DRT::worst_slack_max" : "-2.1130178678188414"
,"DRT::tns_max" : "-953.6625538245576"
,"DRT::clock_skew" : "0.6168343344029593"
,"DRT::max_slew_slack" : "-29.27640438079834"
,"DRT::max_capacitance_slack" : "-34.69562342800202"
,"DRT::max_fanout_slack" : "0"
,"DRT::clock_period" : "3.74"
}
118 changes: 56 additions & 62 deletions test/ibex_sky130hd.metrics
Original file line number Diff line number Diff line change
Expand Up @@ -2,78 +2,72 @@
"IFP::ord_version": "",
"IFP::instance_count": "15696",
"floorplan__design__io": 264,
"design__io__hpwl": 69471929,
"design__instance__displacement__total": 35359.5,
"design__instance__displacement__mean": 1.549,
"design__instance__displacement__max": 14.347,
"route__wirelength__estimated": 694113,
"RSZ::repair_design_buffer_count": "359",
"RSZ::max_slew_slack": "25.57382583618164",
"design__io__hpwl": 69625224,
"design__instance__displacement__total": 38384.7,
"design__instance__displacement__mean": 1.68,
"design__instance__displacement__max": 13.669,
"route__wirelength__estimated": 732808,
"RSZ::repair_design_buffer_count": "370",
"RSZ::max_slew_slack": "28.71694763501485",
"RSZ::max_fanout_slack": "100.0",
"RSZ::max_capacitance_slack": "86.70019080021149",
"design__instance__displacement__total": 490.538,
"design__instance__displacement__mean": 0.021,
"design__instance__displacement__max": 9.898,
"route__wirelength__estimated": 714611,
"design__instance__count__setup_buffer": 242,
"design__instance__count__hold_buffer": 332,
"RSZ::worst_slack_min": "0.00044386717779855867",
"RSZ::worst_slack_max": "-2.284226206171308",
"RSZ::tns_max": "-30.56044748206407",
"RSZ::hold_buffer_count": "332",
"design__instance__displacement__total": 3617.02,
"design__instance__displacement__mean": 0.153,
"design__instance__displacement__max": 26.68,
"route__wirelength__estimated": 750257,
"DPL::utilization": "27.9",
"DPL::design_area": "169240",
"route__net": 15631,
"RSZ::max_capacitance_slack": "84.16332604201848",
"design__instance__displacement__total": 525.068,
"design__instance__displacement__mean": 0.022,
"design__instance__displacement__max": 8.28,
"route__wirelength__estimated": 753122,
"design__instance__count__setup_buffer": 214,
"design__instance__count__hold_buffer": 352,
"RSZ::worst_slack_min": "0.0008053558048401062",
"RSZ::worst_slack_max": "-2.1414532975234586",
"RSZ::tns_max": "-27.712476653396912",
"RSZ::hold_buffer_count": "352",
"design__instance__displacement__total": 3085.79,
"design__instance__displacement__mean": 0.131,
"design__instance__displacement__max": 15.6,
"route__wirelength__estimated": 795654,
"DPL::utilization": "28.0",
"DPL::design_area": "169568",
"route__net": 15638,
"route__net__special": 2,
"antenna__violating__nets": 1,
"antenna__violating__pins": 1,
"GRT::ANT::errors": "1",
"antenna__violating__nets": 0,
"antenna__violating__pins": 0,
"GRT::ANT::errors": "0",
"design__violations": 0,
"route__net": 15631,
"route__net": 15638,
"route__net__special": 2,
"route__drc_errors__iter:1": 11354,
"route__wirelength__iter:1": 963314,
"route__drc_errors__iter:2": 2173,
"route__wirelength__iter:2": 957976,
"route__drc_errors__iter:3": 1596,
"route__wirelength__iter:3": 955857,
"route__drc_errors__iter:4": 208,
"route__wirelength__iter:4": 955824,
"route__drc_errors__iter:5": 75,
"route__wirelength__iter:5": 955787,
"route__drc_errors__iter:6": 33,
"route__wirelength__iter:6": 955794,
"route__drc_errors__iter:7": 12,
"route__wirelength__iter:7": 955813,
"route__drc_errors__iter:8": 6,
"route__wirelength__iter:8": 955815,
"route__drc_errors__iter:9": 6,
"route__wirelength__iter:9": 955814,
"route__drc_errors__iter:10": 0,
"route__wirelength__iter:10": 955812,
"route__drc_errors__iter:1": 11179,
"route__wirelength__iter:1": 1012795,
"route__drc_errors__iter:2": 2226,
"route__wirelength__iter:2": 1007318,
"route__drc_errors__iter:3": 1613,
"route__wirelength__iter:3": 1005614,
"route__drc_errors__iter:4": 287,
"route__wirelength__iter:4": 1005702,
"route__drc_errors__iter:5": 31,
"route__wirelength__iter:5": 1005643,
"route__drc_errors__iter:6": 5,
"route__wirelength__iter:6": 1005644,
"route__drc_errors__iter:7": 0,
"route__wirelength__iter:7": 1005637,
"route__drc_errors": 0,
"route__wirelength": 955812,
"route__vias": 130347,
"route__vias__singlecut": 130347,
"route__wirelength": 1005637,
"route__vias": 130321,
"route__vias__singlecut": 130321,
"route__vias__multicut": 0,
"DRT::drv": "0",
"antenna__violating__nets": 36,
"antenna__violating__pins": 38,
"DRT::ANT::errors": "36",
"antenna__violating__nets": 58,
"antenna__violating__pins": 62,
"DRT::ANT::errors": "58",
"timing__drv__floating__nets": 0,
"timing__drv__floating__pins": 0,
"DRT::worst_slack_min": "-0.5225580116526791",
"DRT::worst_slack_max": "-3.299373312391566",
"DRT::tns_max": "-145.79480435593797",
"DRT::clock_skew": "2.8333465264839823",
"DRT::max_slew_slack": "-5.651797850926718",
"DRT::worst_slack_min": "-0.44707683265352527",
"DRT::worst_slack_max": "-3.230100722766312",
"DRT::tns_max": "-80.18570212559976",
"DRT::clock_skew": "2.911090118026703",
"DRT::max_slew_slack": "-6.153581539789835",
"DRT::max_fanout_slack": "100.0",
"DRT::max_capacitance_slack": "26.665848091235034",
"DRT::max_capacitance_slack": "1.6604022051472729",
"DRT::clock_period": "15.155000",
"flow__warnings__count": 12,
"flow__warnings__count": 13,
"flow__errors__count": 0
}
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