Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

feature/fused-ops #55

Closed
wants to merge 3,330 commits into from
Closed
Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
3330 commits
Select commit Hold shift + click to select a range
4990e5c
Merge commit 'fe2119a7b08b' into matthias.bump_to_fe2119a7b08b
mgehre-amd Aug 15, 2024
1b038a9
Merge commit 'd84252e064b3' into matthias.bump_to_d84252e064b3
mgehre-amd Aug 15, 2024
de8cc8f
Merge pull request #258 from Xilinx/matthias.bump_to_fe2119a7b08b
mgehre-amd Aug 15, 2024
4291ba3
[AutoBump] Merge with 972f65a8
mgehre-amd Aug 15, 2024
685a2c0
Merge with fixes of 647d75d3
mgehre-amd Aug 15, 2024
6883373
Merge pull request #259 from Xilinx/matthias.bump_to_d84252e064b3
mgehre-amd Aug 15, 2024
0b3015b
[AutoBump] Merge with de0abc0983d355bbd971c5c571ba4c209a0c63ea
mgehre-amd Aug 15, 2024
a074d69
[AutoBump] Merge with 73402634
mgehre-amd Aug 15, 2024
3cef20c
Merge pull request #260 from Xilinx/bump_to_972f65a8
cferry-AMD Aug 16, 2024
45d71d8
Merge with fixes of fa6e4338
cferry-AMD Aug 16, 2024
c0d1d7e
[AutoBump] Merge with 538257bf
cferry-AMD Aug 16, 2024
396ae58
Merge pull request #261 from Xilinx/bump_to_647d75d3
cferry-AMD Aug 16, 2024
ae6cb41
Merge with fixes of 0aa6d57e
cferry-AMD Aug 16, 2024
f3ecb39
Merge pull request #262 from Xilinx/bump_to_73402634
cferry-AMD Aug 16, 2024
64c0a57
[AutoBump] Merge with 8612fa0d
cferry-AMD Aug 16, 2024
c02cb39
Merge with fixes of 71db9715
cferry-AMD Aug 16, 2024
5ef826d
[AutoBump] Merge with 527a6242
cferry-AMD Aug 16, 2024
f7ab7cd
Do not return null on tranpose
cferry-AMD Aug 16, 2024
6b4bce9
Merge with fixes of 72c729f3
cferry-AMD Aug 16, 2024
46bc47e
Merge pull request #263 from Xilinx/bump_to_fa6e4338
cferry-AMD Aug 16, 2024
c807411
Merge pull request #264 from Xilinx/bump_to_538257bf
cferry-AMD Aug 16, 2024
7a09708
[AutoBump] Merge with 507e59aa
cferry-AMD Aug 16, 2024
f6b4f42
Merge with fixes of 26d896f3
cferry-AMD Aug 16, 2024
70b28b5
Use type converter
cferry-AMD Aug 16, 2024
4be5a49
[AutoBump] Merge with a22bd00c
cferry-AMD Aug 16, 2024
6c48d6f
Merge pull request #265 from Xilinx/bump_to_0aa6d57e
cferry-AMD Aug 16, 2024
92ae065
Merge with fixes of c6d419c1
cferry-AMD Aug 16, 2024
28cc244
[AutoBump] Merge with 235d6841
cferry-AMD Aug 16, 2024
6f96182
Merge pull request #266 from Xilinx/bump_to_8612fa0d
cferry-AMD Aug 16, 2024
752668a
Merge with fixes of e1873d99
cferry-AMD Aug 16, 2024
4ff51c6
[AutoBump] Merge with cbb27bef
cferry-AMD Aug 16, 2024
c987f28
Merge pull request #267 from Xilinx/bump_to_71db9715
cferry-AMD Aug 16, 2024
2440f0f
Merge pull request #268 from Xilinx/bump_to_527a6242
cferry-AMD Aug 19, 2024
d4c1ac3
Merge with fixes of 10a57f3a
cferry-AMD Aug 19, 2024
27852fc
Merge pull request #269 from Xilinx/bump_to_72c729f3
cferry-AMD Aug 19, 2024
81aea94
[AutoBump] Merge with d0dcf06a
cferry-AMD Aug 19, 2024
4995018
Merge with fixes of 1f268092
cferry-AMD Aug 19, 2024
647a14d
Merge pull request #270 from Xilinx/bump_to_507e59aa
cferry-AMD Aug 19, 2024
ae1f23a
[AutoBump] Merge with 17642c76
cferry-AMD Aug 19, 2024
ad69abd
Merge with fixes of 5b702be1
cferry-AMD Aug 19, 2024
cb74034
[Github] Fix typo in PR code formatting job
boomanaiden154 Apr 2, 2024
c510199
[AutoBump] Merge with a853d799
cferry-AMD Aug 19, 2024
2b0c7b1
Merge with fixes of a4c47055
cferry-AMD Aug 19, 2024
a15119a
Merge pull request #282 from Xilinx/hotfix_f6c87be1
cferry-AMD Aug 19, 2024
1c94689
[AutoBump] Merge with e27c3736
cferry-AMD Aug 19, 2024
fa5b770
Use feature/fused-ops to pull code formatter from
cferry-AMD Aug 19, 2024
7023c10
Do this on PRs targeting feature/fused-ops rather than main
cferry-AMD Aug 19, 2024
9fe7bc3
Merge pull request #285 from Xilinx/corentin.fix_code_formatter_ref
cferry-AMD Aug 19, 2024
047fde2
Merge pull request #271 from Xilinx/bump_to_26d896f3
cferry-AMD Aug 20, 2024
495c94a
Merge remote-tracking branch 'xilinx/feature/fused-ops' into bump_to_…
cferry-AMD Aug 20, 2024
047c205
Merge pull request #272 from Xilinx/bump_to_a22bd00c
cferry-AMD Aug 20, 2024
6d79e0c
Merge with fixes of 50b93733
cferry-AMD Aug 20, 2024
63ad63e
[AutoBump] Merge with 3b74f8c1
cferry-AMD Aug 20, 2024
e65741e
Merge pull request #273 from Xilinx/bump_to_c6d419c1
cferry-AMD Aug 20, 2024
0b49c20
Merge pull request #274 from Xilinx/bump_to_235d6841
cferry-AMD Aug 20, 2024
0c4b814
Merge with fixes of be006372
cferry-AMD Aug 20, 2024
f357780
[mlir] Do not set lastToken in AsmParser's resetToken function
jorickert Aug 20, 2024
03c95c3
[AutoBump] Merge with 76782e28
cferry-AMD Aug 20, 2024
5a47cfc
Merge pull request #275 from Xilinx/bump_to_e1873d99
cferry-AMD Aug 20, 2024
f83552e
Merge pull request #276 from Xilinx/bump_to_cbb27bef
cferry-AMD Aug 20, 2024
362a235
Merge with fixes of 61717c1a
cferry-AMD Aug 20, 2024
cfd017c
Revert "[Verifier] Reject va_start in non-variadic function (#88809)"
JonChesterfield Apr 16, 2024
393bc06
[AutoBump] Merge with ac1f2de7
cferry-AMD Aug 20, 2024
1736b6b
Merge pull request #277 from Xilinx/bump_to_10a57f3a
cferry-AMD Aug 20, 2024
8227863
Merge pull request #278 from Xilinx/bump_to_d0dcf06a
cferry-AMD Aug 20, 2024
42dbd09
Add a unit test for AsmParser's file locations
jorickert Aug 21, 2024
5f083d4
Add nodiscard attribute to allowsUnregisteredDialects
jorickert Aug 21, 2024
c9a2f85
Merge pull request #290 from Xilinx/jrickert.parse_end_loc
jorickert Aug 21, 2024
1066b80
Merge pull request #279 from Xilinx/bump_to_1f268092
mgehre-amd Aug 21, 2024
6fd816d
Merge pull request #280 from Xilinx/bump_to_17642c76
mgehre-amd Aug 21, 2024
845bd8a
Merge pull request #281 from Xilinx/bump_to_5b702be1
mgehre-amd Aug 21, 2024
8b08487
Merge pull request #283 from Xilinx/bump_to_a853d799
mgehre-amd Aug 21, 2024
79f401d
Merge pull request #284 from Xilinx/bump_to_a4c47055
mgehre-amd Aug 21, 2024
996ef29
Merge pull request #286 from Xilinx/bump_to_e27c3736
mgehre-amd Aug 21, 2024
c2057fe
Merge pull request #287 from Xilinx/bump_to_50b93733
mgehre-amd Aug 21, 2024
de3b04f
Merge pull request #288 from Xilinx/bump_to_3b74f8c1
mgehre-amd Aug 21, 2024
4fa5aa7
Merge pull request #289 from Xilinx/bump_to_be006372
mgehre-amd Aug 21, 2024
a3c3879
Merge pull request #291 from Xilinx/bump_to_76782e28
mgehre-amd Aug 21, 2024
aec0fbb
Merge pull request #292 from Xilinx/bump_to_61717c1a
mgehre-amd Aug 21, 2024
8acc0d4
Merge pull request #293 from Xilinx/bump_to_ac1f2de7
mgehre-amd Aug 22, 2024
e49ace2
[AutoBump] Merge with fixes of 1c076b43 (Apr 16)
mgehre-amd Aug 22, 2024
91788e3
[AutoBump] Merge with b851c7f1 (Apr 17)
mgehre-amd Aug 22, 2024
b00542c
[AutoBump] Merge with fixes of 47148832 (Apr 17)
mgehre-amd Aug 22, 2024
cdb2080
[AutoBump] Merge with 4c3514fa (Apr 18)
mgehre-amd Aug 22, 2024
e092136
[AutoBump] Merge with fixes of c515c780 (Apr 18)
mgehre-amd Aug 22, 2024
643434e
Merge commit '82383d5f3fa8' into bump_to_82383d5f3fa8
mgehre-amd Aug 22, 2024
b308edb
Merge pull request #294 from Xilinx/bump_to_1c076b43
mgehre-amd Aug 22, 2024
ac378c2
Merge pull request #295 from Xilinx/bump_to_b851c7f1
mgehre-amd Aug 22, 2024
07845fc
Merge commit '6870ac201f9f' into bump_to_6870ac201f9f
mgehre-amd Aug 22, 2024
4d5e80d
Merge commit '24da7fa029f9' into bump_to_24da7fa029f9
mgehre-amd Aug 22, 2024
64ba2b4
Merge commit '9d66dcaf172c' into HEAD
mgehre-amd Aug 23, 2024
c155219
[AutoBump] Merge with 23f8fac7 (May 14)
mgehre-amd Aug 23, 2024
aae518b
[AutoBump] Merge with fixes of ad1083dc (May 14)
mgehre-amd Aug 23, 2024
9984bae
[AutoBump] Merge with ea238974 (May 14)
mgehre-amd Aug 23, 2024
6717a41
[AutoBump] Merge with fixes of ecce5ccd (May 14)
mgehre-amd Aug 23, 2024
2c1ffc0
Merge pull request #296 from Xilinx/bump_to_47148832
mgehre-amd Aug 23, 2024
5fc483d
Merge pull request #297 from Xilinx/bump_to_4c3514fa
mgehre-amd Aug 23, 2024
e6a5e19
Merge pull request #298 from Xilinx/bump_to_c515c780
mgehre-amd Aug 23, 2024
af74a27
Merge pull request #300 from Xilinx/bump_to_6870ac201f9f
mgehre-amd Aug 23, 2024
5f25d08
[AutoBump] Merge with 83891777 (May 16)
mgehre-amd Aug 23, 2024
c061f27
[AutoBump] Merge with fixes of de483ad5 (May 16)
mgehre-amd Aug 23, 2024
cfac8df
Merge pull request #301 from Xilinx/bump_to_24da7fa029f9
mgehre-amd Aug 24, 2024
1815baa
[AutoBump] Merge with 267de854 (May 22)
mgehre-amd Aug 24, 2024
205dac1
[AutoBump] Merge with fixes of 76303791 (May 22)
mgehre-amd Aug 26, 2024
b4715ec
[AutoBump] Merge with f284af48 (May 28)
mgehre-amd Aug 26, 2024
5c90f66
[AutoBump] Merge with fixes of af22e274 (May 28)
mgehre-amd Aug 26, 2024
9b0657c
[AutoBump] Merge with 5901d400 (May 28)
mgehre-amd Aug 26, 2024
9ffd40d
[AutoBump] Merge with fixes of debdbeda (May 28)
mgehre-amd Aug 26, 2024
1886f74
Fix merge
mgehre-amd Aug 26, 2024
7d90abb
Merge remote-tracking branch 'origin/feature/fused-ops' into bump_to_…
mgehre-amd Aug 27, 2024
d92bf11
Merge pull request #302 from Xilinx/bump_to_9d66dcaf172c
mgehre-amd Aug 27, 2024
72366b7
[AutoBump] Merge with 6a3982f8 (May 30)
mgehre-amd Aug 28, 2024
7090d09
[AutoBump] Merge with fixes of 4bce2701 (May 30)
mgehre-amd Aug 28, 2024
a86656d
[AutoBump] Merge with 22a7f7c3 (Jun 03)
mgehre-amd Aug 29, 2024
b1e9111
[AutoBump] Merge with fixes of 12fcca0a (Jun 03)
mgehre-amd Aug 31, 2024
75dd1f5
[AutoBump] Merge with 4ab73549 (Jun 04)
mgehre-amd Aug 31, 2024
690809b
[AutoBump] Merge with fixes of 46672c1d (Jun 04)
mgehre-amd Sep 2, 2024
fc56b0f
Merge pull request #299 from Xilinx/bump_to_82383d5f3fa8
mgehre-amd Sep 2, 2024
5520c5c
Merge pull request #303 from Xilinx/bump_to_23f8fac7
cferry-AMD Sep 2, 2024
4283845
Merge pull request #304 from Xilinx/bump_to_ad1083dc
cferry-AMD Sep 3, 2024
45e5b4b
Merge pull request #305 from Xilinx/bump_to_ea238974
cferry-AMD Sep 3, 2024
6b5496a
Merge pull request #306 from Xilinx/bump_to_ecce5ccd
mgehre-amd Sep 3, 2024
b8d108f
Merge pull request #307 from Xilinx/bump_to_83891777
mgehre-amd Sep 3, 2024
88c094e
Merge pull request #308 from Xilinx/bump_to_de483ad5
mgehre-amd Sep 4, 2024
efc7b5a
Merge pull request #309 from Xilinx/bump_to_267de854
mgehre-amd Sep 4, 2024
4c3cc64
Merge pull request #310 from Xilinx/bump_to_76303791
mgehre-amd Sep 4, 2024
a7c393d
Merge pull request #311 from Xilinx/bump_to_f284af48
mgehre-amd Sep 4, 2024
c84d378
Merge pull request #312 from Xilinx/bump_to_af22e274
jorickert Sep 5, 2024
9d1002a
Merge pull request #314 from Xilinx/bump_to_5901d400
jorickert Sep 5, 2024
a77d993
[AutoBump] Merge with fe0dee4d (Jun 10)
jorickert Sep 5, 2024
d9ba969
[AutoBump] Merge with fixes of 8b7e8365 (Jun 10)
jorickert Sep 5, 2024
ce1bf2b
[AutoBump] Merge with bddd8eae (Jun 10)
jorickert Sep 5, 2024
da553d7
[AutoBump] Merge with fixes of 346bd917 (Jun 10)
jorickert Sep 5, 2024
7533fc2
[AutoBump] Merge with 65310f34 (Jun 10)
jorickert Sep 6, 2024
7f73835
[AutoBump] Merge with fixes of 52050f3f (Jun 10)
jorickert Sep 6, 2024
dec1017
[FXML-4791] Add printout of references with emitc.reference attr (#316)
cferry-AMD Sep 9, 2024
dfb5921
[FXML-4791] Lower memref expand/collapse to EmitC (#313)
cferry-AMD Sep 9, 2024
fa9c1f8
Hotfix to function assembly printer (#331)
cferry-AMD Sep 9, 2024
a5e2e47
[AutoBump] Merge with be6248a4 (Jun 11)
mgehre-amd Sep 9, 2024
611771a
Merge remote-tracking branch 'xlnx/feature/fused-ops' into bump_to_de…
mgehre-amd Sep 10, 2024
6ba03f3
[AutoBump] Merge with fixes of d5863721 (Jun 11)
mgehre-amd Sep 10, 2024
18808c7
Merge pull request #315 from Xilinx/bump_to_debdbeda
mgehre-amd Sep 10, 2024
e36fc76
[AutoBump] Merge with cc04bbb2 (Jun 11)
mgehre-amd Sep 10, 2024
3927881
[AutoBump] Merge with fixes of 0fb216fb (Jun 12)
mgehre-amd Sep 10, 2024
1f6dc6e
[AutoBump] Merge with 53c06c56 (Jun 13)
mgehre-amd Sep 10, 2024
d266b33
[AutoBump] Merge with fixes of 705f8581 (Jun 13)
mgehre-amd Sep 10, 2024
1f8fafc
Merge pull request #333 from Xilinx/bump_to_d5863721
mgehre-amd Sep 11, 2024
e6eae35
Merge pull request #334 from Xilinx/bump_to_cc04bbb2
mgehre-amd Sep 11, 2024
d90c932
Merge pull request #335 from Xilinx/bump_to_0fb216fb
cferry-AMD Sep 12, 2024
ad8dd99
[AutoBump] Merge with 12f77e81 (Jun 13)
mgehre-amd Sep 12, 2024
bba87a0
[AutoBump] Merge with fixes of e3872996 (Jun 13)
mgehre-amd Sep 12, 2024
7a86532
[AutoBump] Merge with 41fecca9 (Jun 14)
mgehre-amd Sep 12, 2024
8fa3c60
[AutoBump] Merge with fixes of a506279e (Jun 14)
mgehre-amd Sep 12, 2024
5006bfc
[AutoBump] Merge with c091dd48 (Jun 15)
mgehre-amd Sep 12, 2024
ab22c35
[AutoBump] Merge with fixes of 93ffe179 (Jun 15)
mgehre-amd Sep 12, 2024
7e79490
[AutoBump] Merge with 770393bb (Jun 17)
mgehre-amd Sep 12, 2024
86fd3f7
[AutoBump] Merge with fixes of 3cead572 (Jun 17)
mgehre-amd Sep 12, 2024
75073a8
[AutoBump] Merge with 21ba91c4 (Jun 17)
mgehre-amd Sep 12, 2024
41f4ee0
[AutoBump] Merge with fixes of 13d983e7 (Jun 17)
mgehre-amd Sep 12, 2024
c0235f0
Fix emitc tests
mgehre-amd Sep 12, 2024
cca70a5
Merge commit '9b78ddf3b2ab' into bump_to_13d983e7
mgehre-amd Sep 13, 2024
fa28ce5
Merge pull request #336 from Xilinx/bump_to_53c06c56
mgehre-amd Sep 13, 2024
7224ccc
Merge pull request #337 from Xilinx/bump_to_705f8581
mgehre-amd Sep 13, 2024
d847318
Merge pull request #338 from Xilinx/bump_to_12f77e81
mgehre-amd Sep 13, 2024
b99af9c
Merge pull request #339 from Xilinx/bump_to_e3872996
mgehre-amd Sep 13, 2024
5e5958a
Merge pull request #340 from Xilinx/bump_to_41fecca9
mgehre-amd Sep 13, 2024
ff7d639
Merge pull request #341 from Xilinx/bump_to_a506279e
mgehre-amd Sep 13, 2024
44dd962
[AutoBump] Merge with 62d44fbd (Jun 25)
mgehre-amd Sep 13, 2024
7d62407
[AutoBump] Merge with fixes of f1e0657d (Jun 25)
mgehre-amd Sep 13, 2024
6d8ed84
[AutoBump] Merge with 50b15341 (Jun 27)
mgehre-amd Sep 13, 2024
ee6e01f
[AutoBump] Merge with fixes of 8d237190 (Jun 27)
mgehre-amd Sep 16, 2024
b309613
Merge pull request #346 from Xilinx/bump_to_13d983e7
mgehre-amd Sep 16, 2024
7560488
Merge pull request #347 from Xilinx/bump_to_62d44fbd
mgehre-amd Sep 16, 2024
16c1789
Merge pull request #348 from Xilinx/bump_to_f1e0657d
mgehre-amd Sep 16, 2024
658586f
Merge pull request #349 from Xilinx/bump_to_50b15341
mgehre-amd Sep 16, 2024
b46c5b7
Merge pull request #350 from Xilinx/bump_to_8d237190
mgehre-amd Sep 16, 2024
276cbea
Relaxe affine
josel-amd Sep 18, 2024
ed14c0c
Merge commit '585523750e2bbe374d1cb3bf4ff9d53de29b9593' into bump_to_…
mgehre-amd Sep 18, 2024
c391a49
Address comments
josel-amd Sep 18, 2024
9054950
Merge pull request #353 from Xilinx/jose-relax-affine-if
josel-amd Sep 19, 2024
41be2c7
[AutoBump] Merge with 6cf3e7d0 (Aug 14)
mgehre-amd Sep 19, 2024
8e07459
[AutoBump] Merge with fixes of 98119718 (Aug 14)
mgehre-amd Sep 20, 2024
7f35dc8
[AutoBump] Merge with 894d3eeb (Aug 15)
mgehre-amd Sep 20, 2024
9b53030
[AutoBump] Merge with fixes of 2d50029f (Aug 15)
mgehre-amd Sep 20, 2024
6f28929
Merge commit 'f9031f00f2c9' into bump_to_2d50029f
mgehre-amd Sep 20, 2024
fe35b4b
For lowering: use adaptor operands
cferry-AMD Sep 26, 2024
48759d3
Dyanmic shape check before negative size
cferry-AMD Sep 27, 2024
93496a9
Pass to lower UB to EmitC
cferry-AMD Sep 27, 2024
4d12bc8
Lower to unitilalized variable
cferry-AMD Sep 30, 2024
8c1994b
Add missing newlines
cferry-AMD Sep 30, 2024
e88bb31
Merge pull request #377 from Xilinx/corentin.verify_emitc_array_type
cferry-AMD Sep 30, 2024
ca88be2
Add test for vector
cferry-AMD Sep 30, 2024
578a79c
Nit
cferry-AMD Sep 30, 2024
69d08b3
Merge pull request #378 from Xilinx/corentin.ub_lowering
cferry-AMD Sep 30, 2024
3c7d83a
Merge remote-tracking branch 'origin/feature/fused-ops' into bump_to_…
mgehre-amd Oct 1, 2024
e48815f
Add option to initialize UB.poison variables
cferry-AMD Oct 1, 2024
3bc24d3
Use else-if
cferry-AMD Oct 1, 2024
daa3383
Merge pull request #381 from Xilinx/corentin.ub_initialize
cferry-AMD Oct 1, 2024
aeaf33f
Merge commit 'daa33839b18e' into bump_to_5855237
mgehre-amd Oct 1, 2024
3db9abb
normalize-memrefs: Normalize memref.alloca
mgehre-amd Oct 1, 2024
3692340
Merge pull request #354 from Xilinx/bump_to_5855237
mgehre-amd Oct 2, 2024
09ddec3
Add bounds to the affine.if regions (#380)
josel-amd Oct 2, 2024
f139673
Remove explicit SmallVector size
mgehre-amd Oct 2, 2024
719df3f
Update documentation
mgehre-amd Oct 4, 2024
07d97d4
Merge pull request #382 from Xilinx/matthias.normalize_memref_alloca
mgehre-amd Oct 4, 2024
79d2891
Merge pull request #355 from Xilinx/bump_to_6cf3e7d0
mgehre-amd Oct 4, 2024
a00598f
Merge pull request #356 from Xilinx/bump_to_98119718
mgehre-amd Oct 4, 2024
9d48ee6
Merge pull request #375 from Xilinx/corentin.fix_for_lowering
mgehre-amd Oct 4, 2024
9fd8d27
emitc: Add fmtArgs to verbatim
mgehre-amd Oct 7, 2024
30b5f72
Don't print semicolon after emitc.verbatim within emitc.for
mgehre-amd Oct 8, 2024
edbe321
Review comment
mgehre-amd Oct 9, 2024
f977e14
Merge pull request #383 from Xilinx/matthias.verbatim_args
mgehre-amd Oct 9, 2024
81b017a
Merge pull request #384 from Xilinx/matthias.trailing_semi_verbatim
mgehre-amd Oct 9, 2024
95521c7
Fix verbatim parsing to be unambiguous
mgehre-amd Oct 10, 2024
b04eab8
Merge pull request #385 from Xilinx/matthias.fix_verbatim_parsing
mgehre-amd Oct 10, 2024
9489ae8
feat: implement constant folding for tosa.slice
ttjost Oct 14, 2024
83bdfaf
test: add more LIT tests for tosa.slice folding.
ttjost Oct 15, 2024
08bb427
Merge pull request #388 from Xilinx/tiagot.constant_folding_tosa_slice
ttjost Oct 15, 2024
3cd352b
TosaToLinalg: Prefer to emit identity maps (#386)
mgehre-amd Oct 18, 2024
2015abf
Fix attr aliasing on region args (#389)
josel-amd Oct 18, 2024
4b36487
Copy attributes from the original operation (SCF::ForOp) into the low…
josel-amd Oct 22, 2024
ad4697c
OpaqueType with format strings (#391)
josel-amd Oct 28, 2024
a64ebcc
Add emitc.tu
mgehre-amd Nov 5, 2024
22fcd3e
[mlir] Add bubbling patterns for non intersecting reshapes (#103401)
IanWood1 Aug 14, 2024
7a11b63
[mlir][tensor] Add consumer fusion for `tensor.pack` op. (#103715)
Yun-Fly Aug 23, 2024
7489677
[mlir][linalg] Implement TilingInterface for winograd operators (#96184)
Hsiangkai Aug 16, 2024
d70a2f8
[mlir][TilingInterface] Avoid looking at operands for getting slices …
MaheshRavishankar Sep 12, 2024
a8317e1
[mlir] Add option for a cleanup pattern set to SCF tiling helper (#10…
qedawkins Oct 4, 2024
cab7e24
Merge pull request #393 from Xilinx/matthias.emitc_tu
mgehre-amd Nov 6, 2024
ac5f771
emitc.tu: Automatically create block for body
mgehre-amd Nov 6, 2024
831eb66
emitc.include: don't require the parent to be a ModuleOp
mgehre-amd Nov 6, 2024
26a9787
Merge pull request #396 from Xilinx/matthias.emitc_include_parent
mgehre-amd Nov 7, 2024
0684dc4
Merge pull request #395 from Xilinx/matthias.emitc_tu_2
mgehre-amd Nov 7, 2024
69cbbb5
fix: fuse locations of double reshapes when folding.
ttjost Nov 8, 2024
2f0e627
Merge pull request #397 from Xilinx/tiagot.merge_location_double_resh…
ttjost Nov 8, 2024
1e37f7b
Merge pull request #394 from Xilinx/matthias.tiling_backport
mgehre-amd Nov 11, 2024
39c4494
feat: improve CSE by fusing locations when replacing one op for the o…
ttjost Nov 11, 2024
213d2b0
Merge pull request #398 from Xilinx/tiagot.improve_cse_with_debug_loc…
ttjost Nov 11, 2024
99f8f98
Make EliminateLibm work on EmitC::FuncOp
josel-amd Nov 12, 2024
1fc2b98
Fix test
josel-amd Nov 12, 2024
2113e3c
Merge pull request #399 from Xilinx/jose.fix_pass
mgehre-amd Nov 12, 2024
a4a93fb
emitc: Do not add newlines after ModuleOp, TranslationUnitOp
mgehre-amd Nov 14, 2024
72cbeca
Merge pull request #400 from Xilinx/matthias.emitc_newline
mgehre-amd Nov 14, 2024
7326995
Fix yield conversion of scf.if/scf.for to emitc (#401)
josel-amd Nov 22, 2024
20a6720
Add -mlir-reproducer-before-all (#402)
mgehre-amd Nov 25, 2024
e25d207
Include comments with template argument names in Cpp code from EmitC …
lmendesp-amd Nov 27, 2024
f3f4919
Readability: Add option to emit constants values in place
lmendesp-amd Nov 28, 2024
19bdfae
Merge pull request #357 from Xilinx/bump_to_894d3eeb
mgehre-amd Nov 29, 2024
7d54e5d
Merge remote-tracking branch 'origin/feature/fused-ops' into bump_to_…
mgehre-amd Nov 29, 2024
09f9db8
Merge pull request #358 from Xilinx/bump_to_2d50029f
mgehre-amd Nov 29, 2024
File filter

Filter by extension

Filter by extension


Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
18 changes: 12 additions & 6 deletions .github/workflows/llvm-project-tests.yml
Original file line number Diff line number Diff line change
Expand Up @@ -14,7 +14,7 @@ on:
required: false
os_list:
required: false
default: '["ubuntu-latest", "windows-2019", "macOS-13"]'
default: '["ubuntu-latest"]'
python_version:
required: false
type: string
Expand All @@ -39,7 +39,7 @@ on:
type: string
# Use windows-2019 due to:
# https://developercommunity.visualstudio.com/t/Prev-Issue---with-__assume-isnan-/1597317
default: '["ubuntu-latest", "windows-2019", "macOS-13"]'
default: '["ubuntu-latest"]'

python_version:
required: false
Expand Down Expand Up @@ -76,10 +76,10 @@ jobs:
# python3.10.6 libraries instead of the 64-bit libraries when building
# lldb. Using this setup-python action to make 3.10 the default
# python fixes this.
- name: Setup Python
uses: actions/setup-python@v5
with:
python-version: ${{ inputs.python_version }}
#- name: Setup Python
# uses: actions/setup-python@v4
# with:
# python-version: ${{ inputs.python_version }}
- name: Install Ninja
if: runner.os != 'Linux'
uses: llvm/actions/install-ninja@main
Expand All @@ -89,6 +89,12 @@ jobs:
- uses: actions/checkout@v4
with:
fetch-depth: 250
- name: Install requirements.txt
if: inputs.projects == 'mlir'
run: |
apt-get update
apt-get install -y python3-pip
pip install -r mlir/python/requirements.txt
- name: Setup ccache
uses: hendrikmuhs/ccache-action@v1
with:
Expand Down
26 changes: 26 additions & 0 deletions .github/workflows/mlir-tests.yml
Original file line number Diff line number Diff line change
@@ -0,0 +1,26 @@
name: MLIR Tests

permissions:
contents: read

on:
workflow_dispatch:
pull_request:
# Only builds on push populate the ccache that can be used by PRs
push:
branches: [ main, feature/fused-ops ]

concurrency:
# Skip intermediate builds: always.
# Cancel intermediate builds: only if it is a pull request build.
group: ${{ github.workflow }}-${{ github.ref }}
cancel-in-progress: ${{ startsWith(github.ref, 'refs/pull/') }}

jobs:
check_mlir:
name: Test mlir
uses: ./.github/workflows/llvm-project-tests.yml
with:
build_target: check-mlir
projects: mlir
extra_cmake_args: -DMLIR_ENABLE_BINDINGS_PYTHON=ON
2 changes: 1 addition & 1 deletion .github/workflows/pr-code-format.yml
Original file line number Diff line number Diff line change
Expand Up @@ -6,13 +6,13 @@ permissions:
on:
pull_request:
branches:
- feature/fused-ops
- main
- 'users/**'

jobs:
code_formatter:
runs-on: ubuntu-latest
if: github.repository == 'llvm/llvm-project'
steps:
- name: Fetch LLVM sources
uses: actions/checkout@v4
Expand Down
2 changes: 1 addition & 1 deletion clang/cmake/modules/AddClang.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -201,7 +201,7 @@ endmacro()

function(clang_target_link_libraries target type)
if (TARGET obj.${target})
target_link_libraries(obj.${target} ${ARGN})
target_link_libraries(obj.${target} PUBLIC ${ARGN})
endif()

get_property(LLVM_DRIVER_TOOLS GLOBAL PROPERTY LLVM_DRIVER_TOOLS)
Expand Down
4 changes: 4 additions & 0 deletions llvm/cmake/modules/AddLLVM.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -590,6 +590,10 @@ function(llvm_add_library name)
# result in generating header files. Add a dependendency so that
# the generated header is created before this object library.
if(ARG_LINK_LIBS)
# Link to LINK_LIBS to record which of their include directories
# are system directories. This information is not available in
# INCLUDE_DIRECTORIES property.
target_link_libraries(${obj_name} PRIVATE ${ARG_LINK_LIBS})
cmake_parse_arguments(LINK_LIBS_ARG
""
""
Expand Down
5 changes: 4 additions & 1 deletion llvm/lib/Analysis/Lint.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -334,7 +334,10 @@ void Lint::visitCallBase(CallBase &I) {
}

case Intrinsic::vastart:
// vastart in non-varargs function is rejected by the verifier
Check(I.getParent()->getParent()->isVarArg(),
"Undefined behavior: va_start called in a non-varargs function",
&I);

visitMemoryReference(I, MemoryLocation::getForArgument(&I, 0, TLI),
std::nullopt, nullptr, MemRef::Read | MemRef::Write);
break;
Expand Down
5 changes: 0 additions & 5 deletions llvm/lib/IR/Verifier.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -5877,11 +5877,6 @@ void Verifier::visitIntrinsicCall(Intrinsic::ID ID, CallBase &Call) {

break;
}
case Intrinsic::vastart: {
Check(Call.getFunction()->isVarArg(),
"va_start called in a non-varargs function");
break;
}
case Intrinsic::vector_reduce_and:
case Intrinsic::vector_reduce_or:
case Intrinsic::vector_reduce_xor:
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/AArch64/GlobalISel/vastart.ll
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@


declare void @llvm.va_start(ptr)
define void @test_va_start(ptr %list, ...) {
define void @test_va_start(ptr %list) {
; CHECK-LABEL: name: test_va_start
; CHECK: [[LIST:%[0-9]+]]:_(p0) = COPY $x0
; CHECK-IOS: G_VASTART [[LIST]](p0) :: (store (s64) into %ir.list, align 1)
Expand Down
7 changes: 7 additions & 0 deletions llvm/test/Other/lint.ll
Original file line number Diff line number Diff line change
Expand Up @@ -124,6 +124,13 @@ define void @0() nounwind {
ret void
}

; CHECK: va_start called in a non-varargs function
declare void @llvm.va_start(ptr)
define void @not_vararg(ptr %p) nounwind {
call void @llvm.va_start(ptr %p)
ret void
}

; CHECK: Undefined behavior: Branch to non-blockaddress
define void @use_indbr() {
indirectbr ptr @foo, [label %block]
Expand Down
8 changes: 0 additions & 8 deletions llvm/test/Verifier/variadic.ll

This file was deleted.

2 changes: 2 additions & 0 deletions mlir/docs/Dialects/emitc.md
Original file line number Diff line number Diff line change
Expand Up @@ -12,6 +12,8 @@ The following convention is followed:
operation, C++20 is required.
* If `ssize_t` is used, then the code requires the POSIX header `sys/types.h`
or any of the C++ headers in which the type is defined.
* If `emitc.array` with a dimension of size zero, then the code
requires [a GCC extension](https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html).
* Else the generated code is compatible with C99.

These restrictions are neither inherent to the EmitC dialect itself nor to the
Expand Down
2 changes: 2 additions & 0 deletions mlir/include/mlir-c/BuiltinAttributes.h
Original file line number Diff line number Diff line change
Expand Up @@ -547,6 +547,8 @@ MLIR_CAPI_EXPORTED int64_t
mlirDenseElementsAttrGetInt64Value(MlirAttribute attr, intptr_t pos);
MLIR_CAPI_EXPORTED uint64_t
mlirDenseElementsAttrGetUInt64Value(MlirAttribute attr, intptr_t pos);
MLIR_CAPI_EXPORTED size_t mlirDenseElementsAttrGetIndexValue(MlirAttribute attr,
intptr_t pos);
MLIR_CAPI_EXPORTED float mlirDenseElementsAttrGetFloatValue(MlirAttribute attr,
intptr_t pos);
MLIR_CAPI_EXPORTED double
Expand Down
5 changes: 5 additions & 0 deletions mlir/include/mlir-c/Pass.h
Original file line number Diff line number Diff line change
Expand Up @@ -78,6 +78,11 @@ mlirPassManagerRunOnOp(MlirPassManager passManager, MlirOperation op);
MLIR_CAPI_EXPORTED void
mlirPassManagerEnableIRPrinting(MlirPassManager passManager);

/// Enable lir-reproducer-before-all.
MLIR_CAPI_EXPORTED void
mlirPassManagerEnableReproducerBeforeAll(MlirPassManager passManager,
MlirStringRef outputDir);

/// Enable / disable verify-each.
MLIR_CAPI_EXPORTED void
mlirPassManagerEnableVerifier(MlirPassManager passManager, bool enable);
Expand Down
4 changes: 3 additions & 1 deletion mlir/include/mlir/Conversion/FuncToEmitC/FuncToEmitC.h
Original file line number Diff line number Diff line change
Expand Up @@ -9,10 +9,12 @@
#ifndef MLIR_CONVERSION_FUNCTOEMITC_FUNCTOEMITC_H
#define MLIR_CONVERSION_FUNCTOEMITC_FUNCTOEMITC_H

#include "mlir/Transforms/DialectConversion.h"
namespace mlir {
class RewritePatternSet;

void populateFuncToEmitCPatterns(RewritePatternSet &patterns);
void populateFuncToEmitCPatterns(RewritePatternSet &patterns,
TypeConverter &typeConverter);
} // namespace mlir

#endif // MLIR_CONVERSION_FUNCTOEMITC_FUNCTOEMITC_H
5 changes: 4 additions & 1 deletion mlir/include/mlir/Conversion/MathToLibm/MathToLibm.h
Original file line number Diff line number Diff line change
Expand Up @@ -19,10 +19,13 @@ class OperationPass;

/// Populate the given list with patterns that convert from Math to Libm calls.
/// If log1pBenefit is present, use it instead of benefit for the Log1p op.
void populateMathToLibmConversionPatterns(RewritePatternSet &patterns);
void populateMathToLibmConversionPatterns(
RewritePatternSet &patterns, const ConvertMathToLibmOptions &options);

/// Create a pass to convert Math operations to libm calls.
std::unique_ptr<OperationPass<ModuleOp>> createConvertMathToLibmPass();
std::unique_ptr<OperationPass<ModuleOp>>
createConvertMathToLibmPass(const ConvertMathToLibmOptions &options);

} // namespace mlir

Expand Down
1 change: 1 addition & 0 deletions mlir/include/mlir/Conversion/Passes.h
Original file line number Diff line number Diff line change
Expand Up @@ -71,6 +71,7 @@
#include "mlir/Conversion/TosaToMLProgram/TosaToMLProgram.h"
#include "mlir/Conversion/TosaToSCF/TosaToSCF.h"
#include "mlir/Conversion/TosaToTensor/TosaToTensor.h"
#include "mlir/Conversion/UBToEmitC/UBToEmitC.h"
#include "mlir/Conversion/UBToLLVM/UBToLLVM.h"
#include "mlir/Conversion/UBToSPIRV/UBToSPIRV.h"
#include "mlir/Conversion/VectorToArmSME/VectorToArmSME.h"
Expand Down
31 changes: 27 additions & 4 deletions mlir/include/mlir/Conversion/Passes.td
Original file line number Diff line number Diff line change
Expand Up @@ -729,6 +729,12 @@ def ConvertMathToLibm : Pass<"convert-math-to-libm", "ModuleOp"> {
"func::FuncDialect",
"vector::VectorDialect",
];
let options = [
Option<"allowC23Features", "allow-c23-features", "bool", "true",
"Allow calls to C23-specific functions">,
Option<"roundingModeIsDefault", "rounding-mode-is-default", "bool", "false",
"Assume default rounding mode">
];
}

//===----------------------------------------------------------------------===//
Expand Down Expand Up @@ -1177,13 +1183,13 @@ def TosaToLinalgNamed
Pass that converts TOSA operations to the equivalent operations using the
Linalg named operations.
}];

let options = [
Option<"preferConv2DKernelLayoutHWCF", "prefer-conv2d-kernel-layout-hwcf",
Option<"preferConv2DKernelLayoutHWCF", "prefer-conv2d-kernel-layout-hwcf",
"bool", /*default=*/"false",
"Prefer generating linalg.conv_2d_nhwc_hwcf over linalg.conv_2d_nhwc_fhwc">
"Prefer generating linalg.conv_2d_nhwc_hwcf over linalg.conv_2d_nhwc_fhwc">,
Option<"useMatmulForSingleBatch", "use-matmul-for-single-batch", "bool", /*default=*/"false",
"Use linalg.matmul for 1x batch size instead of linalg.batch_matmul.">
];

let constructor = "tosa::createTosaToLinalgNamed()";
}

Expand Down Expand Up @@ -1232,6 +1238,23 @@ def TosaToTensor : Pass<"tosa-to-tensor"> {
let constructor = "tosa::createTosaToTensor()";
}

//===----------------------------------------------------------------------===//
// UBToEmitC
//===----------------------------------------------------------------------===//

def ConvertUBToEmitC : Pass<"convert-ub-to-emitc"> {
let summary = "Convert UB dialect to EmitC dialect";
let description = [{
This pass converts supported UB ops to EmitC dialect.
}];
let dependentDialects = ["emitc::EmitCDialect"];
let options = [
Option<"noInitialization", "no-initialization", "bool",
/*default=*/"false",
"Do not initialize the generated variables">,
];
}

//===----------------------------------------------------------------------===//
// UBToLLVM
//===----------------------------------------------------------------------===//
Expand Down
4 changes: 3 additions & 1 deletion mlir/include/mlir/Conversion/SCFToEmitC/SCFToEmitC.h
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,7 @@
#ifndef MLIR_CONVERSION_SCFTOEMITC_SCFTOEMITC_H
#define MLIR_CONVERSION_SCFTOEMITC_SCFTOEMITC_H

#include "mlir/Transforms/DialectConversion.h"
#include <memory>

namespace mlir {
Expand All @@ -19,7 +20,8 @@ class RewritePatternSet;
#include "mlir/Conversion/Passes.h.inc"

/// Collect a set of patterns to convert SCF operations to the EmitC dialect.
void populateSCFToEmitCConversionPatterns(RewritePatternSet &patterns);
void populateSCFToEmitCConversionPatterns(RewritePatternSet &patterns,
TypeConverter &typeConverter);
} // namespace mlir

#endif // MLIR_CONVERSION_SCFTOEMITC_SCFTOEMITC_H
4 changes: 3 additions & 1 deletion mlir/include/mlir/Conversion/TosaToArith/TosaToArith.h
Original file line number Diff line number Diff line change
Expand Up @@ -16,6 +16,7 @@
#include "mlir/Pass/Pass.h"

namespace mlir {
class TypeConverter;

#define GEN_PASS_DECL_TOSATOARITH
#include "mlir/Conversion/Passes.h.inc"
Expand All @@ -25,7 +26,8 @@ namespace tosa {
std::unique_ptr<Pass> createTosaToArith(bool includeApplyRescale = false,
bool use32BitApplyRescale = false);

void populateTosaToArithConversionPatterns(RewritePatternSet *patterns);
void populateTosaToArithConversionPatterns(TypeConverter &converter,
RewritePatternSet *patterns);

void populateTosaRescaleToArithConversionPatterns(RewritePatternSet *patterns,
bool include32Bit = false);
Expand Down
6 changes: 5 additions & 1 deletion mlir/include/mlir/Conversion/TosaToLinalg/TosaToLinalg.h
Original file line number Diff line number Diff line change
Expand Up @@ -18,6 +18,7 @@
#include "mlir/Pass/Pass.h"

namespace mlir {
class TypeConverter;

#define GEN_PASS_DECL_TOSATOLINALG
#define GEN_PASS_DECL_TOSATOLINALGNAMED
Expand Down Expand Up @@ -52,7 +53,10 @@ void populateTosaToLinalgConversionPatterns(TypeConverter &converter,

/// Populates conversion passes from TOSA dialect to Linalg named operations.
void populateTosaToLinalgNamedConversionPatterns(
RewritePatternSet *patterns, const TosaToLinalgNamedOptions &options);
TypeConverter &converter, RewritePatternSet *patterns,
const TosaToLinalgNamedOptions &options);

void populateTosaToLinalgTypeConversion(TypeConverter &converter);

} // namespace tosa
} // namespace mlir
Expand Down
26 changes: 26 additions & 0 deletions mlir/include/mlir/Conversion/UBToEmitC/UBToEmitC.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,26 @@
//===- UBToEmitC.h - UB to EmitC dialect conversion -------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//

#ifndef MLIR_CONVERSION_UBTOEMITC_UBTOEMITC_H
#define MLIR_CONVERSION_UBTOEMITC_UBTOEMITC_H

#include "mlir/Pass/Pass.h"
#include "mlir/Transforms/DialectConversion.h"

namespace mlir {
#define GEN_PASS_DECL_CONVERTUBTOEMITC
#include "mlir/Conversion/Passes.h.inc"

namespace ub {
void populateUBToEmitCConversionPatterns(TypeConverter &converter,
RewritePatternSet &patterns,
bool noInitialization);
} // namespace ub
} // namespace mlir

#endif // MLIR_CONVERSION_UBTOEMITC_UBTOEMITC_H
3 changes: 2 additions & 1 deletion mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
Original file line number Diff line number Diff line change
Expand Up @@ -336,7 +336,8 @@ def AffineForOp : Affine_Op<"for",
def AffineIfOp : Affine_Op<"if",
[ImplicitAffineTerminator, RecursivelySpeculatable,
RecursiveMemoryEffects, NoRegionArguments,
DeclareOpInterfaceMethods<RegionBranchOpInterface>
DeclareOpInterfaceMethods<RegionBranchOpInterface,
["getRegionInvocationBounds"]>
]> {
let summary = "if-then-else operation";
let description = [{
Expand Down
Loading
Loading