Merge branch 'main' into tests

docs/AIERouting.md

@@ -104,7 +104,7 @@ Here is an example of how users can route the circuit-switched `test/create-flow
 
 ```
 cd ${path-to-mlir-aie}/tools/aie-routing-command-line
-aie-opt --aie-create-pathfinder-flows='keep-flow-op=true' ../../test/create-flows/broadcast.mlir \
+aie-opt --aie-create-pathfinder-flows --aie-find-flows ../../test/create-flows/broadcast.mlir \
     | aie-translate --aie-flows-to-json > example.json
 python3 visualize.py -j example.json
 ```
@@ -172,7 +172,19 @@ Similarly, to visualize a packet-switched example,
 
 ```
 cd ${path-to-mlir-aie}/tools/aie-routing-command-line
-aie-opt --aie-create-pathfinder-flows='keep-flow-op=true' ../../test/create-packet-flows/test_create_packet_flows6.mlir \
+aie-opt --aie-create-pathfinder-flows --aie-find-flows ../../test/create-packet-flows/test_create_packet_flows6.mlir \
     | aie-translate --aie-flows-to-json > example.json
 python3 visualize.py -j example.json
 ```
+
+
+## Benckmarking Routing
+
+A python script is provided to measure the wall-clock time and the length of paths routed. Simply run 
+
+```
+python3  utils/router_performance.py test/create-flows/
+python3  utils/router_performance.py test/create-packet-flows/
+```
+
+and the generated `routing_performance_results.csv` files can be found under the corresponding folders.

docs/buildHostLin.md

@@ -122,7 +122,7 @@ You will...
 
     ```bash
     cd $LINUX_SRC_DIR
-    make olddefconfig
+    make O=$LINUX_BUILD_DIR olddefconfig
     ./scripts/config --file $LINUX_BUILD_DIR/.config --disable MODULE_SIG
     ./scripts/config --file $LINUX_BUILD_DIR/.config --disable SYSTEM_TRUSTED_KEYS
     ./scripts/config --file $LINUX_BUILD_DIR/.config --disable SYSTEM_REVOCATION_KEYS

include/aie/Dialect/AIE/IR/AIEOps.td

@@ -746,9 +746,7 @@ def AIE_DMABDPACKETOp: AIE_Op<"dma_bd_packet", []> {
   }];
 }
 
-def AIE_DMABDOp: AIE_Op<"dma_bd", [
-    ParentOneOf<["MemOp", "MemTileDMAOp", "ShimDMAOp", "DMAOp"]>,
-  ]> {
+def AIE_DMABDOp: AIE_Op<"dma_bd", []> {
   let summary = "Declare a dma buffer descriptor op";
   let description = [{
     This operation describes a buffer descriptor for DMA operations. In particular, it specifies
@@ -861,7 +859,7 @@ def AIE_DMABDOp: AIE_Op<"dma_bd", [
   let arguments = (
     ins AnyMemRef:$buffer,
         // in multiples of element width (not bytes)
-        DefaultValuedOptionalAttr<AIEI32Attr, "0">:$offset,
+        DefaultValuedAttr<AIEI32Attr, "0">:$offset,
         // in multiples of element width (not bytes)
         OptionalAttr<AIEI32Attr>:$len,
         OptionalAttr<BDDimLayoutArrayAttr>:$dimensions,
@@ -873,10 +871,7 @@ def AIE_DMABDOp: AIE_Op<"dma_bd", [
   );
 
   let hasVerifier = 1;
-
-  let assemblyFormat = [{
-    `(` $buffer `:` type($buffer) (`,` $offset^)? (`,` $len^)? (`,` $dimensions^)? (`,` $pad_dimensions^)? (`,` `pad_value` `=` $pad_value^)? `)` attr-dict
-  }];
+  let hasCustomAssemblyFormat = 1;
 
   let extraClassDeclaration = [{
     BufferOp getBufferOp();
@@ -1003,7 +998,6 @@ def AIE_DMAOp: AIE_Op<"dma", [
   }];
 }
 
-
 // MemOps are not actually Callable, but we want to inline code into them, so we have to
 // implement CallableOpInterface
 def AIE_MemOp: AIE_Op<"mem", [
@@ -1101,9 +1095,7 @@ def AIE_MemTileDMAOp: AIE_Op<"memtile_dma", [
   }];
 }
 
-def AIE_NextBDOp: AIE_Op<"next_bd", [
-    Terminator, ParentOneOf<["MemOp", "MemTileDMAOp", "mlir::func::FuncOp", "ShimDMAOp"]>
-  ]> {
+def AIE_NextBDOp: AIE_Op<"next_bd", [Terminator]> {
   let summary = "The next buffer descriptor";
   let description = [{
     This operation terminates the basic block describing a buffer descriptor inside
@@ -1967,4 +1959,29 @@ def AIE_ObjectFifoRegisterProcessOp: AIE_Op<"objectfifo.register_process", []> {
   }];
 }
 
+def AIE_BDChainOp: AIE_Op<"bd_chain", [Symbol]> {
+  let summary = "Definition of a Parametrizable Chain of Buffer Descriptors";
+  let description = [{
+    This operation allows you to define buffer descriptor chains with parametrizable inputs. 
+    This is useful for common patterns such as double buffering (ping-pong) that may look identical but use different input/output buffers and locks.
+    Currently, only buffers and locks are parametrizable.
+
+    Once defined, an abstract BD chain can be used elsewhere using AIEX ops in the runtime sequence. 
+    In the future, abstract BD chains will also be usable elsewhere, inside the static configuration.
+    At its usage sites, the abstract BD chain will be concretized with the given input arguments.
+  }];
+
+  let arguments = (
+    ins SymbolNameAttr:$sym_name,
+        TypeAttrOf<AnyTuple>:$entry_arg_types_attr
+  );
+  let regions = (region AnyRegion:$body);
+  let hasVerifier = 1;
+
+  let extraClassDeclaration = [{
+  }];
+  let hasCustomAssemblyFormat = 1;
+
+}
+
 #endif // AIE_OPS

include/aie/Dialect/AIE/IR/AIETargetModel.h

@@ -173,6 +173,11 @@ class AIETargetModel {
   /// tile.
   virtual uint32_t getNumBDs(int col, int row) const = 0;
 
+  /// Return true iff buffer descriptor `bd_id` on tile (`col`, `row`) can be
+  /// submitted on channel `channel`.
+  virtual bool isBdChannelAccessible(int col, int row, uint32_t bd_id,
+                                     int channel) const = 0;
+
   virtual uint32_t getNumMemTileRows() const = 0;
   /// Return the size (in bytes) of a MemTile.
   virtual uint32_t getMemTileSize() const = 0;
@@ -257,6 +262,10 @@ class AIE1TargetModel : public AIETargetModel {
   uint32_t getAccumulatorCascadeSize() const override { return 384; }
   uint32_t getNumLocks(int col, int row) const override { return 16; }
   uint32_t getNumBDs(int col, int row) const override { return 16; }
+  bool isBdChannelAccessible(int col, int row, uint32_t bd_id,
+                             int channel) const override {
+    return true;
+  }
   uint32_t getNumMemTileRows() const override { return 0; }
   uint32_t getMemTileSize() const override { return 0; }
 
@@ -318,6 +327,19 @@ class AIE2TargetModel : public AIETargetModel {
     return isMemTile(col, row) ? 48 : 16;
   }
 
+  bool isBdChannelAccessible(int col, int row, uint32_t bd_id,
+                             int channel) const override {
+    if (!isMemTile(col, row)) {
+      return true;
+    } else {
+      if ((channel & 1) == 0) { // even channel number
+        return bd_id < 24;
+      } else {
+        return bd_id >= 24;
+      }
+    }
+  }
+
   uint32_t getMemTileSize() const override { return 0x00080000; }
 
   uint32_t getNumDestSwitchboxConnections(int col, int row,

include/aie/Dialect/AIE/Transforms/AIEAssignBufferDescriptorIDs.h

@@ -0,0 +1,54 @@
+//===- AIEAssignBufferDescriptorIDs.h ---------------------------*- C++ -*-===//
+//
+// This file is licensed under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+// (c) Copyright 2024 Advanced Micro Devices Inc.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef AIE_ASSIGN_BUFFER_DESCRIPTOR_IDS_H
+#define AIE_ASSIGN_BUFFER_DESCRIPTOR_IDS_H
+
+#include <optional>
+
+#include "aie/Dialect/AIE/IR/AIEDialect.h"
+#include "aie/Dialect/AIE/Transforms/AIEAssignBufferDescriptorIDs.h"
+#include "aie/Dialect/AIE/Transforms/AIEPasses.h"
+
+#include "mlir/Pass/Pass.h"
+
+using namespace mlir;
+using namespace xilinx;
+using namespace xilinx::AIE;
+
+#include "aie/Dialect/AIE/IR/AIEDialect.h"
+#include "aie/Dialect/AIE/Transforms/AIEPasses.h"
+
+#include "mlir/Pass/Pass.h"
+
+#define DEBUG_TYPE "aie-assign-bd-ids"
+
+using namespace mlir;
+using namespace xilinx;
+using namespace xilinx::AIE;
+
+struct BdIdGenerator {
+  const int col;
+  const int row;
+  const AIETargetModel &targetModel;
+  std::set<uint32_t> alreadyAssigned;
+
+  BdIdGenerator(int col, int row, const AIETargetModel &targetModel);
+
+  std::optional<uint32_t> nextBdId(int channelIndex);
+
+  void assignBdId(uint32_t bdId);
+
+  bool bdIdAlreadyAssigned(uint32_t bdId);
+
+  void freeBdId(uint32_t bdId);
+};
+
+#endif

include/aie/Dialect/AIE/Transforms/AIEPasses.h

@@ -72,21 +72,10 @@ struct AIEPathfinderPass : AIERoutePathfinderFlowsBase<AIEPathfinderPass> {
 
   typedef std::pair<mlir::Operation *, Port> PhysPort;
 
-  typedef struct {
-    SwitchboxOp sw;
-    Port sourcePort;
-    Port destPort;
-  } SwConnection;
-
   bool findPathToDest(SwitchSettings settings, TileID currTile,
                       WireBundle currDestBundle, int currDestChannel,
                       TileID finalTile, WireBundle finalDestBundle,
                       int finalDestChannel);
-
-  SwitchboxOp getSwitchbox(DeviceOp &d, int col, int row);
-
-  mlir::Operation *getOrCreateTile(mlir::OpBuilder &builder, int col, int row);
-  SwitchboxOp getOrCreateSwitchbox(mlir::OpBuilder &builder, TileOp tile);
 };
 
 } // namespace xilinx::AIE

include/aie/Dialect/AIE/Transforms/AIEPasses.td

@@ -145,10 +145,7 @@ def AIERoutePathfinderFlows : Pass<"aie-create-pathfinder-flows", "DeviceOp"> {
     Option<"clRouteCircuit", "route-circuit", "bool", /*default=*/"true",
             "Flag to enable aie.flow lowering.">,      
     Option<"clRoutePacket", "route-packet", "bool", /*default=*/"true",
-            "Flag to enable aie.packetflow lowering.">,
-    Option<"clKeepFlowOp", "keep-flow-op", "bool", /*default=*/"false",
-            "Flag to not erase aie.flow/packetflow after its lowering,"
-            "used for routing visualization.">,       
+            "Flag to enable aie.packetflow lowering.">,     
   ];
 }