Disabling repeat count unless offset

Xilinx · May 18, 2024 · 82e8a47 · 82e8a47
1 parent c6f2dcf
commit 82e8a47
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Showing 3 changed files with 8 additions and 7 deletions.
diff --git a/mlir/lib/Conversion/AIRToAIEPass.cpp b/mlir/lib/Conversion/AIRToAIEPass.cpp
@@ -2640,8 +2640,8 @@ class AIRToAIEPass : public air::impl::AIRToAIEBase<AIRToAIEPass> {
       }
 
       int repeat_count = 1;
-      // if (p.second.size() == 1)
-      //   repeat_count = air::getRepeatCount(p.second[0]);
+      if (p.second.size() == 1)
+        repeat_count = air::getRepeatCount(p.second[0]);
 
       if (!channel_head) {
         channel_head = start_bb;

diff --git a/mlir/lib/Conversion/AIRToAIESchedulingUtils.cpp b/mlir/lib/Conversion/AIRToAIESchedulingUtils.cpp
@@ -186,7 +186,8 @@ int air::getRepeatCount(Operation *memcpy_op) {
       getConstantIntValue(chan_op.getSizes()[0])) {
     auto const_highest_stride = getConstantIntValue(chan_op.getStrides()[0]);
     auto const_highest_size = getConstantIntValue(chan_op.getSizes()[0]);
-    if (*const_highest_stride == 0) {
+    auto const_highest_offset = getConstantIntValue(chan_op.getOffsets()[0]);
+    if (*const_highest_stride == 0 && !const_highest_offset) {
       // Highest dimension data access pattern is repeat.
       return *const_highest_size;
     }

diff --git a/mlir/test/Conversion/AIRToAIE/air_shimcpy_to_aie2.mlir b/mlir/test/Conversion/AIRToAIE/air_shimcpy_to_aie2.mlir
@@ -640,15 +640,15 @@ func.func @func9(%arg0: memref<128xf32>, %arg1: memref<128xf32>) {
 // Tile / memtile DMA repeat count support.
 // CHECK: aie.device(xcve2802)
 // CHECK: %[[tileDMA_0_4:.*]] = aie.mem
-// CHECK:   aie.dma_start(S2MM, 0, ^bb1, ^bb2, repeat_count = 32)
+// CHECK:   aie.dma_start(S2MM, 0, ^bb1, ^bb2, repeat_count = 1)
 // CHECK:   aie.dma_bd({{.*}} : memref<32x256xi32, 2>, 0, 8192)
 // CHECK: %[[tileDMA_0_3:.*]] = aie.mem
-// CHECK:   aie.dma_start(S2MM, 0, ^bb1, ^bb2, repeat_count = 32)
+// CHECK:   aie.dma_start(S2MM, 0, ^bb1, ^bb2, repeat_count = 1)
 // CHECK:   aie.dma_bd({{.*}} : memref<32x256xi32, 2>, 0, 8192)
 // CHECK: %[[memTileDMA_2_1:.*]] = aie.memtile_dma
-// CHECK:   aie.dma_start(MM2S, 0, ^bb1, ^bb3, repeat_count = 32)
+// CHECK:   aie.dma_start(MM2S, 0, ^bb1, ^bb3, repeat_count = 1)
 // CHECK:   aie.dma_bd({{.*}} : memref<32x256xi32, 1>, 0, 8192)
-// CHECK:   aie.dma_start(MM2S, 1, ^bb4, ^bb2, repeat_count = 32)
+// CHECK:   aie.dma_start(MM2S, 1, ^bb4, ^bb2, repeat_count = 1)
 // CHECK:   aie.dma_bd({{.*}} : memref<32x256xi32, 1>, 0, 8192)
 // CHECK: @func10
 #map = affine_map<()[s0] -> (s0 * 32)>