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Fix simpleuart baud rate calculation
This patch fixes the baud rate calculation so that the behavior of simpleuart is in line with the description in picosoc/README.md: > The UART Clock Divider Register must be set to the system clock > frequency divided by the baud rate. Previously, the effective behavior of simpleuart was divisor = (clock frequency / baud rate) - 2 The fix is done basically by comparing `*_divcnt + 1 >= cfg_divider` instead of the old `*_divcnt > cfg_divider`. A special case is needed in the receive logic for the case where the divider is equal to 1, where at the next cycle we want to read the first bit (jumping straight to a `recv_state` of 2). Also, it seems that there was a bug in the receive logic before this patch. In the case of `recv_state` being 1, the divcnt was compared to the divider using `2*recv_divcnt > cfg_divider`. The intention there might have been something like `recv_divcnt + 1 > cfg_divider`, to account for the 1 cycle spent in state 0. In the current patch, this is accounted for by setting `recv_divcnt <= 1` (rather than 0) after reading the start edge. This patch also makes some minor stylistic changes that fix Verilator lint errors.
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