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Releases: aignacio/ravenoc

v1.0.3

27 Dec 12:46
5114002
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List of features added:

  • Support for multiple AXI read/write bursts for a single packet;
  • Refactor the output module and round-robin arbiter;
  • Added an additional IRQ mode for HEAD flit indication when it comes through the buffers;
  • Added CSR to indicate if the write buffer is full;

Stable v1.0.2

21 Jun 10:04
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Added support for moving CSRs in any 64KB address space and absolute addressing.

Stable v1.0.1

08 Apr 21:31
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-Added CSRs for pkt size read;
-Fixed bug on ghost reads from VCs read FIFOs when normal CSR pull;

Initial release

06 Apr 23:14
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This is the first version which has all the features in place.