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axi_pwm_gen: Add support for 16 channels #1213

Merged
merged 4 commits into from
Dec 15, 2023
Merged

axi_pwm_gen: Add support for 16 channels #1213

merged 4 commits into from
Dec 15, 2023

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alin724
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@alin724 alin724 commented Nov 7, 2023 •
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PR Description

axi_pwm_gen: Add support for 16 channels

  • Configurable number of channels using N_PWMS parameter [channels that will have valid data];
  • Static number of channels in the top module axi_pwm_gen [16];
  • SystemVerilog support for axi_pwm_gen top and regmap modules;
  • pwm_gen_tb - configuration task - link;
  • Linux driver update with corresponding regs' addresses and number of channels - link - PR;

PR Type

  • Bug fix (change that fixes an issue)
  • New feature (change that adds new functionality)
  • Breaking change (has dependencies in other repos or will cause CI to fail)

PR Checklist

  • I have followed the code style guidelines
  • I have performed a self-review of changes
  • I have compiled all hdl projects and libraries affected by this PR
  • I have tested in hardware affected projects, at least on relevant boards
  • I have commented my code, at least hard-to-understand parts
  • I have signed off all commits from this PR
  • I have updated the documentation (wiki pages, ReadMe files, Copyright etc)
  • I have not introduced new Warnings/Critical Warnings on compilation
  • I have added new hdl testbenches or updated existing ones

@alin724 alin724 force-pushed the pwm_gen_8ch branch 2 times, most recently from 7b972d1 to 864cdf3 Compare November 7, 2023 09:55
@alin724 alin724 marked this pull request as ready for review November 7, 2023 11:31
@alin724 alin724 requested a review from a team November 7, 2023 11:31
@alin724 alin724 changed the title axi_pwm_gen: Add support for 8 channels axi_pwm_gen: Add support for 16 channels Nov 12, 2023
This was referenced Nov 12, 2023
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alin724 commented Nov 12, 2023

V2:

  • SystemVerilog support for axi_pwm_gen top and regmap modules;
  • up to 16 channels;

@podgori podgori self-requested a review November 16, 2023 09:57
@IuliaCMoldovan IuliaCMoldovan mentioned this pull request Dec 4, 2023
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alin724 and others added 4 commits December 14, 2023 22:05
@alin724
axi_pwm_gen: Add support for 16 channels
8a2b1dc 
Signed-off-by: Alin-Tudor Sferle <[email protected]>
Signed-off-by: AndreiGrozav <[email protected]>
@AndreiGrozav @alin724
axi_pwm_gen: Offset mecanism fix
6048f01 
When leaving the offset equal to zero for a pwm
channel. That pwm channel was not waiting for all
channels to get in sync after a load config.

Signed-off-by: AndreiGrozav <[email protected]>
@AndreiGrozav @alin724
axi_pwm_gen: Start, Stop fix
be18f66 
Previously when issuing a load_config, each pwm channel
was stopped in its tracks and waited for an external sync,
if that was active, or load_config release.
The desired behaviour is to wait for the pwm channels to finish
their events from the current period, before a new aligned start.
Also, the first positive edge of each pulse was initiated only
in the second pwm channel period.
This niche behaviours have not affected any functionality in the
long term alignments for current setups.

Signed-off-by: AndreiGrozav <[email protected]>
@AndreiGrozav @alin724
axi_pwm_gen: Update ttcl constraints
ef3207a 
Signed-off-by: AndreiGrozav <[email protected]>
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alin724 commented Dec 14, 2023

V2:

Squashed cleanup and quartus requirements-related commits into a single one with the name indicating to the support for up to 16 channels;

@alin724 alin724 merged commit 870b27d into main Dec 15, 2023
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@alin724 alin724 deleted the pwm_gen_8ch branch December 15, 2023 13:03
@threexc threexc mentioned this pull request Jan 19, 2024
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@AndreiGrozav AndreiGrozav AndreiGrozav approved these changes

@acostina acostina Awaiting requested review from acostina acostina is a code owner

@PopPaul2021 PopPaul2021 Awaiting requested review from PopPaul2021 PopPaul2021 is a code owner

@podgori podgori Awaiting requested review from podgori

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