PPCRec: Handle edge case for x86 shift instructions

cemu-project · Oct 29, 2024 · a05b655 · a05b655
1 parent e332726
commit a05b655
Showing 1 changed file with 10 additions and 3 deletions.
diff --git a/src/Cafe/HW/Espresso/Recompiler/BackendX64/BackendX64.cpp b/src/Cafe/HW/Espresso/Recompiler/BackendX64/BackendX64.cpp
@@ -828,9 +828,14 @@ bool PPCRecompilerX64Gen_imlInstruction_r_r_r(PPCRecFunction_t* PPCRecFunction,
 		}
 		else
 		{
-			cemu_assert_debug(rRegResult != rRegOperand2);
-			cemu_assert_debug(rRegResult != X86_REG_RCX);
-			cemu_assert_debug(rRegOperand2 == X86_REG_RCX);
+			cemu_assert_debug(rRegOperand2 == X86_REG_ECX);
+			bool useTempReg = rRegResult == X86_REG_ECX && rRegOperand1 != X86_REG_ECX;
+			auto origRegResult = rRegResult;
+			if(useTempReg)
+			{
+				x64GenContext->emitter->MOV_dd(REG_RESV_TEMP, rRegOperand1);
+				rRegResult = REG_RESV_TEMP;
+			}
 			if(rRegOperand1 != rRegResult)
 				x64Gen_mov_reg64_reg64(x64GenContext, rRegResult, rRegOperand1);
 			if (imlInstruction->operation == PPCREC_IML_OP_RIGHT_SHIFT_S)
@@ -839,6 +844,8 @@ bool PPCRecompilerX64Gen_imlInstruction_r_r_r(PPCRecFunction_t* PPCRecFunction,
 				x64GenContext->emitter->SHR_d_CL(rRegResult);
 			else if (imlInstruction->operation == PPCREC_IML_OP_LEFT_SHIFT)
 				x64GenContext->emitter->SHL_d_CL(rRegResult);
+			if(useTempReg)
+				x64GenContext->emitter->MOV_dd(origRegResult, REG_RESV_TEMP);
 		}
 	}
 	else if( imlInstruction->operation == PPCREC_IML_OP_DIVIDE_SIGNED || imlInstruction->operation == PPCREC_IML_OP_DIVIDE_UNSIGNED )