Releases: chipsalliance/synlig
2023-10-29-9d4cf25: #2113: Add test for hier path typespec
Add test for hier path typespec (#2113)
2023-10-27-01111c5: #2097: Fix bug with typespecs declared in package
Fixes issue #1859 which is a major bug.
2023-10-26-f3e960c: #2103: Respect function scope
Respect function scope (#2103)
2023-10-26-f0252f6: #2111: Makefile: Remove unicode characters.
These might not be easy to edit everywhere.
2023-10-26-550eb99: #2109: Build(deps): Bump third_party/surelog from `c742271` to `eb3e943`
Bumps third_party/surelog from c742271
to eb3e943
.
Commits
eb3e943
Merge pull request #3915 from alainmarcel/alainmarcel-patch-10d84478
Repair -lowmem in read_systemverilog yosys command- See full diff in compare view
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2023-10-26-3d86f91: #2072: fix convert_range function
This fixes multiranges for wires that doesn't start with 0.
The PR has been moved here from chipsalliance/yosys-f4pga-plugins#533
2023-10-24-dd28e6d: #2102: Test OpenTitan 9d82960888 on pull requests
To avoid situations like 8932344
2023-10-23-8932344
Revert "Build(deps): Bump third_party/surelog from `ea57e33` to `b76a…
2023-10-18-bdac131: #2082: Build(deps): Bump third_party/surelog from `1a5ca24` to `ea57e33`
Bumps third_party/surelog from 1a5ca24
to ea57e33
.
Commits
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2023-10-16-e41b396: #2074: Build(deps): Bump third_party/surelog from `0a39aae` to `1a5ca24`
Bumps third_party/surelog from 0a39aae
to 1a5ca24
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Commits
1a5ca24
Merge pull request #3908 from hzeller/20231015-non-vendored-uhdm853e0fa
Use 1.76 version of UHDM in non-vendored UHDM140d669
Merge pull request #3907 from hzeller/20231014-use-jsonbd86420
Development under nix: Don't rely on third_party/, use local nlohmann_jsonb9f6db9
Merge pull request #3906 from hzeller/20231014-bump-version073b56d
Bump Version: 1.766091801
Merge pull request #3905 from alainmarcel/alainmarcel-patch-1e5dfc7f
seq rule update43619fe
Merge pull request #3904 from alainmarcel/alainmarcel-patch-18ce307a
File level binding- Additional commits viewable in compare view
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