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Interchange histogram with inner maps during reverse AD (#2031)
Also fixes a bug in code generation for segmented intra-group SegHists requiring spinlocks.
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,32 @@ | ||
-- == | ||
-- entry: vecmin | ||
-- compiled input { [5i64, 3i64, 2i64, 4i64, 3i64, 3i64, 4i64, 2i64, 2i64, 3i64] | ||
-- [[8i32, 5i32, -2i32, 4i32, 6i32], | ||
-- [12i32, 8i32, 7i32, 2i32, 6i32], | ||
-- [3i32, 9i32, -2i32, 11i32, 1i32], | ||
-- [7i32, 3i32, 12i32, 7i32, 10i32], | ||
-- [9i32, 12i32, 4i32, 1i32, 8i32], | ||
-- [7i32, -1i32, 11i32, 6i32, 10i32], | ||
-- [-2i32, 6i32, 7i32, 1i32, 12i32], | ||
-- [8i32, 0i32, 9i32, 6i32, 7i32], | ||
-- [7i32, 3i32, 6i32, 7i32, 8i32], | ||
-- [1i32, 4i32, 2i32, 9i32, 9i32]] | ||
-- [[2i32, 2i32, 2i32, 2i32, 4i32], | ||
-- [2i32, 1i32, 3i32, 3i32, 1i32], | ||
-- [2i32, 5i32, 2i32, 4i32, 5i32], | ||
-- [1i32, 2i32, 1i32, 1i32, 4i32], | ||
-- [5i32, 1i32, 4i32, 4i32, 5i32], | ||
-- [4i32, 1i32, 4i32, 5i32, 3i32]] } | ||
-- output { [[4i32, 1i32, 4i32, 5i32, 3i32], | ||
-- [0i32, 0i32, 0i32, 0i32, 4i32], | ||
-- [2i32, 0i32, 2i32, 0i32, 5i32], | ||
-- [0i32, 1i32, 0i32, 0i32, 5i32], | ||
-- [0i32, 0i32, 0i32, 1i32, 0i32], | ||
-- [0i32, 2i32, 0i32, 0i32, 0i32], | ||
-- [5i32, 0i32, 4i32, 4i32, 0i32], | ||
-- [0i32, 5i32, 0i32, 4i32, 0i32], | ||
-- [0i32, 0i32, 0i32, 0i32, 0i32], | ||
-- [1i32, 0i32, 1i32, 0i32, 0i32]] } | ||
|
||
entry vecmin [n][d][bins] (is: [n]i64) (vs: [n][d]i32) (adj_out: [bins][d]i32) = | ||
vjp (hist (map2 i32.min) (replicate d i32.highest) bins is) vs adj_out |
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,32 @@ | ||
-- == | ||
-- entry: vecmul | ||
-- compiled input { [5i64, 3i64, 2i64, 4i64, 3i64, 3i64, 4i64, 2i64, 2i64, 3i64] | ||
-- [[8i32, 5i32, -2i32, 4i32, 6i32], | ||
-- [12i32, 8i32, 7i32, 2i32, 6i32], | ||
-- [3i32, 9i32, -2i32, 11i32, 1i32], | ||
-- [7i32, 3i32, 12i32, 7i32, 10i32], | ||
-- [9i32, 12i32, 4i32, 1i32, 8i32], | ||
-- [7i32, -1i32, 11i32, 6i32, 10i32], | ||
-- [-2i32, 6i32, 7i32, 1i32, 12i32], | ||
-- [8i32, 0i32, 9i32, 6i32, 7i32], | ||
-- [7i32, 3i32, 6i32, 7i32, 8i32], | ||
-- [1i32, 4i32, 2i32, 9i32, 9i32]] | ||
-- [[2i32, 2i32, 2i32, 2i32, 4i32], | ||
-- [2i32, 1i32, 3i32, 3i32, 1i32], | ||
-- [2i32, 5i32, 2i32, 4i32, 5i32], | ||
-- [1i32, 2i32, 1i32, 1i32, 4i32], | ||
-- [5i32, 1i32, 4i32, 4i32, 5i32], | ||
-- [4i32, 1i32, 4i32, 5i32, 3i32]] } | ||
-- output { [[4i32, 1i32, 4i32, 5i32, 3i32], | ||
-- [63i32, -96i32, 88i32, 54i32, 2880i32], | ||
-- [112i32, 0i32, 108i32, 168i32, 280i32], | ||
-- [-10i32, 6i32, 28i32, 4i32, 60i32], | ||
-- [84i32, -64i32, 154i32, 108i32, 2160i32], | ||
-- [108i32, 768i32, 56i32, 18i32, 1728i32], | ||
-- [35i32, 3i32, 48i32, 28i32, 50i32], | ||
-- [42i32, 135i32, -24i32, 308i32, 40i32], | ||
-- [48i32, 0i32, -36i32, 264i32, 35i32], | ||
-- [756i32, -192i32, 308i32, 12i32, 1920i32]] } | ||
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entry vecmul [n][d][bins] (is: [n]i64) (vs: [n][d]i32) (adj_out: [bins][d]i32) = | ||
vjp (hist (map2 (*)) (replicate d 1i32) bins is) vs adj_out |